156. 富岳から学ぶべきこととポスト富岳 (2022/4/20) 年度も変わって、牧野の旧理研AICS、現R-CCS での「粒子系シミュレータ研究チーム」も10年の年限ということで解散になりました。富岳開発のFS2020プロジェクト自体は前年度、2020年度で終了しており、プロジェクトリーダーの石川さんは既に2020年度末に R-CCS を離れています。 AICS を R-CCS に名称・組織変更し、機構長/副機構長も全て入れ換えた理事長は昨年度末で交代となり、理事も大きく入れ替わったようで、名称変更はプラスだったのか？という気はします。名称・組織変更(及び各センターのトップの入れ換え)は前理事長が進めたもので、AICS だけでなく基本的に全センターが対象になりました。新理事長がこれから理研をどういう方向にもっていくのかは注目されます。 一方、ポスト富岳は今年度にフィージビリティスタディ
In late May of 2022, AWS released Graviton 3 to the general public. Graviton 3 was the first ARM CPU to introduce the SVE instruction set to a widely accessible server CPU. Before Graviton 3’s general availability, Neoverse N1 dominated the ARM server landscape. AWS’s previous flagship offering, Graviton 2, implements 64 Neoverse N1 cores at 2.5 GHz. Microsoft’s Azure and Oracle’s OCI both use Amp
How fast can it go? Sometimes you just want to know how fast your code can go, without benchmarking it. Sometimes you have benchmarked it and want to know how close you are to the maximum speed. Often you just need to know what the current limiting factor is, to guide your optimization decisions. Well this post is about that determining that speed limit1. It’s not a comprehensive performance evalu
At Hot Chips last week, IBM announced its new mainframe Z processor. It’s a big interesting piece of kit that I want to do a wider piece on at some point, but there was one feature of that core design that I want to pluck out and focus on specifically. IBM Z is known for having big L3 caches, backed with a separate global L4 cache chip that operates as a cache between multiple sockets of processor
Branch predictor: How many "if"s are too many? Including x86 and M1 benchmarks!2021-05-06 Some time ago I was looking at a hot section in our code and I saw this: if (debug) { log("..."); } This got me thinking. This code is in a performance critical loop and it looks like a waste - we never run with the "debug" flag enabled[1]. Is it ok to have if clauses that will basically never be run? Surely,
Daniel "Dan" William Dobberpuhl (March 25, 1945 – October 26, 2019[1]) was an electrical engineer in the United States who led several teams of microprocessor designers. Dobberpuhl was born in Streator, Illinois on March 25, 1945. He graduated with a Bachelor of Science degree in electrical engineering from the University of Illinois at Urbana–Champaign in 1967. He worked as an engineer for the De
TL;DR 分散システムにおいてキューを導入する場合、本当にキューが必要なのか再考すべき。そこが地獄の入り口だから。 システムの抽象 コンピュータの世界は、本来は0と1の信号の羅列が飛び交う無機質なものである。でも人類は信号だけですべてを語らず、様々な喩えを定義してきた。それはデスクトップ・ウィンドウ・マウスカーソルといったグラフィカルな表現に留まらず、パケットやカプセル化といった用語にロック・キュー・リスト・木などのアルゴリズムやデータ構造の世界にも自然に溶け込んでいる。これらはすべて人間の理解を助けるための喩え話に過ぎず、この喩えこそが人間のより直感的な理解をもたらす一方で、発想の制約を生み出してきた。 人間が大きなシステムを作るときも何らかの喩えを用いてシステム全体を整理する。アーキテクチャの「ポンチ絵」を描いて情報共有をするのは企業に勤めていれば経験した人も多いだろう。パワーポイン
Computer Architecture Today Informing the broad computing community about current activities, advances and future directions in computer architecture. SIMD Instructions Considered Harmful by David Patterson and Andrew Waterman on Sep 18, 2017 | Tags: Architecture, CPU, ISA, Parallelism In the process of writing a short introduction to RISC-V, we compared RISC-V vector code to SIMD. We were struck
Developers of the Mill, a clean-sheet rethink of general-purpose CPU architectures Faster, Cooler, Safer Computing.For the existing, portable code in the world, a re-compiled program will run faster, cooler and safer. FasterMost existing code is single thread, so the Mill is designed to speed up the execution of each thread by being capable of many more operations per clock. For multi-thread code,
ISA CPU Threads Frequency (MHz) Compressing (MIPS) Decompressing (MIPS)
Today, we gave a keynote presentation at the Open Networking Summit, where we shared details about Espresso, Google’s peering edge architecture—the latest offering in our Software Defined Networking (SDN) strategy. Espresso has been in production for over two years and routes 20 percent of our total traffic to the internet—and growing. It’s changing the way traffic is directed at the peering edge,
2016年10月24日に開催されたQCon Tokyo 2016での講演「A-3 今どきのアーキテクチャ設計戦略」の資料です。
This blog post is adapted from a lightning talk I gave at the Boston Golang meetup in December of 2015. For a while, it seemed like everyone was crazy for microservices. You couldn’t open up your favorite news aggregator of choice without some company you had never heard of touting how the move to microservices had saved their engineering organization. You may have even worked for one of those com
リリース、障害情報などのサービスのお知らせ
最新の人気エントリーの配信
j次のブックマーク
k前のブックマーク
lあとで読む
eコメント一覧を開く
oページを開く
