From 13ac54d1ca89d8a50b996cd26fefb9d836461a74 Mon Sep 17 00:00:00 2001 From: Tom Lane Date: Fri, 1 Aug 2003 19:12:52 +0000 Subject: Since HPUX now exists for Itanium, we should decouple the assumption that OS=hpux is the same as CPU=hppa. First steps at doing this. With these patches, we still work on hppa with either gcc or HP's cc. We might work on hpux/itanium with gcc, but I can't test it. Definitely will not work on hpux/itanium with non-gcc compiler, for lack of spinlock code. --- configure | 2 +- configure.in | 4 ++-- src/backend/port/hpux/tas.c.template | 4 ++++ src/backend/port/tas/hpux.s | 28 ---------------------------- src/backend/port/tas/hpux_hppa.s | 28 ++++++++++++++++++++++++++++ src/include/port/hpux.h | 27 +++++++++++++++++++++------ src/include/storage/s_lock.h | 17 +++++++++-------- 7 files changed, 65 insertions(+), 45 deletions(-) delete mode 100644 src/backend/port/tas/hpux.s create mode 100644 src/backend/port/tas/hpux_hppa.s diff --git a/configure b/configure index 4eef19ca94b..7f242d49504 100755 --- a/configure +++ b/configure @@ -1453,7 +1453,7 @@ PORTNAME=$template # assembler code in src/include/storage/s_lock.h, so we just use # a dummy file here. case $host in - *-*-hpux*) need_tas=yes; tas_file=hpux.s ;; + hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;; sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;; i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;; *) need_tas=no; tas_file=dummy.s ;; diff --git a/configure.in b/configure.in index a9093734884..fa40b037f3e 100644 --- a/configure.in +++ b/configure.in @@ -1,5 +1,5 @@ dnl Process this file with autoconf to produce a configure script. -dnl $Header: /cvsroot/pgsql/configure.in,v 1.271 2003/08/01 03:10:03 momjian Exp $ +dnl $Header: /cvsroot/pgsql/configure.in,v 1.272 2003/08/01 19:12:52 tgl Exp $ dnl dnl Developers, please strive to achieve this order: dnl @@ -108,7 +108,7 @@ AC_SUBST(PORTNAME) # assembler code in src/include/storage/s_lock.h, so we just use # a dummy file here. case $host in - *-*-hpux*) need_tas=yes; tas_file=hpux.s ;; + hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;; sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;; i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;; *) need_tas=no; tas_file=dummy.s ;; diff --git a/src/backend/port/hpux/tas.c.template b/src/backend/port/hpux/tas.c.template index 3ab37eb966e..45782948df6 100644 --- a/src/backend/port/hpux/tas.c.template +++ b/src/backend/port/hpux/tas.c.template @@ -1,8 +1,12 @@ /* + * tas() for HPPA. + * * To generate tas.s using this template: * 1. cc +O2 -S -c tas.c * 2. edit tas.s: * - replace the LDW with LDCWX + * 3. install as src/backend/port/tas/hpux_hppa.s. + * * For details about the LDCWX instruction, see the "Precision * Architecture and Instruction Reference Manual" (09740-90014 of June * 1987), p. 5-38. diff --git a/src/backend/port/tas/hpux.s b/src/backend/port/tas/hpux.s deleted file mode 100644 index d978a7cb030..00000000000 --- a/src/backend/port/tas/hpux.s +++ /dev/null @@ -1,28 +0,0 @@ - - .SPACE $TEXT$,SORT=8 - .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24 -tas - .PROC - .CALLINFO CALLER,FRAME=0,ENTRY_SR=3 - .ENTRY - LDO 15(%r26),%r31 ;offset 0x0 - DEPI 0,31,4,%r31 ;offset 0x4 - LDCWX 0(0,%r31),%r23 ;offset 0x8 - COMICLR,= 0,%r23,%r0 ;offset 0xc - DEP,TR %r0,31,32,%r28 ;offset 0x10 -$00000001 - LDI 1,%r28 ;offset 0x14 -$L0 - .EXIT - BV,N %r0(%r2) ;offset 0x18 - .PROCEND ;in=26;out=28; - - - .SPACE $TEXT$ - .SUBSPA $CODE$ - .SPACE $PRIVATE$,SORT=16 - .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16 - .SPACE $TEXT$ - .SUBSPA $CODE$ - .EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR - .END diff --git a/src/backend/port/tas/hpux_hppa.s b/src/backend/port/tas/hpux_hppa.s new file mode 100644 index 00000000000..d978a7cb030 --- /dev/null +++ b/src/backend/port/tas/hpux_hppa.s @@ -0,0 +1,28 @@ + + .SPACE $TEXT$,SORT=8 + .SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24 +tas + .PROC + .CALLINFO CALLER,FRAME=0,ENTRY_SR=3 + .ENTRY + LDO 15(%r26),%r31 ;offset 0x0 + DEPI 0,31,4,%r31 ;offset 0x4 + LDCWX 0(0,%r31),%r23 ;offset 0x8 + COMICLR,= 0,%r23,%r0 ;offset 0xc + DEP,TR %r0,31,32,%r28 ;offset 0x10 +$00000001 + LDI 1,%r28 ;offset 0x14 +$L0 + .EXIT + BV,N %r0(%r2) ;offset 0x18 + .PROCEND ;in=26;out=28; + + + .SPACE $TEXT$ + .SUBSPA $CODE$ + .SPACE $PRIVATE$,SORT=16 + .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16 + .SPACE $TEXT$ + .SUBSPA $CODE$ + .EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR + .END diff --git a/src/include/port/hpux.h b/src/include/port/hpux.h index e140c3cfcfc..83296d852ec 100644 --- a/src/include/port/hpux.h +++ b/src/include/port/hpux.h @@ -1,9 +1,3 @@ -#define HAS_TEST_AND_SET -typedef struct -{ - int sema[4]; -} slock_t; - #ifndef BIG_ENDIAN #define BIG_ENDIAN 4321 #endif @@ -13,7 +7,28 @@ typedef struct #ifndef PDP_ENDIAN #define PDP_ENDIAN 3412 #endif + +#if defined(__hppa) + +#define HAS_TEST_AND_SET +typedef struct +{ + int sema[4]; +} slock_t; + #ifndef BYTE_ORDER #define BYTE_ORDER BIG_ENDIAN +#endif + +#elif defined(__ia64) + +#define HAS_TEST_AND_SET +typedef unsigned int slock_t; + +#ifndef BYTE_ORDER +#define BYTE_ORDER LITTLE_ENDIAN +#endif +#else +#error unrecognized CPU type for HP-UX #endif diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h index 081c79a8297..3dfb515702e 100644 --- a/src/include/storage/s_lock.h +++ b/src/include/storage/s_lock.h @@ -63,7 +63,7 @@ * Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group * Portions Copyright (c) 1994, Regents of the University of California * - * $Id: s_lock.h,v 1.110 2003/07/20 04:31:32 momjian Exp $ + * $Id: s_lock.h,v 1.111 2003/08/01 19:12:52 tgl Exp $ * *------------------------------------------------------------------------- */ @@ -114,7 +114,7 @@ tas(volatile slock_t *lock) /* Intel Itanium */ -#ifdef __ia64__ +#if defined(__ia64__) || defined(__ia64) #define TAS(lock) tas(lock) static __inline__ int @@ -131,7 +131,7 @@ tas(volatile slock_t *lock) return (int) ret; } -#endif /* __ia64__ */ +#endif /* __ia64__ || __ia64 */ #if defined(__arm__) || defined(__arm__) @@ -368,8 +368,9 @@ tas(volatile slock_t *s_lock) /************************************************************************* - * These are the platforms that do not use inline assembler (and hence - * have common code for gcc and non-gcc compilers, if both are available). + * These are the platforms that have only one compiler, or do not use inline + * assembler (and hence have common code for gcc and non-gcc compilers, + * if both are available). */ @@ -437,9 +438,9 @@ tas(volatile slock_t *lock) #endif /* __alpha */ -#if defined(__hpux) +#if defined(__hppa) /* - * HP-UX (PA-RISC) + * HP's PA-RISC * * Note that slock_t on PA-RISC is a structure instead of char * (see include/port/hpux.h). @@ -459,7 +460,7 @@ tas(volatile slock_t *lock) #define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0) -#endif /* __hpux */ +#endif /* __hppa */ #if defined(__QNX__) && defined(__WATCOMC__) /* -- cgit v1.2.3