LVLGen.cpp File Reference

#include "VE.h"
#include "VESubtarget.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/TargetInstrInfo.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "lvl-gen"
#define	RegName(no)

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "lvl-gen"

Definition at line 17 of file LVLGen.cpp.

RegName

#define RegName

(

no

)

Value:

  (MBB.getParent()->getSubtarget<VESubtarget>().getRegisterInfo()->getName(no))

Referenced by llvm::SparcTargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::AVRTargetLowering::getRegisterByName(), llvm::HexagonTargetLowering::getRegisterByName(), llvm::LanaiTargetLowering::getRegisterByName(), llvm::LoongArchTargetLowering::getRegisterByName(), llvm::MipsTargetLowering::getRegisterByName(), llvm::PerTargetMIParsingState::getRegisterByName(), llvm::PPCTargetLowering::getRegisterByName(), llvm::RISCVTargetLowering::getRegisterByName(), llvm::SITargetLowering::getRegisterByName(), llvm::SparcTargetLowering::getRegisterByName(), llvm::SystemZTargetLowering::getRegisterByName(), llvm::TargetLowering::getRegisterByName(), llvm::VETargetLowering::getRegisterByName(), llvm::X86TargetLowering::getRegisterByName(), llvm::logicalview::LVDWARFReader::getRegisterName(), getSpecialRegForName(), llvm::PerFunctionMIParsingState::getVRegInfoNamed(), llvm::GCNTTIImpl::isReadRegisterSourceOfDivergence(), llvm::HexagonTargetLowering::LowerEH_LABEL(), llvm::AMDGPU::parseAsmConstraintPhysReg(), llvm::GCNTargetMachine::parseMachineFunctionInfo(), llvm::prettyPrintRegisterOp(), llvm::printCompactDWARFExpr(), printFormattedRegName(), llvm::AArch64InstPrinter::printMatrixTileVector(), llvm::PPCInstPrinter::printOperand(), printRegister(), printRegister(), llvm::PPCInstPrinter::printRegName(), llvm::PPC::stripRegisterPrefix(), and llvm::AMDGPUPALMetadata::toString().