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VLSI Design: 6-Input AND Gate Analysis

This document discusses 4 designs for a 6-input AND gate and asks to develop delay expressions for each path assuming a path effort of H, then determine the fastest design for H=1, H=5, and H=20. The fastest design depends on the value of H.

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0% found this document useful (0 votes)
233 views2 pages

VLSI Design: 6-Input AND Gate Analysis

This document discusses 4 designs for a 6-input AND gate and asks to develop delay expressions for each path assuming a path effort of H, then determine the fastest design for H=1, H=5, and H=20. The fastest design depends on the value of H.

Uploaded by

hoiyen92
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd

1. Consider four design of a 6-input AND gate shown in figure 1.

Develop an expression for the delay of


each path if the path electrical effort is H. What design is fastest for
(i)
H=1
(ii)
H=5
(iii)
H=20
Explain your conclusions intuitively.

Figure 1

KNL 4343
VLSI Design and Technology

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