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ALU Control Unit Design Overview

This document describes the design of the control unit in a microprogrammed computer. It discusses how microoperation fields are decoded to control the arithmetic logic and shift unit. It also explains how the microprogram sequencer works, including how it selects the next microinstruction address based on the condition and branch codes, and how it handles in-line sequencing, branches, subroutine calls and returns.

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Dawood Ma
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219 views4 pages

ALU Control Unit Design Overview

This document describes the design of the control unit in a microprogrammed computer. It discusses how microoperation fields are decoded to control the arithmetic logic and shift unit. It also explains how the microprogram sequencer works, including how it selects the next microinstruction address based on the condition and branch codes, and how it handles in-line sequencing, branches, subroutine calls and returns.

Uploaded by

Dawood Ma
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Microprogrammed Control 1 Design of Control Unit

DESIGN OF CONTROL UNIT


- DECODING ALU CONTROL INFORMATION -

microoperation fields
F1 F2 F3

3 x 8 decoder 3 x 8 decoder 3 x 8 decoder


7 6 54 3 21 0 7 6 54 3 21 0 76 54 321 0

AND
ADD AC
Arithmetic
logic and DR
DRTAC shift unit
PCTAR

DRTAR

From From
PC DR(0-10) Load
AC

Select 0 1
Multiplexers

Load Clock
AR

Computer Organization Computer Architectures Lab


Microprogrammed Control 2 Design of Control Unit
MICROPROGRAM SEQUENCER
- NEXT MICROINSTRUCTION ADDRESS LOGIC -
Branch, CALL Address
External RETURN form Subroutine
(MAP)
In-Line
S1S0 Address Source
00 CAR + 1, In-Line 3 2 1 0
S1 MUX1 L
01 SBR RETURN SBR Subroutine
S0 CALL
10 CS(AD), Branch or CALL Address
11 MAP source
selection
Incrementer

Clock CAR

Control Storage

MUX-1 selects an address from one of four sources and routes it into a CAR

- In-Line Sequencing  CAR + 1


- Branch, Subroutine Call  CS(AD)
- Return from Subroutine  Output of SBR
- New Machine instruction  MAP
Computer Organization Computer Architectures Lab
Microprogrammed Control 3 Design of Control Unit
MICROPROGRAM SEQUENCER
- CONDITION AND BRANCH CONTROL -

1 L L(load SBR with PC)


From I MUX2 Test
CPU S T for subroutine Call
BR field Input
Z Select I0 logic
of CS I1
S0 for next address
S1 selection
CD Field of CS

Input Logic
I0I1T Meaning Source of Address S 1 S0 L

000 In-Line CAR+1 00 0


001 JMP CS(AD) 10 0
010 In-Line CAR+1 00 0
011 CALL CS(AD) and SBR <- CAR+1 10 1
10x RET SBR 01 0
11x MAP DR(11-14) 11 0

S0 = I 0
S1 = I0I1 + I0’T
L = I0’I1T

Computer Organization Computer Architectures Lab


Microprogrammed Control 4 Design of Control Unit

MICROPROGRAM SEQUENCER
External
(MAP)

L
I0 3 2 1 0
Input Load
I1 logic S1 MUX1 SBR
T S0

1 Incrementer
I MUX2 Test
S
Z Select
Clock CAR

Control memory

Microops CD BR AD
... ...

Computer Organization Computer Architectures Lab

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