IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO.

6, JUNE 2011 2435

Single-Phase Seven-Level Grid-Connected Inverter

for Photovoltaic System
Nasrudin A. Rahim, Senior Member, IEEE, Krismadinata Chaniago, Student Member, IEEE, and Jeyraj Selvaraj

Abstract—This paper proposes a single-phase seven-level in-

verter for grid-connected photovoltaic systems, with a novel
pulsewidth-modulated (PWM) control scheme. Three reference
signals that are identical to each other with an offset that
is equivalent to the amplitude of the triangular carrier sig-
nal were used to generate the PWM signals. The inverter
is capable of producing seven levels of output-voltage levels
(Vdc , 2Vdc /3, Vdc /3, 0, −Vdc , −2Vdc /3, −Vdc /3) from the
dc supply voltage. A digital proportional–integral current-control
algorithm was implemented in a TMS320F2812 DSP to keep the
current injected into the grid sinusoidal. The proposed system was
verified through simulation and implemented in a prototype.
Index Terms—Grid connected, modulation index, multilevel
inverter, photovoltaic (PV) system, pulsewidth-modulated (PWM),
total harmonic distortion (THD).

I. I NTRODUCTION Fig. 1. Proposed single-phase seven-level grid-connected inverter for photo-

voltaic systems.

T HE ever-increasing energy consumption, fossil fuels’

soaring costs and exhaustible nature, and worsening
global environment have created a booming interest in renew-
harmonic profile, less stressing of electronic components owing
to decreased voltages, switching losses that are lower than those
able energy generation systems, one of which is photovoltaic. of conventional two-level inverters, a smaller filter size, and
Such a system generates electricity by converting the Sun’s en- lower EMI, all of which make them cheaper, lighter, and more
ergy directly into electricity. Photovoltaic-generated energy can compact [3], [4].
be delivered to power system networks through grid-connected Various topologies for multilevel inverters have been pro-
inverters. posed over the years. Common ones are diode-clamped [5]–
A single-phase grid-connected inverter is usually used for [10], flying capacitor or multicell [11]–[17], cascaded H-bridge
residential or low-power applications of power ranges that are [18]–[24], and modified H-bridge multilevel [25]–[29].
less than 10 kW [1]. Types of single-phase grid-connected This paper recounts the development of a novel modi-
inverters have been investigated [2]. A common topology of fied H-bridge single-phase multilevel inverter that has two
this inverter is full-bridge three-level. The three-level inverter diode embedded bidirectional switches and a novel pulsewidth-
can satisfy specifications through its very high switching, but modulated (PWM) technique. The topology was applied to a
it could also unfortunately increase switching losses, acoustic grid-connected photovoltaic system with considerations for a
noise, and level of interference to other equipment. Improving maximum-power-point tracker (MPPT) and a current-control
its output waveform reduces its harmonic content and, hence, algorithm.
also the size of the filter used and the level of electromagnetic
interference (EMI) generated by the inverter’s switching opera-
tion [3]. II. P ROPOSED M ULTILEVEL I NVERTER T OPOLOGY
Multilevel inverters are promising; they have nearly sinu- The proposed single-phase seven-level inverter was devel-
soidal output-voltage waveforms, output current with better oped from the five-level inverter in [25]–[29]. It comprises a
single-phase conventional H-bridge inverter, two bidirectional
switches, and a capacitor voltage divider formed by C1 , C2 ,
Manuscript received January 18, 2010; revised May 12, 2010; accepted and C3 , as shown in Fig. 1. The modified H-bridge topology
June 23, 2010. Date of publication August 30, 2010; date of current version is significantly advantageous over other topologies, i.e., less
May 13, 2011. power switch, power diodes, and less capacitors for inverters
The authors are with the Center of Research for Power Electronics,
Drives, Automation and Control (UMPEDAC), Faculty of Engineering, Univer- of the same number of levels.
sity Malaya, Kuala Lumpur 50603, Malaysia (e-mail: [email protected]; photovoltaic (PV) arrays were connected to the inverter via a
[email protected]; [email protected]). dc–dc boost converter. The power generated by the inverter is
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. to be delivered to the power network, so the utility grid, rather
Digital Object Identifier 10.1109/TIE.2010.2064278 than a load, was used. The dc–dc boost converter was required

0278-0046/$26.00 © 2010 IEEE

2436 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 6, JUNE 2011

because the PV arrays had a voltage that was lower than the grid
voltage. High dc bus voltages are necessary to ensure that power
flows from the PV arrays to the grid. A filtering inductance
Lf was used to filter the current injected into the grid. Proper
switching of the inverter can produce seven output-voltage lev-
els (Vdc , 2Vdc /3, Vdc /3, 0, −Vdc , −2Vdc /3, −Vdc /3) from the
dc supply voltage.
The proposed inverter’s operation can be divided into seven
switching states, as shown in Fig. 2(a)–(g). Fig. 2(a), (d),
and (g) shows a conventional inverter’s operational states in
sequence, while Fig. 2(b), (c), (e), and (f) shows additional
states in the proposed inverter synthesizing one- and two-third
levels of the dc-bus voltage.
The required seven levels of output voltage were generated
as follows.

1) Maximum positive output (Vdc ): S1 is ON, connecting

the load positive terminal to Vdc , and S4 is ON, con-
necting the load negative terminal to ground. All other
controlled switches are OFF; the voltage applied to the
load terminals is Vdc . Fig. 2(a) shows the current paths
that are active at this stage.
2) Two-third positive output (2Vdc /3): The bidirectional
switch S5 is ON, connecting the load positive terminal,
and S4 is ON, connecting the load negative terminal
to ground. All other controlled switches are OFF; the
voltage applied to the load terminals is 2Vdc /3. Fig. 2(b)
shows the current paths that are active at this stage.
3) One-third positive output (Vdc /3): The bidirectional
switch S6 is ON, connecting the load positive terminal,
and S4 is ON, connecting the load negative terminal
to ground. All other controlled switches are OFF; the
voltage applied to the load terminals is Vdc /3. Fig. 2(c)
shows the current paths that are active at this stage.
4) Zero output: This level can be produced by two switching
combinations; switches S3 and S4 are ON, or S1 and
S2 are ON, and all other controlled switches are OFF;
terminal ab is a short circuit, and the voltage applied to
the load terminals is zero. Fig. 2(d) shows the current
paths that are active at this stage.
5) One-third negative output (−Vdc /3): The bidirectional
switch S5 is ON, connecting the load positive terminal,
and S2 is ON, connecting the load negative terminal to
Vdc . All other controlled switches are OFF; the voltage
applied to the load terminals is −Vdc /3. Fig. 2(e) shows
the current paths that are active at this stage.
6) Two-third negative output (−2Vdc /3): The bidirectional
switch S6 is ON, connecting the load positive terminal,
and S2 is ON, connecting the load negative terminal
to ground. All other controlled switches are OFF; the
voltage applied to the load terminals is −2Vdc /3. Fig. 2(f)
shows the current paths that are active at this stage.
7) Maximum negative output (−Vdc ): S2 is ON, connecting
the load negative terminal to Vdc , and S3 is ON, con-
necting the load positive terminal to ground. All other
controlled switches are OFF; the voltage applied to the
load terminals is −Vdc . Fig. 2(g) shows the current paths Fig. 2. Switching combination required to generate the output voltage (Vab ).
that are active at this stage. (a) Vab = Vdc . (b) Vab = 2Vdc /3. (c) Vab = Vdc /3. (d) Vab = 0.
RAHIM et al.: SINGLE-PHASE SEVEN-LEVEL GRID-CONNECTED INVERTER FOR PHOTOVOLTAIC SYSTEM 2437

Fig. 3. Switching pattern for the single-phase seven-level inverter.

III. PWM M ODULATION

A novel PWM modulation technique was introduced to
generate the PWM switching signals. Three reference signals
(Vref1 , Vref2 , and Vref3 ) were compared with a carrier signal
(Vcarrier ). The reference signals had the same frequency and
amplitude and were in phase with an offset value that was
equivalent to the amplitude of the carrier signal. The reference
signals were each compared with the carrier signal. If Vref1
had exceeded the peak amplitude of Vcarrier , Vref2 was com-
pared with Vcarrier until it had exceeded the peak amplitude
of Vcarrier . Then, onward, Vref3 would take charge and would
Fig. 2. (Continued.) Switching combination required to generate the output be compared with Vcarrier until it reached zero. Once Vref3 had
voltage (Vab ). (e) Vab = −Vdc /3. (f) Vab = −2Vdc /3. (g) Vab = −Vdc . reached zero, Vref2 would be compared until it reached zero.
Then, onward, Vref1 would be compared with Vcarrier . Fig. 3
TABLE I shows the resulting switching pattern. Switches S1 , S3 , S5 ,
OUTPUT VOLTAGE ACCORDING TO THE SWITCHES’ ON–OFF CONDITION and S6 would be switching at the rate of the carrier signal
frequency, whereas S2 and S4 would operate at a frequency that
was equivalent to the fundamental frequency.
For one cycle of the fundamental frequency, the proposed
inverter operated through six modes. Fig. 4 shows the per-
unit output-voltage signal for one cycle. The six modes are
described as follows:

Mode 1 : 0 < ωt < θ1 and θ4 < ωt < π

Mode 2 : θ1 < ωt < θ2 and θ3 < ωt < θ4
Mode 3 : θ2 < ωt < θ3
Table I shows the switching combinations that gen- Mode 4 : π < ωt < θ5 and θ8 < ωt < 2π
erated the seven output-voltage levels (0, −Vdc , −2Vdc /3, Mode 5 : θ5 < ωt < θ6 and θ7 < ωt < θ8
−Vdc /3, Vdc , 2Vdc /3, Vdc /3). Mode 6 : θ6 < ωt < θ7 . (1)
2438 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 6, JUNE 2011

If the modulation index is more than 0.66, the phase angle

displacement is determined by
 
Ac
θ1 = sin−1 (13)
Am
 
−1 2Ac
θ2 = sin (14)
Am
θ3 = π − θ2 (15)
θ4 = π − θ1 (16)
θ5 = π + θ1 (17)
θ6 = π + θ2 (18)
θ7 = 2π − θ2 (19)
θ8 = 2π − θ1 . (20)

Fig. 4. Seven-level output voltage (Vab ) and switching angles. For Ma that is equal to, or less than, 0.33, only the lower
reference wave (Vref3 ) is compared with the triangular car-
The phase angle depends on modulation index Ma . Theoreti- rier signal. The inverter’s behavior is similar to that of a
cally, for a single reference signal and a single carrier signal, conventional full-bridge three-level PWM inverter. However,
the modulation index is defined to be if Ma is more than 0.33 and less than 0.66, only Vref2 and
Am Vref3 reference signals are compared with the triangular carrier
Ma = (2)
Ac wave. The output voltage consists of five dc-voltage levels. The
modulation index is set to be more than 0.66 for seven levels
while for a single-reference signal and a dual carrier signal, the of output voltage to be produced. Three reference signals have
modulation index is defined to be [26]–[29] to be compared with the triangular carrier signal to produce
Am switching signals for the switches.
Ma = . (3)
2Ac
Since the proposed seven-level PWM inverter utilizes three IV. C ONTROL S YSTEM
carrier signals, the modulation index is defined to be As Fig. 5 shows, the control system comprises a MPPT algo-
Am rithm, a dc-bus voltage controller, reference-current generation,
Ma = (4) and a current controller. The two main tasks of the control
3Ac
system are maximization of the energy transferred from the PV
where Ac is the peak-to-peak value of the carrier signal and Am arrays to the grid, and generation of a sinusoidal current with
is the peak value of the voltage reference signal Vref . minimum harmonic distortion, also under the presence of grid
When the modulation index is less than 0.33, the phase angle voltage harmonics.
displacement is The proposed inverter utilizes the perturb-and-observe
π (P&O) algorithm for its wide usage in MPPT owing to its
θ1 = θ2 = θ3 = θ4 = (5) simple structure and requirement of only a few measured pa-
2
3π rameters. It periodically perturbs (i.e., increment or decrement)
θ5 = θ6 = θ7 = θ8 = . (6) the array terminal voltage and compares the PV output power
2
with that of the previous perturbation cycle. If the power
On the other hand, when the modulation index is more than was increasing, the perturbation would continue in the same
0.33 and less than 0.66, the phase angle displacement is direction in the next cycle; otherwise, the direction would be
determined by reversed. This means that the array terminal voltage is perturbed
  every MPPT cycle; therefore, when the MPP is reached, the
−1 Ac
θ1 = sin (7) P&O algorithm will oscillate around it.
Am
The P&O algorithm was implemented in the dc–dc boost
π converter. The output of the MPPT is the duty-cycle function.
θ2 = θ3 = (8)
2 As the dc-link voltage Vdc was controlled in the dc–ac seven-
θ4 = π − θ1 (9) level PWM inverter, the change of the duty cycle changes the
voltage at the output of the PV panels. A PID controller was
θ5 = π + θ1 (10)
implemented to keep the output voltage of the dc–dc boost
3π converter (Vdc ) constant by comparing Vdc and Vdc ref and
θ6 = θ7 = (11)
2 feeding the error into the PID controller, which subsequently
θ8 = 2π − θ1 . (12) tries to reduce the error. In this way, the Vdc can be maintained
RAHIM et al.: SINGLE-PHASE SEVEN-LEVEL GRID-CONNECTED INVERTER FOR PHOTOVOLTAIC SYSTEM 2439

Fig. 5. Seven-level inverter with closed-loop control algorithm.

√
at a constant value and at more than 2 of Vgrid to inject power
into the grid.
To deliver energy to the grid, the frequency and phase of
the PV inverter must equal those of the grid; therefore, a grid
synchronization method is needed. The sine lookup table that
generates reference current must be brought into phase with the
grid voltage (Vgrid ). For this, the grid period and phase must be
detected.
The proposed inverter provides an analog zero-crossing de-
tection circuit on one of its input ports where the grid voltage
is to be connected. The zero-crossing circuit then produces an
in-phase square-wave output that is fed into the digital I/O port
on eZdsp board TMS320F2812.
A PI algorithm was used as the feedback current controller
for the application. The current injected into the grid, also
known as grid current Igrid , was sensed and fed back to a
comparator that compared it with the reference current Igridref . Fig. 6. PWM switching signal generation.
Igridref is the result of the MPPT algorithm. The error from
the comparison process of Igrid and Igridref was fed into the PI
controller. The output of the PI controller, also known as Vref , V. S IMULATION AND E XPERIMENTAL R ESULTS
goes through an antiwindup process before being compared
A. Simulation Results
with the triangular wave to produce the switching signals for
S1 –S6 . Eventually, Vref becomes Vref1 ; Vref2 and Vref3 can be MATLAB SIMULINK simulated the proposed configuration
derived from Vref1 by shifting the offset value, which was equiv- before it was physically implemented in a prototype. The
alent to the amplitude of the triangular wave. The mathematical PWM switching patterns were generated by comparing three
formulation of the PI algorithm and its implementation in the reference signals (Vref1 , Vref2 , and Vref3 ) against a triangu-
DSP are discussed in detail in [28]. lar carrier signal (see Fig. 6). Subsequently, the comparing
2440 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 6, JUNE 2011

Fig. 7. PWM signals for S1 and S3 .

Fig. 10. Inverter output voltage (Vinv ).

Fig. 8. PWM signals for S2 and S4 .

Fig. 11. Grid voltage (Vgrid ) and grid current (Igrid ).

of the carrier signal. Fig. 10 shows the simulation result of

inverter output
√ voltage Vinv . The dc-bus voltage was set at
300 V (> 2Vgrid ; in this case, Vgrid√ was 120 V). The dc-bus
voltage must always be higher than 2 of Vgrid to inject current
into the grid, or current will be injected from the grid into the
inverter. Therefore, operation is recommended to be between
Ma = 0.66 and Ma = 1.0. Vinv comprises seven voltage levels,
namely, Vdc , 2Vdc /3, Vdc /3, 0, −Vdc , −2Vdc /3, and −Vdc /3.
The current flowing into the grid was filtered to resemble a pure
sinewave in phase with the grid voltage (see Fig. 11). As Igrid is
almost a pure sinewave at unity power factor, the total harmonic
Fig. 9. PWM signals for S5 and S6 .
distortion (THD) can be reduced compared with the THD
in [28].
process produced PWM switching signals for switches S1 –S6 ,
as Figs. 7–9 show.
B. Experimental Results
One leg of the inverter operated at a high switching rate that
was equivalent to the frequency of the carrier signal, while the A TMS320F2812 DSP was used to verify the simulation
other leg operated at the rate of the fundamental frequency results. PV arrays of 750 W were used as the inverter’s input
(i.e., 50 Hz). Switches S5 and S6 also operated at the rate source. Table II shows the characteristics of the PV modules
RAHIM et al.: SINGLE-PHASE SEVEN-LEVEL GRID-CONNECTED INVERTER FOR PHOTOVOLTAIC SYSTEM 2441

TABLE II
PV MODULE CHARACTERISTICS

Fig. 14. PWM switching for S5 and S6 .

Fig. 12. Experimental setup for the prototype single-phase seven-level PWM
inverter.

Fig. 15. PWM switching for S2 and S4 .

Fig. 13. PWM switching for S1 and S3 .

used in this paper. Ten modules of SIEMENS SP75 were

connected in series to produce 750 W of peak power. Fig. 12
shows the prototype of the seven-level PWM inverter. By Fig. 16. Experimental result for seven levels of output voltage.
comparing the three reference signals with the triangular carrier
signal in the DSP, the switching patterns of Figs. 13–15 were carrier signal. Five levels of output voltage were produced. For
obtained. Fig. 16 shows the experimental result for Vinv and Ma that was less than 0.33, only Vref1 was compared with the
Igrid . Vinv consists of seven levels of output voltage, and Igrid triangular carrier signal, so only three levels of output voltage
had been filtered to resemble a pure sinewave. At this instant, were obtained, as Fig. 19 shows. For the case of Ma being
the modulation index Ma was above 0.66. The dc-bus voltage more than 1.0, the results are not shown because the PV system
was set at 300 V to inject current into the grid. Fig. 17 shows was designed to operate at the condition of Ma being less than
the experimental result for Vgrid and Igrid , which illustrates that one. This was done by calculating the input current and voltage
both the voltage and the current are in phase. The waveforms corresponding to the output voltage and current. Ma was then
when Ma was reduced are shown in Figs. 18 and 19 and varied accordingly for the inverter to operate at minimum
discussed in [28]. and maximum power conditions. Below the minimum power
Fig. 18 corresponds to Ma between 0.33 and 0.66. In this condition (for example, during heavy clouds or nighttime) or
case, only Vref1 and Vref2 were compared with the triangular above the maximum power condition (for example, over rating
2442 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 6, JUNE 2011

Fig. 20. THD result for seven levels of output voltage of Fig. 16.
Fig. 17. Experimental result for grid voltage and grid current that are in phase.

Fig. 21. THD result for five levels of output voltage of Fig. 18.

Fig. 18. Experimental result for five levels of output voltage.

Fig. 22. THD result for three levels of output voltage of Fig. 19.

that, as the level increases, the THD reduces, which is an

essential criterion for grid-connected PV systems.

Fig. 19. Experimental result for three levels of output voltage. VI. C ONCLUSION
Multilevel inverters offer improved output waveforms and
of the PV arrays, in which the inverter’s rating is exceeded), lower THD. This paper has presented a novel PWM switching
the inverter should not operate to ensure the safety of the PV scheme for the proposed multilevel inverter. It utilizes three ref-
system and the environment. erence signals and a triangular carrier signal to generate PWM
A FLUKE 43B power quality analyzer measured the THD switching signals. The behavior of the proposed multilevel
and the power factor. The THD measurement of Fig. 20 cor- inverter was analyzed in detail. By controlling the modulation
responds to the waveform of Fig. 16, while the THD mea- index, the desired number of levels of the inverter’s output
surements of Figs. 21 and 22 correspond to the waveforms voltage can be achieved. A TMS320F2812 DSP optimized the
of Figs. 18 and 19, respectively. Comparing all three THD performance of the inverter. The less THD in the seven-level
measurements, the seven-level inverter produced the lowest inverter compared with that in the five- and three-level inverters
THD compared with the five- and three-level ones. This proves is an attractive solution for grid-connected PV inverters.
RAHIM et al.: SINGLE-PHASE SEVEN-LEVEL GRID-CONNECTED INVERTER FOR PHOTOVOLTAIC SYSTEM 2443

R EFERENCES [22] C.-C. Hua, C.-W. Wu, and C.-W. Chuang, “A digital predictive current
control with improved sampled inductor current for cascaded inverters,”
[1] M. Calais and V. G. Agelidis, “Multilevel converters for single-phase grid
IEEE Trans. Ind. Electron., vol. 56, no. 5, pp. 1718–1726, May 2009.
connected photovoltaic systems—An overview,” in Proc. IEEE Int. Symp.
[23] S. Vazquez, J. I. Leon, L. G. Franquelo, J. J. Padilla, and J. M. Carrasco,
Ind. Electron., 1998, vol. 1, pp. 224–229.
“DC-voltage-ratio control strategy for multilevel cascaded converters fed
[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase
with a single DC source,” IEEE Trans. Ind. Electron., vol. 56, no. 7,
grid connected inverters for photovoltaic modules,” IEEE Trans. Ind.
pp. 2513–2521, Jul. 2009.
Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.
[24] C. Cecati, F. Ciancetta, and P. Siano, “A multilevel inverter for photo-
[3] P. K. Hinga, T. Ohnishi, and T. Suzuki, “A new PWM inverter for pho-
voltaic systems with fuzzy logic control,” IEEE Trans. Ind. Electron.,
tovoltaic power generation system,” in Conf. Rec. IEEE Power Electron.
vol. 57, no. 12, pp. 4115–4125, Dec. 2010.
Spec. Conf., 1994, pp. 391–395.
[25] G. Ceglia, V. Guzman, C. Sanchez, F. Ibanez, J. Walter, and
[4] Y. Cheng, C. Qian, M. L. Crow, S. Pekarek, and S. Atcitty, “A comparison
M. I. Gimanez, “A new simplified multilevel inverter topology for DC–AC
of diode-clamped and cascaded multilevel converters for a STATCOM
conversion,” IEEE Trans. Power Electron., vol. 21, no. 5, pp. 1311–1319,
with energy storage,” IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1512–
Sep. 2006.
1521, Oct. 2006.
[26] V. G. Agelidis, D. M. Baker, W. B. Lawrance, and C. V. Nayar, “A
[5] M. Saeedifard, R. Iravani, and J. Pou, “A space vector modulation strategy
multilevel PWM inverter topology for photovoltaic applications,” in Proc.
for a back-to-back five-level HVDC converter system,” IEEE Trans. Ind.
IEEE ISIE, Guimäes, Portugal, 1997, pp. 589–594.
Electron., vol. 56, no. 2, pp. 452–466, Feb. 2009.
[27] S. J. Park, F. S. Kang, M. H. Lee, and C. U. Kim, “A new single-phase five-
[6] S. Alepuz, S. Busquets-Monge, J. Bordonau, J. A. M. Velasco, C. A. Silva,
level PWM inverter employing a deadbeat control scheme,” IEEE Trans.
J. Pontt, and J. Rodríguez, “Control strategies based on sym-
Power Electron., vol. 18, no. 3, pp. 831–843, May 2003.
metrical components for grid-connected converters under voltage
[28] J. Selvaraj and N. A. Rahim, “Multilevel inverter for grid-connected
dips,” IEEE Trans. Ind. Electron., vol. 56, no. 6, pp. 2162–2173,
PV system employing digital PI controller,” IEEE Trans. Ind. Electron.,
Jun. 2009.
vol. 56, no. 1, pp. 149–158, Jan. 2009.
[7] J. Rodríguez, J. S. Lai, and F. Z. Peng, “Multilevel inverters: A survey
[29] N. A. Rahim and J. Selvaraj, “Multi-string five-level inverter with novel
of topologies, controls, and applications,” IEEE Trans. Ind. Electron.,
PWM control scheme for PV application,” IEEE Trans. Ind. Electron.,
vol. 49, no. 4, pp. 724–738, Aug. 2002.
vol. 57, no. 6, pp. 2111–2121, Jun. 2010.
[8] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multi-
[30] M. P. Kazmierkowski, R. Krishnan, and F. Blaabjerg, Control in Power
level voltage-source-converter topologies for industrial medium-voltage
Electronics Selected Problems. New York: Academic, 2002.
drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945,
Dec. 2007.
[9] M. M. Renge and H. M. Suryawanshi, “Five-level diode clamped inverter
to eliminate common mode voltage and reduce dv/dt in medium voltage
rating induction motor drives,” IEEE Trans. Power Electron., vol. 23, Nasrudin A. Rahim (M’89–SM’08) was born in
no. 4, pp. 1598–1160, Jul. 2008. Johor, Malaysia, in 1960. He received the
[10] E. Ozdemir, S. Ozdemir, and L. M. Tolbert, “Fundamental-frequency- B.Sc.(Hons.) and M.Sc. degrees from the University
modulated six-level diode-clamped multilevel inverter for three-phase of Strathclyde, Glasgow, U.K., and the Ph.D. degree
stand-alone photovoltaic system,” IEEE Trans. Ind. Electron., vol. 56, from Heriot–Watt University, Edinburgh, U.K.,
no. 11, pp. 4407–4415, Nov. 2009. in 1995.
[11] R. Stala, S. Pirog, M. Baszynski, A. Mondzik, A. Penczek, J. Czekonski, He is currently a Professor with the Department of
and S. Gasiorek, “Results of investigation of multicell converters with Electrical Engineering, University of Malaya, Kuala
balancing circuit—Part I,” IEEE Trans. Ind. Electron., vol. 56, no. 7, Lumpur, Malaysia, where he is also the Director
pp. 2610–2619, Jul. 2009. of the Center of Research for Power Electronics,
[12] R. Stala, S. Pirog, M. Baszynski, A. Mondzik, A. Penczek, J. Czekonski, Drives, Automation and Control. His research inter-
and S. Gasiorek, “Results of investigation of multicell converters with ests include power electronics, real-time control systems, and electrical drives.
balancing circuit—Part II,” IEEE Trans. Ind. Electron., vol. 56, no. 7, Prof. Rahim is a Fellow of the Institution of Engineering and Technology,
pp. 2620–2628, Jul. 2009. U.K., and the Academy of Sciences Malaysia. He is also a Chartered Engineer.
[13] P. Lezana, R. Aguilera, and D. E. Quevedo, “Model predictive control
of an asymmetric flying capacitor converter,” IEEE Trans. Ind. Electron.,
vol. 56, no. 6, pp. 1839–1846, Jun. 2009.
[14] M. F. Escalante, J.-C. Vannier, and A. Arzandé, “Flying capacitor mul- Krismadinata Chaniago (S’09) received the B.Eng.
tilevel inverters and DTC motor drive applications,” IEEE Trans. Ind. degree from Andalas University, Padang, Indonesia,
Electron., vol. 49, no. 4, pp. 809–815, Aug. 2002. in 2000 and the M.Eng. degree from the Bandung In-
[15] A. Shukla, A. Ghosh, and A. Joshi, “Static shunt and series com- stitute of Technology, Bandung, Indonesia, in 2004.
pensations of an SMIB system using flying capacitor multilevel in- He is a Lecturer in electrical engineering with
verter,” IEEE Trans. Power Del., vol. 20, no. 4, pp. 2613–2622, Padang State University, Padang, and since 2006, he
Oct. 2005. has been a Research Engineer with the Center of
[16] J. Huang and K. A. Corzine, “Extended operation of flying capacitor Research for Power Electronics, Drives, Automation
multilevel inverter,” IEEE Trans. Power Electron., vol. 21, no. 1, pp. 140– and Control, Faculty of Engineering, University of
147, Jan. 2006. Malaya, Kuala Lumpur, Malaysia. His research in-
[17] F. Z. Peng, “A generalized multilevel inverter topology with self volt- terests are power electronics control and renewable
age balancing,” IEEE Trans. Ind. Appl., vol. 37, no. 2, pp. 611–617, energy.
Mar./Apr. 2001.
[18] E. Villanueva, P. Correa, J. Rodríguez, and M. Pacas, “Control of a single-
phase cascaded H-bridge multilevel inverter for grid-connected photo-
voltaic systems,” IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 4399– Jeyraj Selvaraj received the B.Eng.(Hons.) degree
4406, Nov. 2009. from Multimedia University, Cyberjaya, Malaysia,
[19] L. M. Tolbert, F. Z. Peng, T. Cunnyngham, and J. N. Chiasson, “Charge in 2002, the M.Sc. degree in power electron-
balance control schemes for cascade multilevel converter in hybrid electric ics and drives jointly from the University of
vehicles,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 1058–1064, Birmingham, Birmingham, U.K., and the University
Oct. 2002. of Nottingham, Nottingham, U.K., in 2004, and the
[20] K. A. Corzine, M. W. Wielebski, F. Z. Peng, and J. Wang, “Control Ph.D. degree from the University of Malaya, Kuala
of cascaded multilevel inverters,” IEEE Trans. Power Electron., vol. 19, Lumpur, Malaysia, in 2009.
no. 3, pp. 732–738, May 2004. He is currently with the Center of Research for
[21] J. I. Leon, S. Vazquez, S. Kouro, L. G. Franquelo, J. M. Carrasco, and Power Electronics, Drives, Automation and Control,
J. Rodriguez, “Unidimensional modulation technique for cascaded mul- Faculty of Engineering, University of Malaya. His
tilevel converters,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 1058– research interests are single- and three-phase multilevel inverters, digital PI
1064, Oct. 2002. current-control techniques, photovoltaic inverters, and dc–dc converters.