IRFP350

16A,400V,0.300Ohm, N-Channel Power Mosfet

This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested,
and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power
MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and
drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated
directly from integrated circuits.
Formerly developmental type TA17434.

Features
z 16A, 400V
z rDS(ON)=0.300 Ω Symbol
z Single Pulse Avalanche Energy Rated
z SOA is Power Dissipation Limited
z Nanosecond Switching Speeds
z Linear Transfer Characteristics
z High Input Impedance
z Related Literature
-TB334 “Guidelines for Soldering Surface Mount Components Packaging
to PC Boards”

Ordering information
PART NUMBER PACKAGE BRAND
IRFP350 TO-247 IRFP350
NOTE: When ordering, include the entire part number.

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 IRFP350
16A,400V,0.300Ohm, N-Channel Power Mosfet

Absolute Maximum Ratings Tc=25℃, Unless Otherwise Specified

IRFP350 UNITS
Drain to Source Voltage (Note 1)…………………………………………………………………....VDS 400 V
Drain to Gate Voltage (RGS=20KΩ)(Note 1)……………………………………………………...VDGR 400 V
Continuous Drain Current……………………………………………………………………………..ID 16 A
Tc=100℃………………………………………………………………………………………………...ID 10 A
Pulsed Drain Current (Note3)……………………………………………………………………....IDM 64 A
Gate to Source Voltage……………………………………………………………………………..VGS ±20 V
Maximum Power Dissipation………………………………………………………………………..PD 180 W
Linear Derating Factor…………………………………………………………………………………. 1.44 W/℃
Single Pulse Avalanche Energy Rating (Note 4)…………………………………………………EAS 700 mJ
Operating and Storage Temperature………………………………………………………….TJ, TSTG -55 to 150 ℃
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s…………………………………………………….TL 300 ℃
Package Body for 10s, See Techbrief 334……………………………………………………....Tpkg 260 ℃
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of
this specification is not implied.
NOTE:
1. TJ=25℃ to 125℃.
Electrical Specifications Tc=25℃, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS=0V, ID=250µA(Figure 10) 400 - - V
Gate to Threshold Voltage VGS(TH) VGS=VDS, ID=250µA 2.0 - 4.0 V
Zero-Gate Voltage Drain Current IDSS VDS=Rated BVDSS, VGS=0V - - 25 µA
VDS=0.8 x Rated BVDSS, VGS=10V,TJ=125℃ - - 250 A
On-State Drain Current (Note 2) ID(ON) VDS>ID(ON) x rDS(ON)MAX, VGS =10V (Figure7) 16 - - A
Gate to Source Leakage Current IGSS VGS=±20V - - ±100 nA
Drain to Source On Resistance (Note2) rDS(ON) VGS=10V, ID=8.9A (Figures 8,9) - 0.250 0.300 Ω
Forward Transconductance (Note 2) gfs VDS=2 x VGS, ID=8.0A (Figure 12) 8.0 10 - S
Turn-On Delay Time tD(ON) VDD=200V, ID=16A,RGS=6.2Ω, VGS=10V, - 12 18 ns
Rise Time tr RL=12.3 Ω - 51 77 ns
Turn-Off Delay Time tD(OFF) MOSFET Switching Times are Essentially - 75 110 ns
Fall Time tf Independent of Operating Temperature - 47 71 ns
Total Gate Charge Qg VGS=10V, ID=16A, VDS=0.8 x Rated BVDSS。 - 87 130 nC
(Gate to Source + Gate to Drain) IG（REF） = 1.5mA (Figure 14)
Gate to Source Charge Qgs Gate Charge is Essentially Independent of - 10 - nC
Gate to Drain “Miller” Charge Qgd Operating Temperature - 33 - nC
Input Capacitance CISS VGS=0V, VDS=25V, f =1.0MHz (Figure 11) - 2000 - pF
Output Capacitance Coss - 400 - pF
Reverse-Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LD Measured Between Modified MOSFET - 5.0 - nH
the Contact Screw Symbol Showing the
on Header that is internal Devices
Closer to Source and Inductances
Gate Pins and
Center of Die
Internal Source Inductance Measured from the - 12.5 - nH
Source Lead, 6mm
(0.28in) From
Header to Source
Bonding Pad
Junction to Case RӨJC - - 0.70 ℃/W
Junction to Ambient RӨJA Free Air Operation - - 30 ℃/W

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 IRFP350
16A,400V,0.300Ohm, N-Channel Power Mosfet

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified Mosfet - - 16 A
Pulse Source to Drain Current (Note3) ISDM Symbol Showing the - - 64 A
Integral Reverse P-N
Junction Diode
Source to Drain Diode Voltage (Note 2) VSD TJ=25℃, ISD=16A, VGS=0V (Figure 13) - - 1.6 V
Reverse Recovery Time trr TJ=150℃, ISD=15A, dISD/dt=100A/µS 270 - 1300 ns
Reverse Recovered Charge QRR TJ=150℃, ISD=15A, dISD/dt=100A/µS 1.7 - 8.1 µC
Notes:
2. Pulse Test: Pulse width≤300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD=40V, starting TJ=25℃, L =5.66mH, RG=50Ω, peak IAS=15A.

Typical Performance Curves Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE
TEMPERATURE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

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 IRFP350
16A,400V,0.300Ohm, N-Channel Power Mosfet

Typical Performance Curves Unless Otherwise Specified (Continued)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

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 IRFP350
16A,400V,0.300Ohm, N-Channel Power Mosfet

Typical Performance Curves Unless Otherwise Specified (Continued)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE
VOLTAGE vs JUNCTION TEMPERATURE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

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 IRFP350
16A,400V,0.300Ohm, N-Channel Power Mosfet

Test Circuits and Waveforms

FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 20. GATE CHARGE WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT

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