; generated by ARM C/C++ Compiler, 5.

03 [Build 76]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave
-o.\flash\obj\stm32f10x_usart.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\
--depend=.\flash\obj\stm32f10x_usart.d --cpu=Cortex-M3 --apcs=interwork -O0
--diag_suppress=870 -I..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include
-I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\User\bsp
-I..\..\User\bsp\inc -I..\..\uCOS-II\uCOS-II\Ports\ARM-Cortex-M3\Generic\RealView
-I..\..\uCOS-II\uCOS-II\Source -I..\..\uCOS-II\uC-LIB -I..\..\uCOS-II\uC-
LIB\Ports\ARM-Cortex-M3\RealView -I..\..\uCOS-II\uC-CPU -I..\..\uCOS-II\uC-CPU\ARM-
Cortex-M3\RealView -I..\..\User -I..\..\Libraries\CMSIS\Include
-IC:\Keil\ARM\RV31\INC -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\ST\STM32F10x
-D__MICROLIB -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD
..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c]
THUMB

AREA ||i.USART_ClearFlag||, CODE, READONLY, ALIGN=1

USART_ClearFlag PROC
;;;928 */
;;;929 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
000000 f4017200 AND r2,r1,#0x200
;;;930 {
;;;931 /* Check the parameters */
;;;932 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;933 assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
;;;934 /* The CTS flag is not available for UART4 and UART5 */
;;;935 if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
000004 f5b27f00 CMP r2,#0x200
000008 d100 BNE |L1.12|
;;;936 {
;;;937 assert_param(IS_USART_123_PERIPH(USARTx));
00000a bf00 NOP
|L1.12|
;;;938 }
;;;939
;;;940 USARTx->SR = (uint16_t)~USART_FLAG;
00000c 43ca MVNS r2,r1
00000e 8002 STRH r2,[r0,#0]
;;;941 }
000010 4770 BX lr
;;;942
ENDP

AREA ||i.USART_ClearITPendingBit||, CODE, READONLY,

ALIGN=1

USART_ClearITPendingBit PROC
;;;1036 */
;;;1037 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
000000 b510 PUSH {r4,lr}
;;;1038 {
;;;1039 uint16_t bitpos = 0x00, itmask = 0x00;
000002 2200 MOVS r2,#0
000004 2300 MOVS r3,#0
;;;1040 /* Check the parameters */
;;;1041 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;1042 assert_param(IS_USART_CLEAR_IT(USART_IT));
;;;1043 /* The CTS interrupt is not available for UART4 and UART5 */
;;;1044 if (USART_IT == USART_IT_CTS)
000006 f5a16410 SUB r4,r1,#0x900
00000a 3c6a SUBS r4,r4,#0x6a
00000c d100 BNE |L2.16|
;;;1045 {
;;;1046 assert_param(IS_USART_123_PERIPH(USARTx));
00000e bf00 NOP
|L2.16|
;;;1047 }
;;;1048
;;;1049 bitpos = USART_IT >> 0x08;
000010 120a ASRS r2,r1,#8
;;;1050 itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
000012 2401 MOVS r4,#1
000014 4094 LSLS r4,r4,r2
000016 b2a3 UXTH r3,r4
;;;1051 USARTx->SR = (uint16_t)~itmask;
000018 43dc MVNS r4,r3
00001a 8004 STRH r4,[r0,#0]
;;;1052 }
00001c bd10 POP {r4,pc}
;;;1053 /**
ENDP

AREA ||i.USART_ClockInit||, CODE, READONLY, ALIGN=1

USART_ClockInit PROC
;;;307 */
;;;308 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef*
USART_ClockInitStruct)
000000 b510 PUSH {r4,lr}
;;;309 {
000002 4602 MOV r2,r0
;;;310 uint32_t tmpreg = 0x00;
000004 2000 MOVS r0,#0
;;;311 /* Check the parameters */
;;;312 assert_param(IS_USART_123_PERIPH(USARTx));
;;;313 assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
;;;314 assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
;;;315 assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
;;;316 assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
;;;317
;;;318 /*---------------------------- USART CR2 Configuration
-----------------------*/
;;;319 tmpreg = USARTx->CR2;
000006 8a10 LDRH r0,[r2,#0x10]
;;;320 /* Clear CLKEN, CPOL, CPHA and LBCL bits */
;;;321 tmpreg &= CR2_CLOCK_CLEAR_Mask;
000008 f24f03ff MOV r3,#0xf0ff
00000c 4018 ANDS r0,r0,r3
;;;322 /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
;;;323 /* Set CLKEN bit according to USART_Clock value */
;;;324 /* Set CPOL bit according to USART_CPOL value */
;;;325 /* Set CPHA bit according to USART_CPHA value */
;;;326 /* Set LBCL bit according to USART_LastBit value */
;;;327 tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock |
USART_ClockInitStruct->USART_CPOL |
00000e 880b LDRH r3,[r1,#0]
000010 884c LDRH r4,[r1,#2]
000012 4323 ORRS r3,r3,r4
000014 888c LDRH r4,[r1,#4]
000016 4323 ORRS r3,r3,r4
000018 88cc LDRH r4,[r1,#6]
00001a 4323 ORRS r3,r3,r4
00001c 4318 ORRS r0,r0,r3
;;;328 USART_ClockInitStruct->USART_CPHA |
USART_ClockInitStruct->USART_LastBit;
;;;329 /* Write to USART CR2 */
;;;330 USARTx->CR2 = (uint16_t)tmpreg;
00001e 8210 STRH r0,[r2,#0x10]
;;;331 }
000020 bd10 POP {r4,pc}
;;;332
ENDP

AREA ||i.USART_ClockStructInit||, CODE, READONLY, ALIGN=1

USART_ClockStructInit PROC
;;;338 */
;;;339 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
000000 2100 MOVS r1,#0
;;;340 {
;;;341 /* USART_ClockInitStruct members default value */
;;;342 USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
000002 8001 STRH r1,[r0,#0]
;;;343 USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
000004 8041 STRH r1,[r0,#2]
;;;344 USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
000006 8081 STRH r1,[r0,#4]
;;;345 USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
000008 80c1 STRH r1,[r0,#6]
;;;346 }
00000a 4770 BX lr
;;;347
ENDP

AREA ||i.USART_Cmd||, CODE, READONLY, ALIGN=1

USART_Cmd PROC
;;;356 */
;;;357 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L5.12|
;;;358 {
;;;359 /* Check the parameters */
;;;360 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;361 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;362
;;;363 if (NewState != DISABLE)
;;;364 {
;;;365 /* Enable the selected USART by setting the UE bit in the CR1
register */
;;;366 USARTx->CR1 |= CR1_UE_Set;
000002 8982 LDRH r2,[r0,#0xc]
000004 f4425200 ORR r2,r2,#0x2000
000008 8182 STRH r2,[r0,#0xc]
00000a e004 B |L5.22|
|L5.12|
;;;367 }
;;;368 else
;;;369 {
;;;370 /* Disable the selected USART by clearing the UE bit in the CR1
register */
;;;371 USARTx->CR1 &= CR1_UE_Reset;
00000c 8982 LDRH r2,[r0,#0xc]
00000e f64d73ff MOV r3,#0xdfff
000012 401a ANDS r2,r2,r3
000014 8182 STRH r2,[r0,#0xc]
|L5.22|
;;;372 }
;;;373 }
000016 4770 BX lr
;;;374
ENDP

AREA ||i.USART_DMACmd||, CODE, READONLY, ALIGN=1

USART_DMACmd PROC
;;;453 */
;;;454 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq,
FunctionalState NewState)
000000 b11a CBZ r2,|L6.10|
;;;455 {
;;;456 /* Check the parameters */
;;;457 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;458 assert_param(IS_USART_DMAREQ(USART_DMAReq));
;;;459 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;460 if (NewState != DISABLE)
;;;461 {
;;;462 /* Enable the DMA transfer for selected requests by setting the DMAT
and/or
;;;463 DMAR bits in the USART CR3 register */
;;;464 USARTx->CR3 |= USART_DMAReq;
000002 8a83 LDRH r3,[r0,#0x14]
000004 430b ORRS r3,r3,r1
000006 8283 STRH r3,[r0,#0x14]
000008 e002 B |L6.16|
|L6.10|
;;;465 }
;;;466 else
;;;467 {
;;;468 /* Disable the DMA transfer for selected requests by clearing the
DMAT and/or
;;;469 DMAR bits in the USART CR3 register */
;;;470 USARTx->CR3 &= (uint16_t)~USART_DMAReq;
00000a 8a83 LDRH r3,[r0,#0x14]
00000c 438b BICS r3,r3,r1
00000e 8283 STRH r3,[r0,#0x14]
|L6.16|
;;;471 }
;;;472 }
000010 4770 BX lr
;;;473
ENDP
 AREA ||i.USART_DeInit||, CODE, READONLY, ALIGN=2

USART_DeInit PROC
;;;135 */
;;;136 void USART_DeInit(USART_TypeDef* USARTx)
000000 b510 PUSH {r4,lr}
;;;137 {
000002 4604 MOV r4,r0
;;;138 /* Check the parameters */
;;;139 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;140
;;;141 if (USARTx == USART1)
000004 4820 LDR r0,|L7.136|
000006 4284 CMP r4,r0
000008 d109 BNE |L7.30|
;;;142 {
;;;143 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
00000a 2101 MOVS r1,#1
00000c 0388 LSLS r0,r1,#14
00000e f7fffffe BL RCC_APB2PeriphResetCmd
;;;144 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
000012 2100 MOVS r1,#0
000014 f44f4080 MOV r0,#0x4000
000018 f7fffffe BL RCC_APB2PeriphResetCmd
00001c e032 B |L7.132|
|L7.30|
;;;145 }
;;;146 else if (USARTx == USART2)
00001e 481b LDR r0,|L7.140|
000020 4284 CMP r4,r0
000022 d109 BNE |L7.56|
;;;147 {
;;;148 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
000024 2101 MOVS r1,#1
000026 0448 LSLS r0,r1,#17
000028 f7fffffe BL RCC_APB1PeriphResetCmd
;;;149 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
00002c 2100 MOVS r1,#0
00002e f44f3000 MOV r0,#0x20000
000032 f7fffffe BL RCC_APB1PeriphResetCmd
000036 e025 B |L7.132|
|L7.56|
;;;150 }
;;;151 else if (USARTx == USART3)
000038 4815 LDR r0,|L7.144|
00003a 4284 CMP r4,r0
00003c d109 BNE |L7.82|
;;;152 {
;;;153 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
00003e 2101 MOVS r1,#1
000040 0488 LSLS r0,r1,#18
000042 f7fffffe BL RCC_APB1PeriphResetCmd
;;;154 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
000046 2100 MOVS r1,#0
000048 f44f2080 MOV r0,#0x40000
00004c f7fffffe BL RCC_APB1PeriphResetCmd
000050 e018 B |L7.132|
 |L7.82|
;;;155 }
;;;156 else if (USARTx == UART4)
000052 4810 LDR r0,|L7.148|
000054 4284 CMP r4,r0
000056 d109 BNE |L7.108|
;;;157 {
;;;158 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
000058 2101 MOVS r1,#1
00005a 04c8 LSLS r0,r1,#19
00005c f7fffffe BL RCC_APB1PeriphResetCmd
;;;159 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
000060 2100 MOVS r1,#0
000062 f44f2000 MOV r0,#0x80000
000066 f7fffffe BL RCC_APB1PeriphResetCmd
00006a e00b B |L7.132|
|L7.108|
;;;160 }
;;;161 else
;;;162 {
;;;163 if (USARTx == UART5)
00006c 480a LDR r0,|L7.152|
00006e 4284 CMP r4,r0
000070 d108 BNE |L7.132|
;;;164 {
;;;165 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
000072 2101 MOVS r1,#1
000074 0508 LSLS r0,r1,#20
000076 f7fffffe BL RCC_APB1PeriphResetCmd
;;;166 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
00007a 2100 MOVS r1,#0
00007c f44f1080 MOV r0,#0x100000
000080 f7fffffe BL RCC_APB1PeriphResetCmd
|L7.132|
;;;167 }
;;;168 }
;;;169 }
000084 bd10 POP {r4,pc}
;;;170
ENDP

000086 0000 DCW 0x0000

|L7.136|
DCD 0x40013800
|L7.140|
DCD 0x40004400
|L7.144|
DCD 0x40004800
|L7.148|
DCD 0x40004c00
|L7.152|
DCD 0x40005000

AREA ||i.USART_GetFlagStatus||, CODE, READONLY, ALIGN=1

USART_GetFlagStatus PROC
;;;879 */
;;;880 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t
USART_FLAG)
000000 4602 MOV r2,r0
;;;881 {
;;;882 FlagStatus bitstatus = RESET;
000002 2000 MOVS r0,#0
;;;883 /* Check the parameters */
;;;884 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;885 assert_param(IS_USART_FLAG(USART_FLAG));
;;;886 /* The CTS flag is not available for UART4 and UART5 */
;;;887 if (USART_FLAG == USART_FLAG_CTS)
000004 f5b17f00 CMP r1,#0x200
000008 d100 BNE |L8.12|
;;;888 {
;;;889 assert_param(IS_USART_123_PERIPH(USARTx));
00000a bf00 NOP
|L8.12|
;;;890 }
;;;891
;;;892 if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
00000c 8813 LDRH r3,[r2,#0]
00000e 420b TST r3,r1
000010 d001 BEQ |L8.22|
;;;893 {
;;;894 bitstatus = SET;
000012 2001 MOVS r0,#1
000014 e000 B |L8.24|
|L8.22|
;;;895 }
;;;896 else
;;;897 {
;;;898 bitstatus = RESET;
000016 2000 MOVS r0,#0
|L8.24|
;;;899 }
;;;900 return bitstatus;
;;;901 }
000018 4770 BX lr
;;;902
ENDP

AREA ||i.USART_GetITStatus||, CODE, READONLY, ALIGN=1

USART_GetITStatus PROC
;;;962 */
;;;963 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
000000 b570 PUSH {r4-r6,lr}
;;;964 {
000002 4602 MOV r2,r0
;;;965 uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
000004 2400 MOVS r4,#0
000006 2300 MOVS r3,#0
000008 2500 MOVS r5,#0
;;;966 ITStatus bitstatus = RESET;
00000a 2000 MOVS r0,#0
;;;967 /* Check the parameters */
;;;968 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;969 assert_param(IS_USART_GET_IT(USART_IT));
;;;970 /* The CTS interrupt is not available for UART4 and UART5 */
;;;971 if (USART_IT == USART_IT_CTS)
00000c f5a16610 SUB r6,r1,#0x900
000010 3e6a SUBS r6,r6,#0x6a
000012 d100 BNE |L9.22|
;;;972 {
;;;973 assert_param(IS_USART_123_PERIPH(USARTx));
000014 bf00 NOP
|L9.22|
;;;974 }
;;;975
;;;976 /* Get the USART register index */
;;;977 usartreg = (((uint8_t)USART_IT) >> 0x05);
000016 f3c11542 UBFX r5,r1,#5,#3
;;;978 /* Get the interrupt position */
;;;979 itmask = USART_IT & IT_Mask;
00001a f001031f AND r3,r1,#0x1f
;;;980 itmask = (uint32_t)0x01 << itmask;
00001e 2601 MOVS r6,#1
000020 fa06f303 LSL r3,r6,r3
;;;981
;;;982 if (usartreg == 0x01) /* The IT is in CR1 register */
000024 2d01 CMP r5,#1
000026 d102 BNE |L9.46|
;;;983 {
;;;984 itmask &= USARTx->CR1;
000028 8996 LDRH r6,[r2,#0xc]
00002a 4033 ANDS r3,r3,r6
00002c e006 B |L9.60|
|L9.46|
;;;985 }
;;;986 else if (usartreg == 0x02) /* The IT is in CR2 register */
00002e 2d02 CMP r5,#2
000030 d102 BNE |L9.56|
;;;987 {
;;;988 itmask &= USARTx->CR2;
000032 8a16 LDRH r6,[r2,#0x10]
000034 4033 ANDS r3,r3,r6
000036 e001 B |L9.60|
|L9.56|
;;;989 }
;;;990 else /* The IT is in CR3 register */
;;;991 {
;;;992 itmask &= USARTx->CR3;
000038 8a96 LDRH r6,[r2,#0x14]
00003a 4033 ANDS r3,r3,r6
|L9.60|
;;;993 }
;;;994
;;;995 bitpos = USART_IT >> 0x08;
00003c 120c ASRS r4,r1,#8
;;;996 bitpos = (uint32_t)0x01 << bitpos;
00003e 2601 MOVS r6,#1
000040 fa06f404 LSL r4,r6,r4
;;;997 bitpos &= USARTx->SR;
000044 8816 LDRH r6,[r2,#0]
000046 4034 ANDS r4,r4,r6
;;;998 if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
000048 b113 CBZ r3,|L9.80|
00004a b10c CBZ r4,|L9.80|
;;;999 {
;;;1000 bitstatus = SET;
00004c 2001 MOVS r0,#1
00004e e000 B |L9.82|
|L9.80|
;;;1001 }
;;;1002 else
;;;1003 {
;;;1004 bitstatus = RESET;
000050 2000 MOVS r0,#0
|L9.82|
;;;1005 }
;;;1006
;;;1007 return bitstatus;
;;;1008 }
000052 bd70 POP {r4-r6,pc}
;;;1009
ENDP

AREA ||i.USART_HalfDuplexCmd||, CODE, READONLY, ALIGN=1

USART_HalfDuplexCmd PROC
;;;736 */
;;;737 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L10.12|
;;;738 {
;;;739 /* Check the parameters */
;;;740 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;741 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;742
;;;743 if (NewState != DISABLE)
;;;744 {
;;;745 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3
register */
;;;746 USARTx->CR3 |= CR3_HDSEL_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f0420208 ORR r2,r2,#8
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L10.22|
|L10.12|
;;;747 }
;;;748 else
;;;749 {
;;;750 /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3
register */
;;;751 USARTx->CR3 &= CR3_HDSEL_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f64f73f7 MOV r3,#0xfff7
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L10.22|
;;;752 }
;;;753 }
000016 4770 BX lr
;;;754
ENDP

AREA ||i.USART_ITConfig||, CODE, READONLY, ALIGN=1

 USART_ITConfig PROC
;;;393 */
;;;394 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT,
FunctionalState NewState)
000000 b5f0 PUSH {r4-r7,lr}
;;;395 {
000002 4603 MOV r3,r0
;;;396 uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
000004 2400 MOVS r4,#0
000006 2600 MOVS r6,#0
000008 2500 MOVS r5,#0
;;;397 uint32_t usartxbase = 0x00;
00000a 2000 MOVS r0,#0
;;;398 /* Check the parameters */
;;;399 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;400 assert_param(IS_USART_CONFIG_IT(USART_IT));
;;;401 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;402 /* The CTS interrupt is not available for UART4 and UART5 */
;;;403 if (USART_IT == USART_IT_CTS)
00000c f5a16710 SUB r7,r1,#0x900
000010 3f6a SUBS r7,r7,#0x6a
000012 d100 BNE |L11.22|
;;;404 {
;;;405 assert_param(IS_USART_123_PERIPH(USARTx));
000014 bf00 NOP
|L11.22|
;;;406 }
;;;407
;;;408 usartxbase = (uint32_t)USARTx;
000016 4618 MOV r0,r3
;;;409
;;;410 /* Get the USART register index */
;;;411 usartreg = (((uint8_t)USART_IT) >> 0x05);
000018 f3c11442 UBFX r4,r1,#5,#3
;;;412
;;;413 /* Get the interrupt position */
;;;414 itpos = USART_IT & IT_Mask;
00001c f001061f AND r6,r1,#0x1f
;;;415 itmask = (((uint32_t)0x01) << itpos);
000020 2701 MOVS r7,#1
000022 fa07f506 LSL r5,r7,r6
;;;416
;;;417 if (usartreg == 0x01) /* The IT is in CR1 register */
000026 2c01 CMP r4,#1
000028 d101 BNE |L11.46|
;;;418 {
;;;419 usartxbase += 0x0C;
00002a 300c ADDS r0,r0,#0xc
00002c e004 B |L11.56|
|L11.46|
;;;420 }
;;;421 else if (usartreg == 0x02) /* The IT is in CR2 register */
00002e 2c02 CMP r4,#2
000030 d101 BNE |L11.54|
;;;422 {
;;;423 usartxbase += 0x10;
000032 3010 ADDS r0,r0,#0x10
000034 e000 B |L11.56|
 |L11.54|
;;;424 }
;;;425 else /* The IT is in CR3 register */
;;;426 {
;;;427 usartxbase += 0x14;
000036 3014 ADDS r0,r0,#0x14
|L11.56|
;;;428 }
;;;429 if (NewState != DISABLE)
000038 b11a CBZ r2,|L11.66|
;;;430 {
;;;431 *(__IO uint32_t*)usartxbase |= itmask;
00003a 6807 LDR r7,[r0,#0]
00003c 432f ORRS r7,r7,r5
00003e 6007 STR r7,[r0,#0]
000040 e002 B |L11.72|
|L11.66|
;;;432 }
;;;433 else
;;;434 {
;;;435 *(__IO uint32_t*)usartxbase &= ~itmask;
000042 6807 LDR r7,[r0,#0]
000044 43af BICS r7,r7,r5
000046 6007 STR r7,[r0,#0]
|L11.72|
;;;436 }
;;;437 }
000048 bdf0 POP {r4-r7,pc}
;;;438
ENDP

AREA ||i.USART_Init||, CODE, READONLY, ALIGN=2

USART_Init PROC
;;;181 */
;;;182 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef*
USART_InitStruct)
000000 e92d47f0 PUSH {r4-r10,lr}
;;;183 {
000004 b086 SUB sp,sp,#0x18
000006 4605 MOV r5,r0
000008 460e MOV r6,r1
;;;184 uint32_t tmpreg = 0x00, apbclock = 0x00;
00000a 2400 MOVS r4,#0
00000c 46a2 MOV r10,r4
;;;185 uint32_t integerdivider = 0x00;
00000e bf00 NOP
;;;186 uint32_t fractionaldivider = 0x00;
000010 46a1 MOV r9,r4
;;;187 uint32_t usartxbase = 0;
000012 2700 MOVS r7,#0
;;;188 RCC_ClocksTypeDef RCC_ClocksStatus;
;;;189 /* Check the parameters */
;;;190 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;191 assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
;;;192 assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
;;;193 assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
;;;194 assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
;;;195 assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
;;;196 assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct-
>USART_HardwareFlowControl));
;;;197 /* The hardware flow control is available only for USART1, USART2 and
USART3 */
;;;198 if (USART_InitStruct->USART_HardwareFlowControl !=
USART_HardwareFlowControl_None)
000014 89b0 LDRH r0,[r6,#0xc]
000016 b100 CBZ r0,|L12.26|
;;;199 {
;;;200 assert_param(IS_USART_123_PERIPH(USARTx));
000018 bf00 NOP
|L12.26|
;;;201 }
;;;202
;;;203 usartxbase = (uint32_t)USARTx;
00001a 462f MOV r7,r5
;;;204
;;;205 /*---------------------------- USART CR2 Configuration
-----------------------*/
;;;206 tmpreg = USARTx->CR2;
00001c 8a2c LDRH r4,[r5,#0x10]
;;;207 /* Clear STOP[13:12] bits */
;;;208 tmpreg &= CR2_STOP_CLEAR_Mask;
00001e f64c70ff MOV r0,#0xcfff
000022 4004 ANDS r4,r4,r0
;;;209 /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit
------------*/
;;;210 /* Set STOP[13:12] bits according to USART_StopBits value */
;;;211 tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits;
000024 88f0 LDRH r0,[r6,#6]
000026 4304 ORRS r4,r4,r0
;;;212
;;;213 /* Write to USART CR2 */
;;;214 USARTx->CR2 = (uint16_t)tmpreg;
000028 822c STRH r4,[r5,#0x10]
;;;215
;;;216 /*---------------------------- USART CR1 Configuration
-----------------------*/
;;;217 tmpreg = USARTx->CR1;
00002a 89ac LDRH r4,[r5,#0xc]
;;;218 /* Clear M, PCE, PS, TE and RE bits */
;;;219 tmpreg &= CR1_CLEAR_Mask;
00002c f64e10f3 MOV r0,#0xe9f3
000030 4004 ANDS r4,r4,r0
;;;220 /* Configure the USART Word Length, Parity and mode
----------------------- */
;;;221 /* Set the M bits according to USART_WordLength value */
;;;222 /* Set PCE and PS bits according to USART_Parity value */
;;;223 /* Set TE and RE bits according to USART_Mode value */
;;;224 tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength |
USART_InitStruct->USART_Parity |
000032 88b0 LDRH r0,[r6,#4]
000034 8931 LDRH r1,[r6,#8]
000036 4308 ORRS r0,r0,r1
000038 8971 LDRH r1,[r6,#0xa]
00003a 4308 ORRS r0,r0,r1
00003c 4304 ORRS r4,r4,r0
;;;225 USART_InitStruct->USART_Mode;
;;;226 /* Write to USART CR1 */
;;;227 USARTx->CR1 = (uint16_t)tmpreg;
00003e 81ac STRH r4,[r5,#0xc]
;;;228
;;;229 /*---------------------------- USART CR3 Configuration
-----------------------*/
;;;230 tmpreg = USARTx->CR3;
000040 8aac LDRH r4,[r5,#0x14]
;;;231 /* Clear CTSE and RTSE bits */
;;;232 tmpreg &= CR3_CLEAR_Mask;
000042 f64f40ff MOV r0,#0xfcff
000046 4004 ANDS r4,r4,r0
;;;233 /* Configure the USART HFC
-------------------------------------------------*/
;;;234 /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value
*/
;;;235 tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
000048 89b0 LDRH r0,[r6,#0xc]
00004a 4304 ORRS r4,r4,r0
;;;236 /* Write to USART CR3 */
;;;237 USARTx->CR3 = (uint16_t)tmpreg;
00004c 82ac STRH r4,[r5,#0x14]
;;;238
;;;239 /*---------------------------- USART BRR Configuration
-----------------------*/
;;;240 /* Configure the USART Baud Rate
-------------------------------------------*/
;;;241 RCC_GetClocksFreq(&RCC_ClocksStatus);
00004e a801 ADD r0,sp,#4
000050 f7fffffe BL RCC_GetClocksFreq
;;;242 if (usartxbase == USART1_BASE)
000054 481f LDR r0,|L12.212|
000056 4287 CMP r7,r0
000058 d102 BNE |L12.96|
;;;243 {
;;;244 apbclock = RCC_ClocksStatus.PCLK2_Frequency;
00005a f8dda010 LDR r10,[sp,#0x10]
00005e e001 B |L12.100|
|L12.96|
;;;245 }
;;;246 else
;;;247 {
;;;248 apbclock = RCC_ClocksStatus.PCLK1_Frequency;
000060 f8dda00c LDR r10,[sp,#0xc]
|L12.100|
;;;249 }
;;;250
;;;251 /* Determine the integer part */
;;;252 if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
000064 89a8 LDRH r0,[r5,#0xc]
000066 f4104f00 TST r0,#0x8000
00006a d008 BEQ |L12.126|
;;;253 {
;;;254 /* Integer part computing in case Oversampling mode is 8 Samples */
;;;255 integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct-
>USART_BaudRate)));
00006c eb0a00ca ADD r0,r10,r10,LSL #3
000070 eb00100a ADD r0,r0,r10,LSL #4
000074 6831 LDR r1,[r6,#0]
000076 0049 LSLS r1,r1,#1
000078 fbb0f8f1 UDIV r8,r0,r1
00007c e007 B |L12.142|
|L12.126|
;;;256 }
;;;257 else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
;;;258 {
;;;259 /* Integer part computing in case Oversampling mode is 16 Samples */
;;;260 integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct-
>USART_BaudRate)));
00007e eb0a00ca ADD r0,r10,r10,LSL #3
000082 eb00100a ADD r0,r0,r10,LSL #4
000086 6831 LDR r1,[r6,#0]
000088 0089 LSLS r1,r1,#2
00008a fbb0f8f1 UDIV r8,r0,r1
|L12.142|
;;;261 }
;;;262 tmpreg = (integerdivider / 100) << 4;
00008e 2064 MOVS r0,#0x64
000090 fbb8f0f0 UDIV r0,r8,r0
000094 0104 LSLS r4,r0,#4
;;;263
;;;264 /* Determine the fractional part */
;;;265 fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
000096 0920 LSRS r0,r4,#4
000098 2164 MOVS r1,#0x64
00009a fb018910 MLS r9,r1,r0,r8
;;;266
;;;267 /* Implement the fractional part in the register */
;;;268 if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
00009e 89a8 LDRH r0,[r5,#0xc]
0000a0 f4104f00 TST r0,#0x8000
0000a4 d008 BEQ |L12.184|
;;;269 {
;;;270 tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
0000a6 2032 MOVS r0,#0x32
0000a8 eb0000c9 ADD r0,r0,r9,LSL #3
0000ac fbb0f0f1 UDIV r0,r0,r1
0000b0 f0000007 AND r0,r0,#7
0000b4 4304 ORRS r4,r4,r0
0000b6 e008 B |L12.202|
|L12.184|
;;;271 }
;;;272 else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
;;;273 {
;;;274 tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) &
((uint8_t)0x0F);
0000b8 2032 MOVS r0,#0x32
0000ba eb001009 ADD r0,r0,r9,LSL #4
0000be 2164 MOVS r1,#0x64
0000c0 fbb0f0f1 UDIV r0,r0,r1
0000c4 f000000f AND r0,r0,#0xf
0000c8 4304 ORRS r4,r4,r0
|L12.202|
;;;275 }
;;;276
;;;277 /* Write to USART BRR */
;;;278 USARTx->BRR = (uint16_t)tmpreg;
0000ca 812c STRH r4,[r5,#8]
;;;279 }
0000cc b006 ADD sp,sp,#0x18
0000ce e8bd87f0 POP {r4-r10,pc}
;;;280
ENDP

0000d2 0000 DCW 0x0000

|L12.212|
DCD 0x40013800

AREA ||i.USART_IrDACmd||, CODE, READONLY, ALIGN=1

USART_IrDACmd PROC
;;;842 */
;;;843 void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L13.12|
;;;844 {
;;;845 /* Check the parameters */
;;;846 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;847 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;848
;;;849 if (NewState != DISABLE)
;;;850 {
;;;851 /* Enable the IrDA mode by setting the IREN bit in the CR3 register
*/
;;;852 USARTx->CR3 |= CR3_IREN_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f0420202 ORR r2,r2,#2
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L13.22|
|L13.12|
;;;853 }
;;;854 else
;;;855 {
;;;856 /* Disable the IrDA mode by clearing the IREN bit in the CR3 register
*/
;;;857 USARTx->CR3 &= CR3_IREN_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f64f73fd MOV r3,#0xfffd
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L13.22|
;;;858 }
;;;859 }
000016 4770 BX lr
;;;860
ENDP

AREA ||i.USART_IrDAConfig||, CODE, READONLY, ALIGN=1

USART_IrDAConfig PROC
;;;823 */
;;;824 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode)
000000 8a82 LDRH r2,[r0,#0x14]
;;;825 {
;;;826 /* Check the parameters */
;;;827 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;828 assert_param(IS_USART_IRDA_MODE(USART_IrDAMode));
;;;829
;;;830 USARTx->CR3 &= CR3_IRLP_Mask;
000002 f64f73fb MOV r3,#0xfffb
000006 401a ANDS r2,r2,r3
000008 8282 STRH r2,[r0,#0x14]
;;;831 USARTx->CR3 |= USART_IrDAMode;
00000a 8a82 LDRH r2,[r0,#0x14]
00000c 430a ORRS r2,r2,r1
00000e 8282 STRH r2,[r0,#0x14]
;;;832 }
000010 4770 BX lr
;;;833
ENDP

AREA ||i.USART_LINBreakDetectLengthConfig||, CODE,

READONLY, ALIGN=1

USART_LINBreakDetectLengthConfig PROC
;;;552 */
;;;553 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t
USART_LINBreakDetectLength)
000000 8a02 LDRH r2,[r0,#0x10]
;;;554 {
;;;555 /* Check the parameters */
;;;556 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;557
assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength));
;;;558
;;;559 USARTx->CR2 &= CR2_LBDL_Mask;
000002 f64f73df MOV r3,#0xffdf
000006 401a ANDS r2,r2,r3
000008 8202 STRH r2,[r0,#0x10]
;;;560 USARTx->CR2 |= USART_LINBreakDetectLength;
00000a 8a02 LDRH r2,[r0,#0x10]
00000c 430a ORRS r2,r2,r1
00000e 8202 STRH r2,[r0,#0x10]
;;;561 }
000010 4770 BX lr
;;;562
ENDP

AREA ||i.USART_LINCmd||, CODE, READONLY, ALIGN=1

USART_LINCmd PROC
;;;571 */
;;;572 void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L16.12|
;;;573 {
;;;574 /* Check the parameters */
;;;575 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;576 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;577
;;;578 if (NewState != DISABLE)
;;;579 {
;;;580 /* Enable the LIN mode by setting the LINEN bit in the CR2 register
*/
;;;581 USARTx->CR2 |= CR2_LINEN_Set;
000002 8a02 LDRH r2,[r0,#0x10]
000004 f4424280 ORR r2,r2,#0x4000
000008 8202 STRH r2,[r0,#0x10]
00000a e004 B |L16.22|
|L16.12|
;;;582 }
;;;583 else
;;;584 {
;;;585 /* Disable the LIN mode by clearing the LINEN bit in the CR2 register
*/
;;;586 USARTx->CR2 &= CR2_LINEN_Reset;
00000c 8a02 LDRH r2,[r0,#0x10]
00000e f64b73ff MOV r3,#0xbfff
000012 401a ANDS r2,r2,r3
000014 8202 STRH r2,[r0,#0x10]
|L16.22|
;;;587 }
;;;588 }
000016 4770 BX lr
;;;589
ENDP

AREA ||i.USART_OneBitMethodCmd||, CODE, READONLY, ALIGN=1

USART_OneBitMethodCmd PROC
;;;794 */
;;;795 void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState
NewState)
000000 b121 CBZ r1,|L17.12|
;;;796 {
;;;797 /* Check the parameters */
;;;798 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;799 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;800
;;;801 if (NewState != DISABLE)
;;;802 {
;;;803 /* Enable the one bit method by setting the ONEBITE bit in the CR3
register */
;;;804 USARTx->CR3 |= CR3_ONEBITE_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f4426200 ORR r2,r2,#0x800
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L17.22|
|L17.12|
;;;805 }
;;;806 else
;;;807 {
;;;808 /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3
register */
;;;809 USARTx->CR3 &= CR3_ONEBITE_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f24f73ff MOV r3,#0xf7ff
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L17.22|
;;;810 }
;;;811 }
000016 4770 BX lr
;;;812
ENDP

AREA ||i.USART_OverSampling8Cmd||, CODE, READONLY,

ALIGN=1

USART_OverSampling8Cmd PROC
;;;767 */
;;;768 void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState
NewState)
000000 b121 CBZ r1,|L18.12|
;;;769 {
;;;770 /* Check the parameters */
;;;771 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;772 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;773
;;;774 if (NewState != DISABLE)
;;;775 {
;;;776 /* Enable the 8x Oversampling mode by setting the OVER8 bit in the
CR1 register */
;;;777 USARTx->CR1 |= CR1_OVER8_Set;
000002 8982 LDRH r2,[r0,#0xc]
000004 f4424200 ORR r2,r2,#0x8000
000008 8182 STRH r2,[r0,#0xc]
00000a e003 B |L18.20|
|L18.12|
;;;778 }
;;;779 else
;;;780 {
;;;781 /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the
CR1 register */
;;;782 USARTx->CR1 &= CR1_OVER8_Reset;
00000c 8982 LDRH r2,[r0,#0xc]
00000e f3c2020e UBFX r2,r2,#0,#15
000012 8182 STRH r2,[r0,#0xc]
|L18.20|
;;;783 }
;;;784 }
000014 4770 BX lr
;;;785
ENDP

AREA ||i.USART_ReceiveData||, CODE, READONLY, ALIGN=1

USART_ReceiveData PROC
;;;614 */
;;;615 uint16_t USART_ReceiveData(USART_TypeDef* USARTx)
000000 4601 MOV r1,r0
;;;616 {
;;;617 /* Check the parameters */
;;;618 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;619
;;;620 /* Receive Data */
;;;621 return (uint16_t)(USARTx->DR & (uint16_t)0x01FF);
000002 8888 LDRH r0,[r1,#4]
000004 f3c00008 UBFX r0,r0,#0,#9
;;;622 }
000008 4770 BX lr
;;;623
ENDP

AREA ||i.USART_ReceiverWakeUpCmd||, CODE, READONLY,

ALIGN=1

USART_ReceiverWakeUpCmd PROC
;;;523 */
;;;524 void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState
NewState)
000000 b121 CBZ r1,|L20.12|
;;;525 {
;;;526 /* Check the parameters */
;;;527 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;528 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;529
;;;530 if (NewState != DISABLE)
;;;531 {
;;;532 /* Enable the USART mute mode by setting the RWU bit in the CR1
register */
;;;533 USARTx->CR1 |= CR1_RWU_Set;
000002 8982 LDRH r2,[r0,#0xc]
000004 f0420202 ORR r2,r2,#2
000008 8182 STRH r2,[r0,#0xc]
00000a e004 B |L20.22|
|L20.12|
;;;534 }
;;;535 else
;;;536 {
;;;537 /* Disable the USART mute mode by clearing the RWU bit in the CR1
register */
;;;538 USARTx->CR1 &= CR1_RWU_Reset;
00000c 8982 LDRH r2,[r0,#0xc]
00000e f64f73fd MOV r3,#0xfffd
000012 401a ANDS r2,r2,r3
000014 8182 STRH r2,[r0,#0xc]
|L20.22|
;;;539 }
;;;540 }
000016 4770 BX lr
;;;541
ENDP

AREA ||i.USART_SendBreak||, CODE, READONLY, ALIGN=1

USART_SendBreak PROC
;;;630 */
;;;631 void USART_SendBreak(USART_TypeDef* USARTx)
000000 8981 LDRH r1,[r0,#0xc]
;;;632 {
;;;633 /* Check the parameters */
;;;634 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;635
;;;636 /* Send break characters */
;;;637 USARTx->CR1 |= CR1_SBK_Set;
000002 f0410101 ORR r1,r1,#1
000006 8181 STRH r1,[r0,#0xc]
;;;638 }
000008 4770 BX lr
;;;639
ENDP

AREA ||i.USART_SendData||, CODE, READONLY, ALIGN=1

USART_SendData PROC
;;;597 */
;;;598 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
000000 f3c10208 UBFX r2,r1,#0,#9
;;;599 {
;;;600 /* Check the parameters */
;;;601 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;602 assert_param(IS_USART_DATA(Data));
;;;603
;;;604 /* Transmit Data */
;;;605 USARTx->DR = (Data & (uint16_t)0x01FF);
000004 8082 STRH r2,[r0,#4]
;;;606 }
000006 4770 BX lr
;;;607
ENDP

AREA ||i.USART_SetAddress||, CODE, READONLY, ALIGN=1

USART_SetAddress PROC
;;;481 */
;;;482 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
000000 8a02 LDRH r2,[r0,#0x10]
;;;483 {
;;;484 /* Check the parameters */
;;;485 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;486 assert_param(IS_USART_ADDRESS(USART_Address));
;;;487
;;;488 /* Clear the USART address */
;;;489 USARTx->CR2 &= CR2_Address_Mask;
000002 f64f73f0 MOV r3,#0xfff0
000006 401a ANDS r2,r2,r3
000008 8202 STRH r2,[r0,#0x10]
;;;490 /* Set the USART address node */
;;;491 USARTx->CR2 |= USART_Address;
00000a 8a02 LDRH r2,[r0,#0x10]
00000c 430a ORRS r2,r2,r1
00000e 8202 STRH r2,[r0,#0x10]
;;;492 }
000010 4770 BX lr
;;;493
ENDP

AREA ||i.USART_SetGuardTime||, CODE, READONLY, ALIGN=1

USART_SetGuardTime PROC
;;;646 */
;;;647 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
000000 8b02 LDRH r2,[r0,#0x18]
;;;648 {
;;;649 /* Check the parameters */
;;;650 assert_param(IS_USART_123_PERIPH(USARTx));
;;;651
;;;652 /* Clear the USART Guard time */
;;;653 USARTx->GTPR &= GTPR_LSB_Mask;
000002 b2d2 UXTB r2,r2
000004 8302 STRH r2,[r0,#0x18]
;;;654 /* Set the USART guard time */
;;;655 USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08);
000006 8b02 LDRH r2,[r0,#0x18]
000008 ea422201 ORR r2,r2,r1,LSL #8
00000c 8302 STRH r2,[r0,#0x18]
;;;656 }
00000e 4770 BX lr
;;;657
ENDP

AREA ||i.USART_SetPrescaler||, CODE, READONLY, ALIGN=1

USART_SetPrescaler PROC
;;;666 */
;;;667 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
000000 8b02 LDRH r2,[r0,#0x18]
;;;668 {
;;;669 /* Check the parameters */
;;;670 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;671
;;;672 /* Clear the USART prescaler */
;;;673 USARTx->GTPR &= GTPR_MSB_Mask;
000002 f402427f AND r2,r2,#0xff00
000006 8302 STRH r2,[r0,#0x18]
;;;674 /* Set the USART prescaler */
;;;675 USARTx->GTPR |= USART_Prescaler;
000008 8b02 LDRH r2,[r0,#0x18]
00000a 430a ORRS r2,r2,r1
00000c 8302 STRH r2,[r0,#0x18]
;;;676 }
00000e 4770 BX lr
;;;677
ENDP

AREA ||i.USART_SmartCardCmd||, CODE, READONLY, ALIGN=1

USART_SmartCardCmd PROC
;;;685 */
;;;686 void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L26.12|
;;;687 {
;;;688 /* Check the parameters */
;;;689 assert_param(IS_USART_123_PERIPH(USARTx));
;;;690 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;691 if (NewState != DISABLE)
;;;692 {
;;;693 /* Enable the SC mode by setting the SCEN bit in the CR3 register */
;;;694 USARTx->CR3 |= CR3_SCEN_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f0420220 ORR r2,r2,#0x20
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L26.22|
|L26.12|
;;;695 }
;;;696 else
;;;697 {
;;;698 /* Disable the SC mode by clearing the SCEN bit in the CR3 register
*/
;;;699 USARTx->CR3 &= CR3_SCEN_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f64f73df MOV r3,#0xffdf
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L26.22|
;;;700 }
;;;701 }
000016 4770 BX lr
;;;702
ENDP

AREA ||i.USART_SmartCardNACKCmd||, CODE, READONLY,

ALIGN=1

USART_SmartCardNACKCmd PROC
;;;710 */
;;;711 void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState
NewState)
000000 b121 CBZ r1,|L27.12|
;;;712 {
;;;713 /* Check the parameters */
;;;714 assert_param(IS_USART_123_PERIPH(USARTx));
;;;715 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;716 if (NewState != DISABLE)
;;;717 {
;;;718 /* Enable the NACK transmission by setting the NACK bit in the CR3
register */
;;;719 USARTx->CR3 |= CR3_NACK_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f0420210 ORR r2,r2,#0x10
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L27.22|
|L27.12|
;;;720 }
;;;721 else
;;;722 {
;;;723 /* Disable the NACK transmission by clearing the NACK bit in the CR3
register */
;;;724 USARTx->CR3 &= CR3_NACK_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f64f73ef MOV r3,#0xffef
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L27.22|
;;;725 }
;;;726 }
000016 4770 BX lr
;;;727
ENDP

AREA ||i.USART_StructInit||, CODE, READONLY, ALIGN=1

USART_StructInit PROC
;;;286 */
;;;287 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
000000 f44f5116 MOV r1,#0x2580
;;;288 {
;;;289 /* USART_InitStruct members default value */
;;;290 USART_InitStruct->USART_BaudRate = 9600;
000004 6001 STR r1,[r0,#0]
;;;291 USART_InitStruct->USART_WordLength = USART_WordLength_8b;
000006 2100 MOVS r1,#0
000008 8081 STRH r1,[r0,#4]
;;;292 USART_InitStruct->USART_StopBits = USART_StopBits_1;
00000a 80c1 STRH r1,[r0,#6]
;;;293 USART_InitStruct->USART_Parity = USART_Parity_No ;
00000c 8101 STRH r1,[r0,#8]
;;;294 USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
00000e 210c MOVS r1,#0xc
000010 8141 STRH r1,[r0,#0xa]
;;;295 USART_InitStruct->USART_HardwareFlowControl =
USART_HardwareFlowControl_None;
000012 2100 MOVS r1,#0
000014 8181 STRH r1,[r0,#0xc]
;;;296 }
000016 4770 BX lr
;;;297
ENDP

AREA ||i.USART_WakeUpConfig||, CODE, READONLY, ALIGN=1

USART_WakeUpConfig PROC
;;;504 */
;;;505 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp)
000000 8982 LDRH r2,[r0,#0xc]
;;;506 {
;;;507 /* Check the parameters */
;;;508 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;509 assert_param(IS_USART_WAKEUP(USART_WakeUp));
;;;510
;;;511 USARTx->CR1 &= CR1_WAKE_Mask;
000002 f24f73ff MOV r3,#0xf7ff
000006 401a ANDS r2,r2,r3
000008 8182 STRH r2,[r0,#0xc]
;;;512 USARTx->CR1 |= USART_WakeUp;
00000a 8982 LDRH r2,[r0,#0xc]
00000c 430a ORRS r2,r2,r1
00000e 8182 STRH r2,[r0,#0xc]
;;;513 }
000010 4770 BX lr
;;;514
ENDP
;*** Start embedded assembler ***

#line 1 "..\\..\\Libraries\\STM32F10x_StdPeriph_Driver\\src\\stm32f10x_usart.c"
AREA ||.rev16_text||, CODE, READONLY
THUMB
EXPORT |__asm___17_stm32f10x_usart_c_9565154b____REV16|
#line 114 "..\\..\\Libraries\\CMSIS\\Include\\core_cmInstr.h"
|__asm___17_stm32f10x_usart_c_9565154b____REV16| PROC
#line 115

rev16 r0, r0
bx lr
ENDP
AREA ||.revsh_text||, CODE, READONLY
THUMB
EXPORT |__asm___17_stm32f10x_usart_c_9565154b____REVSH|
#line 128
|__asm___17_stm32f10x_usart_c_9565154b____REVSH| PROC
#line 129

revsh r0, r0
bx lr
ENDP

;*** End embedded assembler ***