This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

Modified Seven-Level Pack U-Cell Inverter for

Photovoltaic Applications
Hani Vahedi, Student, IEEE, Mohammad Sharifzadeh, Student, IEEE, Kamal Al-Haddad, Fellow,

Abstract— This paper proposes a modified configuration of The less components, the lower power losses and the lower
single-phase Pack U-Cell (PUC) multilevel inverter in which the costs. Two most popular topologies are called Cascaded H-
output voltage has higher amplitude than the maximum DC link bridge (CHB) [4] and Neutral Point Clamped (NPC) [5, 6]
value used in the topology as a boost operation. The introduced multilevel inverters which have found some industrial
inverter generates seven-level AC voltage at the output using two
DC links and six semiconductor switches. Comparing to cascaded
applications in high power motor drives [7, 8]. Moreover,
H-bridge and neutral point clamp multilevel inverters, the various topologies have been introduced for different
introduced multilevel inverter produces more voltage levels using applications including single-phase, three-phase, medium
less components. The proposed inverter is used in PV system power and low voltage [9, 10].
where the green power comes from two separate PV panels Recently, penetration of renewable energy resources into the
connected to the DC links through DC-DC converters to draw the electrical grid becomes a matter of importance [11]. Most
maximum power. Due to boost operation of this inverter, two countries have started implementing solar panels to meet the
different PV panels can combine and send their powers to the grid. local energy demands. Renewable energy resources need power
Simulations and experimental tests are conducted to investigate electronics inverters as interface to deliver power to the grid and
the good dynamic performance of the inverter in grid-connected
PV system.
loads. Reducing the environmental pollution by increasing the
efficiency and decreasing power losses of these interfaces are
Index Terms— PV Inverter, Pack U-Cell, Modified Pack U-Cell,
addressed in many reports [12-15]. Single-phase multilevel
PUC5, MPUC5, Power Quality, Renewable Energy Conversion. inverters can play an important role in this area to convert the
DC voltage of the photovoltaic system into the smooth AC
I. INTRODUCTION waveform usable by the loads and grid with less harmonic
filters and high efficiency [16-18]. The seven-level PUC
The power grid has encountered high energy demand since inverter has been proposed for such application with interesting
last decade due to increasing number of consumers as well as advantages like using low number of components as well as
high power industries. Power electronics equipment is replacing generating numerous levels of voltages at the output [19, 20].
conventional bulky transformers significantly because of the The main drawback of PUC inverter is the limited output
developing technology of the semiconductor devices. Power maximum voltage, which is forced to be equal to the maximum
inverters are widely used in renewable energy conversion amplitude of the DC source of the inverter.
systems to deliver green power to the customers. Economic In this paper, authors derived the modified configuration of
costs of power switches make them profitable to manufacture single-phase PUC inverter. The obtained topology is
and allow them to compete in the market. Nowadays, using comparable to the CHB with unequal DC sources in which two
more switches in the inverter structure does not increase the cells are required to produce a seven-level voltage at the output.
price significantly, therefore, two-level conventional converters The introduced structure has less switches than the seven-level
with high power losses and harmonics contents are being CHB inverter while shows the same performance. In this
replaced by low switching frequency multilevel inverters topology, two unequal DC sources (e.g. two different types of
rapidly [1, 2]. PV panels) are used to generate the seven levels of voltages with
Many researches have focused on multilevel inverter low harmonic content and proper voltage sharing between the
development both in topology and control strategy aspects. The levels. The output AC voltage would have higher maximum
main attention is paid to the number of components employed value as sum of the two DC sources amplitudes, which can be a
in such types of inverters [3]. boost operation and remedy to the low voltage application of
the mentioned PUC converter. Authors call this converter as
Manuscript received May 24, 2017; revised November 16, 2017 and Modified Pack U-Cell (MPUC) that is investigated and
February 12, 2018; accepted March 09, 2018. analyzed comprehensively in this research. The PUC converter
This work has been supported by Canada Research Chair CRC-EECPE is described in section II. Afterwards, the modified
(Electric Energy Conversion and Power Electronics) and NSERC Idea to configuration of PUC results in proposing the MPUC is
Innovation grant.
H. Vahedi is with Ossiaco Inc., Montreal, QC, Canada H3C 2G9 (e-mail: explained in section III. Moreover, a comparison between
[email protected]). seven-level NPC, CHB, PUC and MPUC inverters is performed
M. Sharifzadeh and K. Al-Haddad are with Ecole de Technologie Superieure to show the benefits of introduced converter. The proposed PV
(ETS), Montreal, Quebec, Canada ([email protected], interface application has been also explained in that section.
[email protected]).

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

Section IV includes simulation results of the MPUC inverter device as second DC bus and controlling its voltage so that the
connected to the PV panels and grid in order to inject green desired voltage levels would be generated at the output. Hence,
power to the utility. The practical implementation of the seven- a capacitor has been placed in the PUC topology as the
level MPUC inverter has been performed and results are shown dependent second source and some controllers have been
in section V with full discussion. designed to keep the voltage (V2) constant at the one-third level
of the reference voltage (V1). Figure 2 shows the output voltage
II. SEVEN-LEVEL PACK U-CELL INVERTER waveform (Vab) and DC capacitor current obtained by
The PUC converter has been first introduced by Al-Haddad simulation. In this simulation, the source voltage (V1) was
in 2010 [19] and then developed by Vahedi in 2015 [21-23]. As 150V and capacitor voltage was balanced at 50V. The load
it is shown in figure 1, six switches are used to produce voltage included a resistor of 40Ω and an inductor of 20mH. The
states listed in table I. switching frequency and output voltage frequency were 2 KHz
and 60 Hz, respectively.
It is clear that the capacitor current contains positive and
negative parts which mean that the capacitor energy can be
controlled by charging and discharging times and paths in order
to have a constant voltage used in generating desired voltage
levels at the output.
Load Voltage (Vab)

150
AC Load

100
Voltage (V)

50
0
-50
-100
-150
1.3 1.31 1.32 1.33 1.34 1.35 1.36 1.37

DC Capacitor Current
4

2
Current (A)

-2

-4
1.3 1.31 1.32 1.33 1.34 1.35 1.36 1.37
Time (Sec)

Fig. 1. PUC Inverter

Fig. 2. Load voltage and DC capacitor current of PUC inverter topology
TABLE I
ALL VOLTAGE LEVELS GENERATED BY PUC A voltage control based on state space model of the PUC
S1 S2 S3 S4 S5 S6 Vab inverter has been designed and explained in [24] which uses
1 0 0 0 1 1 V1 various state variables including output voltage and current as
1 0 1 0 1 0 V1-V2 well as V1 and V2 to generate the seven-level output voltage and
1 1 0 0 0 1 V2 to fix the capacitor voltage (V2) at desired level. Although the
1 1 1 0 0 0 0 reported controller had good results on the PUC inverter, it has
0 0 0 1 1 1 0 some weaknesses like on start-up condition from 0V, using too
0 0 1 1 1 0 -V2 many feedback sensors and calculation that makes it slow
0 1 0 1 0 1 V2-V1 against fast changes in the system parameters (changes in load
0 1 1 1 0 0 -V1 or DC bus amplitude) or dynamic loads.
Moreover, a hysteresis current controller has been proposed
It is clear from the table I that the switches S4, S5 and S6 works in the literature for 7-level PUC inverter that could fix the
reversely respect to the switches S1, S2 and S3 due to preventing capacitor voltage (V2) at one third of the reference DC bus
the short circuit on DC buses. Although different voltage levels amplitude (V1) and produce seven-level waveform for the load
can be generated by the PUC using different DC voltage voltage [25]. The main drawback of hysteresis current
sources, to achieve the maximum voltage levels at the output controller applied on PUC inverter was the high switching
(Vab), the second DC bus amplitude must be one third of the frequency, which produces audible noises and high power
first DC bus (V1=3V2). Thus, Vab would have seven voltage losses that decreases the efficiency of the device.
levels including 0, ±V2, ±2V2, ±3V2. Eventually, the most important issue in using the PUC
Practical and simulation analysis have shown that this topology as a multilevel inverter is the low voltage output. It is
configuration of the switches causes current flow into the obvious from the output voltage waveform (Vab) of the PUC
second DC bus during the operation, which makes it inevitable inverter illustrated in figure 2 that the maximum amplitude of
to use a series diode as reverse voltage blocking device. The the AC voltage is equal to the DC source amplitude. In another
best solution to overcome this issue is to use a storage energy word, the PUC inverter cannot generate voltage amplitude more

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

than DC source value as summation between two DC links so Two redundant switching states for zero level are existed in
it would not be a proper choice in medium or high power table II that can play a key role in reducing the switching
applications. frequency. Whenever the zero level should be produced at the
output, based on the reference waveform sign and the ongoing
III. SEVEN-LEVEL PACK U-CELL INVERTER transitions between switching states, the modulation technique
WITH BOOST OPERATION will choose the appropriate case between states 4 and 5 to fire
A. Topology and Switching Algorithm the switches with less changes in turn on and turn off modes
results in reducing the switching frequency significantly.
Due to recent development in solar panels and reduced costs, Figure 4 and 5 illustrate the 7-level PWM scheme and
it is easy to use more PVs as DC sources. Therefore, multilevel algorithm respectively. Six carriers’ waves are shifted vertically
inverters employing more DC sources are justified to modulate the reference waveform and generate appropriate
economically. pulses for associate switches based on the PWM algorithm
The PUC inverter has been investigated in section II and it designed with respect to reducing switching losses and
was demonstrated that the output voltage amplitude is not more demonstrated in figure 5.
than DC source value. As a remedy, the MPUC inverter with TABLE II
modified configuration of PUC is proposed. Figure 3 shows the SWITCHING STATES AND OUTPUT VOLTAGE LEVELS GENERATED BY MPUC
MPUC topology, which is able to produce higher voltage values Switching
T1 T2 T3 T4 T5 T6 Vab
than the PUC inverter. State
1 1 0 1 0 1 0 V1+V2
2 1 0 0 0 1 1 V1
3 0 0 1 1 1 0 V2
4 0 0 0 1 1 1 0
5 1 1 1 0 0 0 0
6 1 1 0 0 0 1 -V2
7 0 1 1 1 0 0 -V1
8 0 1 0 1 0 1 V2+V1

Fig. 3. Seven-level MPUC inverter topology

As it is illustrated in figure 3, the second DC source (V2) has -1

been connected in reverse direction compared to PUC inverter Reference Wave Cr1 Cr 2 Cr3 Cr4 Cr 5 Cr 6

shown in figure 1. Consequently, two lower switches (T3 and Fig. 4. Multicarrier PWM for 7-level MPUC inverter
T6) have been reversed to block the normal path through their
diodes. Therefore, the current flow can be blocked or conducted
through these switches properly by the gate pulses. Table II
contains the switching states and output voltage values
associated with 7-level MPUC inverter.
It is noticeable from table II that the maximum voltage level
on the load generated by MPUC inverter is the sum of two DC
sources as V1+V2. Thus, higher voltage amplitude is produced
by the proposed topology. It is clear that seven identical voltage
levels can be generated by MPUC inverter at the output if only
the first DC source is twice the second one in amplitude. It
means, if V1=2V2=2E, hence, the output voltage waveform
includes the following levels: 0, ±E, ±2E, ±3E. Again, it can be
seen that the higher DC voltage has amplitude of 2E, while the
output voltage maximum value is 3E. Fig. 5. Proposed switching algorithm for MPUC inverter with reduced
switching frequency

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

a Lf is
Rf
P&O MPPT
ipv1 Algorithm T1 T4
vpv1
idc1 V1_
+
PV Array 1
a1
2series × 2parallel C1
BP Solar SX3190
DC-DC Boost Converter 1 vs
T2 T5
DC-DC Boost Converter 2
idc2
_ V2 +
PV Array 2 b1
1 Panel
STP270S-24/Vb
vpv2 C2
ipv2
P&O MPPT
Algorithm T3 T6

b
T1 T2 T3 T4 T5 T6
Vref +– PI
Multilevel PWM PLL
1/2 V1 (Figures 4 & 5)
+
+ is θ
V2 is*
+–
–
PI
PI × Sin
+

Fig. 6. PV system applications of MPUC inverter in grid-connected mode of operation with associated controller

signal for the grid current. The PLL is used to have an in-phase
B. Proposed MPUC Inverter Applications
reference waveform with the vs. The designed controller is in
One of the main ideas for MPUC inverter application is in charge of controlling the power flown to the grid by
field of renewable energy conversion where two solar arrays synchronizing grid voltage and current waveforms as well as
with different voltage ratings can be connected to MPUC regulating DC capacitors voltages to have 7-level low THD
inverter as DC sources through boost converters that are voltage waveform, while the P&O MPPT algorithm is
controlled by MPPT (Maximum Power Point Tracking) absorbing maximum power from PV panels.
algorithm. DC voltages of two PV arrays can be added by
MPUC inverter to have required energy at the output. MPUC IV. SIMULATION RESULTS OF GRID-CONNECTED SYSTEM
inverter can be grid-connected or in islanding mode feeding
local loads. Figure 6 shows a plan for PV applications of MPUC In order to show the capability of the MPUC inverter in
inverter in grid-connected mode of operation. delivering power from PV arrays to the grid, a Matlab
On the left side, PV arrays with different voltage ratings from simulation has been performed based on figure 6 with the
various manufacturers are connected to the MPUC inverter implemented controller. PV panels specifications as well as the
through DC/DC boost converters, which are operated by P&O system parameters are listed in Table III.
MPPT algorithm to draw maximum power. The P&O algorithm Multilevel converters help reducing the harmonic
is well described in the literature and comprehensively used by components of the voltage waveform inherently, which affects
the industries [26-28]. The MPUC inverter is able to deliver the current waveform directly. On the other hand, at higher
solar energy to the grid or loads. switching frequency, size of passive components will be
As shown in figure 6, a cascaded controller has been adopted smaller significantly. However, in this work, the switching
to regulate the DC voltages and control the injected current to frequency has been selected low at 2kHz to show that with the
be in-phase with the grid voltage [29]. Two PI controllers are 2.5mH inductor, the THD of the current is still lower than
minimizing DC voltages errors and their output is a reference standard level as an advantage of using multilevel converters.

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

Array type: BP Solar SX3190 Array type: Suntech STP270S-24/Vb

As shown in figure 6, two DC/DC boost converters are used 2 series modules; 2 parallel strings 1 series modules; 1 parallel strings
and operated by P&O MPPT algorithm, which was explained 20
1 kW/m2 1 kW/m2
comprehensively in the literature. The first PV array consists of 8
4 BP Solar SX3190 panels in 2×2 configuration to generate 15 0.75 kW/m2 0.75 kW/m2

Current (A)

Current (A)
48.6V and 760W. The second boost converter is connected to 1 6
10 0.5 kW/m2 0.5 kW/m2
Suntech STP270S-24/Vb panel producing 35V and 270W at the 4
input. The first DC/DC converter average duty cycle is set at 2
0.25 kW/m2
5 0.25 kW/m
0.6 to generate 120V at the upper DC bus (V1) of the MPUC 2
inverter. As well, the second DC/DC converter average duty 0 0
cycle is set to 0.4 to produce 60V at lower DC bus (V2). The 0 20 40 60 0 20 40
Voltage (V) Voltage (V)
cascaded controller has been implemented on the grid-
connected inverter to regulate the DC voltages (V1 and V2) at
desired level (120V and 60V) and inject the unity power factor 800
1 kW/m2 300 1 kW/m2

current with acceptable harmonic contents into the grid. The 0.75 kW/m2
0.75 kW/m2
first loop is considered as voltage control that sends the required 600

Power (W)

Power (W)
200
signal to the second loop for the current control. The final 0.5 kW/m2 0.5 kW/m2
400
reference signal goes to the 6-carrier level shifted PWM block
0.25 kW/m2 100 0.25 kW/m2
to generate the associated switching pulses. Simulations have 200
been performed with data gathered from switches datasheets
and using small resistors instead of connection paths to measure 0
0 20 40 60
0
0 20 40
the voltage, current, power and efficiency close to the real case. Voltage (V) Voltage (V)
Temperature and irradiation for PV panels are assumed as a) b)
normal condition (25°C and 1000W/m2), though the irradiation
Fig. 7. PV Arrays characteristics a) BP Solar SX3190 b) Suntech STP270S-
changes to half and is back to 1000W/m2 at certain points. Solar 24/Vb
panels characteristics are shown in figure 7 and detailed results
are shown in figure 8. As illustrated in figure 8, the voltage of PV array 1 has been
regulated at 48.6V (voltage at MP for two series BP Solar
TABLE III SX3190 panels) and the solar power should be 4×190=760W
PV PANELS SPECS AND SIMULATED SYSTEM PARAMETERS
while the DC converter output power is around 750W at
4 Panels:
BP Solar SX3190
2Series×2Parallel 1000W/m2 irradiation and 370W at 500W/m2 irradiation,
Array Maximum Power (Pmax) 4×190=760 W
respectively. By measuring the efficiency, it is clear that using
Array Voltage at Pmax 2×24.3=48.6 V real parameters in the DC converter makes 1.4% power losses
Array Current at Pmax 2×7.82=15.64 A and the efficiency of the first DC converter is around 98.6%.
Suntech STP270S-24/Vb 1 Panel
The output DC voltage is regulated at 120V as the upper DC
Array Maximum Power (Pmax) 270 W bus reference voltage.
Array Voltage at Pmax 35 V Similarly, for the second PV panel (Suntech STP270S), the
Array Current at Pmax 7.71 A
PV output voltage is at the maximum power point (35V) so the
Grid Voltage 120 V RMS output power should be 270W. The output power of the second
Grid Frequency 60 Hz converter is 264W at 1000W/m2 irradiation and 130W at
Line Inductor (Lf) 2.5 mH
500W/m2 that demonstrates the efficiency in this device is
DC-DC Boost Converter Inductor 0.9 mH around 97.7% same. The lower DC bus voltage is controlled at
DC-DC Boost Converter Switching Frequency 5 kHz 60V successfully.
Inverter Switching Frequency 2 kHz
Afterwards, the power delivered to the grid via the inverter is
around 990W and 490W in 1000 and 500W/m2 irradiation,
respectively. At the lower part of the figure, the power factor
for the grid side voltage and current is shown which is almost
100% and ensures the unity power factor operation of the
proposed inverter and implemented controller. It is clear that
the total efficiency is around 96% for the proposed grid-
connected PV system using MPUC inverter.
It should be mentioned again that using two different PV
arrays with different output voltage is facilitated using the
MPUC inverter. Moreover, the output voltage of the inverter is
the sum of two lower voltages, which reduces the voltage
ratings of the devices.

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

Voltage of PV Array 1 at MPP

60 200
50
V

40

v (V)
Maximum Power of PV Array 1 at the output of DC/DC Converter
800 0

s
600
W

400
Upper DC Bus Voltage (V1)
140 -200
120
V

100
Voltage of PV Array 2 at MPP
50 10
40
V

30

i (A)
20 0
Maximum Power of PV Array 2 at the output of DC/DC Converter
300

s
W

200 -10
100
Lower DC Bus Voltage (V2)
80
60
V

200
40
Power Injected to the Grid at AC Side
1000
W

ab
500 V 0
Power Factor at AC Side
101
100
%

99 -200
2.95 3 3.05 3.1 3.15 3.2 3.25
0 1 2 3 4 5 6 7 8 9 Time (s)
Time (s)
Fig. 9. AC side voltage and current with unity power factor and 7-level
Fig. 8. Voltage, Power and power factor results of grid-connected MPUC voltage waveform of MPUC
inverter with two different PV arrays. Irradiation changed from 1000 to
500W/m2 from 3rd second to 6th second

Figure 9 also depicts the grid side voltage and current during
the first transient at 3rd second. Seven-level voltage waveform
of the MPUC inverter as well as low harmonic grid current is
observable in this figure. The seven-level voltage waveform
reduces the current harmonics, so the AC link inductor can be
small which has been chosen as 2.5mH in this work. The
harmonic spectrum of the grid current is shown in figure 10
which is obvious that the injected current has acceptable
harmonic content less than 5% defined by IEEE STD 519.
Moreover, it is clear that the highest amplitude between
harmonic orders except the fundamental is on 2 kHz, which is
the switching frequency of the inverter devices.
Table IV summarizes some results obtained from
Fig. 10. Harmonic Analysis of the grid current injected by inverter from the
simulations. PVs.
TABLE IV
SUMMARIZED RESULTS OF SIMULATIONS
Output Power of Upper DC-DC Converter 750 W
V. EXPERIMENTAL RESULTS AND DISCUSSION
Efficiency of Upper DC-DC Converter 98.6% Six IGBT switches (600V, 30A, FGH30N60LSD) associated
Output Power of Lower DC-DC Converter 264 W with designed snubber circuits have been used in building the
Efficiency of Upper DC-DC Converter 97.7% MPUC inverter. The standard DC boost converter with one
Output Power of Inverter 990 W active switch has been used in the prototype. The designed
Efficiency of Inverter 97.6% switching algorithm has been implemented on dSpace 1103
Total Efficiency of the system 96.11% real-time controller to generate switching pulses and fire the
THD% of the Output AC Current 2.5% switches through gate drivers. All devices used in practical
works are shown in figure 11. Two DC sources have been
connected to the inverter DC buses through two separate DC-
DC boost converters with fixed duty cycles (0.57 for the upper
one and 0.35 for lower one) to emulate the PV arrays operation.
Then, the MPUC inverter has been connected to the grid via the
line inductor (2.5mH) as shown in figure 1. Due to using DC
sources, the MPPT algorithm is not implementable however,

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

the voltage and current control have been adjusted on the inverter capacitors. These voltages should be controlled through
MPUC inverter to regulate DC capacitors voltages and grid interactions by the implemented controller as explained in
synchronize the injected current with the grid voltage in order the paper. The DC voltages references (V1 and V2) were set to
to ensure power factor correction. All practical tests parameters 100V and 50V for upper and lower capacitors of the MPUC
have been listed in Table V. inverter, respectively. The active power is delivered from DC
Six IGBT switches (600V, 30A, FGH30N60LSD) associated sources to the grid, which has a 100V RMS voltage.
with designed snubber circuits have been used in building the Figure 12 and 13 demonstrate the results when two isolated
MPUC inverter. The standard DC boost converter with one DC sources are connected to two boost converters while these
active switch has been used in the prototype. The designed dc-dc converters are connected to two DC buses of the MPUC
switching algorithm has been implemented on dSpace 1103 inverter. It is clear that the inverter is injecting active power to
real-time controller to generate switching pulses and fire the the grid and regulating the capacitors voltages at 100V and 50V
switches through gate drivers. All devices used in practical successfully. It can be seen that the voltage ripple is less than
works are shown in figure 11. Two DC sources have been 5% for both capacitors.
connected to the inverter DC buses through two separate DC- V1
DC boost converters with fixed duty cycles (0.57 for the upper
one and 0.35 for lower one) to emulate the PV arrays operation.
Then, the MPUC inverter has been connected to the grid via the
line inductor (2.5mH) as shown in figure 1. Due to using DC V2
sources, the MPPT algorithm is not implementable however,
the voltage and current control have been adjusted on the
MPUC inverter to regulate DC capacitors voltages and vs
synchronize the injected current with the grid voltage in order
to ensure power factor correction. All practical tests parameters
have been listed in Table V.
is

DC Source 2
DC Source 1

dSpace 1103 Fig. 12. Regulated DC capacitors voltages at 100V and 50V respectively as
Boost Converter 1&2
well as grid side voltage and current waveforms at unity power factor

Sensors V1

Vab
MPUC Inverter

Grid

Fig. 11. Test setup of the proposed 7-level MPUC inverter

vs
TABLE V
EXPERIMENTAL SETUP PARAMETERS
Grid Voltage 100 V RMS is
Grid Frequency 60 Hz
Line Inductor (Lf) 2.5 mH
DC-DC Boost Converters Inductors 0.9 mH
DC-DC Boost Converters Switching Frequency 5 kHz Fig. 13. 7-level voltage waveform of the MPUC inverter during experimental
Inverter Switching Frequency 2 kHz tests
DC-DC Boost Converter 1 Input Voltage (Vin1) 40 V
As depicted in figure 13, The 7-level waveform has been
DC-DC Boost Converter 2 Input Voltage (Vin2) 30 V
generated at the output of the MPUC inverter due to regulating
DC voltages at desired references where V2 equals to half of V1.
Being limited to DC sources voltage/current ratings, the first Grid voltage and current waveforms prove the unity power
DC source amplitude was 40V and the second one generates factor operation of the inverter.
30V. Therefore, the output voltage of the first boost converter The last figure of this test is from the power analyser that
would have been 93V since the lower DC boost converter was shows the RMS and THD values of grid voltage and current,
almost 46V. Duty cycles were chosen different to the simulated which ensures the low harmonic contents of the injected current
systems to have some lower DC voltage levels at the MPUC

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

while using a small inductive filter as 2.5mH between inverter REFERENCES

and the grid and switching frequency is set at 2kHz..
[1] B. Singh, A. Chandra, and K. Al-Haddad, Power Quality: Problems
and Mitigation Techniques: John Wiley & Sons, 2014.
[2] I. Gowaid, G. Adam, A. Massoud, S. Ahmed, and B. Williams,
"Hybrid and Modular Multilevel Converter Designs for Isolated
HVDC-DC Converters," IEEE Journal Emerg. and Select. Topics in
Power Electron., vol. PP, no. 99, p. 1, 2017.
[3] H. Vahedi, K. Al-Haddad, Y. Ounejjar, and K. Addoweesh, "Crossover
Switches Cell (CSC): A New Multilevel Inverter Topology with
Maximum Voltage Levels and Minimum DC Sources," in IECON
2013-39th Annual Conference on IEEE Industrial Electronics Society,
Austria, 2013, pp. 54-59.
[4] P. W. Hammond, "A new approach to enhance power quality for
medium voltage drives," in Petroleum and Chemical Industry
Conference, 1995. Record of Conference Papers., Industry
Applications Society 42nd Annual, 1995, pp. 231-235.
[5] A. Nabae, I. Takahashi, and H. Akagi, "A new neutral-point-clamped
PWM inverter," IEEE Trans. Ind. Applications, no. 5, pp. 518-523,
Fig. 14. Synchronized AC voltage and current waveforms with calculated 1981.
RMS and THD% values. [6] M. Sharifzadeh, H. Vahedi, A. Sheikholeslami, P.-A. Labbé, and K.
Al-Haddad, "Hybrid SHM-SHE Modulation Technique for Four-Leg
As a summary to mention the advantages of the MPUC NPC Inverter with DC Capacitors Self-Voltage-Balancing," IEEE
topology, it can be said that two different PV Panels with Trans. Ind. Electron., vol. 62, no. 8, pp. 4890-4899, 2015.
[7] F. Sebaali, H. Vahedi, H. Y. Kanaan, N. Moubayed, and K. Al-Haddad,
different output voltage ratings can be used at DC links with "Sliding Mode Fixed Frequency Current Controller Designed for Grid-
associated DC converters. Then the MPUC inverter is able to Connected NPC Inverter," IEEE Journal Emerg. and Select. Topics in
add up these two DC voltages and generate 7-level voltage at Power Electron., vol. 4, no. 4, pp. 1397-1405, 2016.
[8] M. Sharifzadeh, H. Vahedi, R. Portillo, M. Khenar, A. Sheikholeslami,
the output while summing up all PVs power and delivering to L. G. Franquelo, et al., "Hybrid SHM-SHE Pulse Amplitude
the grid with high power factor. A high efficiency will be Modulation for High Power Four-Leg Inverter," IEEE Trans. Ind.
achieved due to low number of switches used in the MPUC Electron., vol. 63, no. 11, pp. 7234-7242, 2016.
configuration, the low switching frequency (2kHz) and low [9] H. Abu-Rub, J. Holtz, J. Rodriguez, and G. Baoming, "Medium-
voltage multilevel converters—State of the art, challenges, and
harmonic content because of 7-level quasi-sine wave voltage. requirements in industrial applications," IEEE Trans. Ind. Electron.,
The main limitation of such configuration is the fact that vol. 57, no. 8, pp. 2581-2596, 2010.
unequal shading on PV panels may deteriorate the power [10] B. Fernandes, "A Fault-Tolerant Single-Phase Grid-Connected
Inverter Topology with Enhanced Reliability for Solar PV
balance between two DC links and consequently the converter Applications," IEEE Journal Emerg. and Select. Topics in Power
will lose the voltage control, which affects the current control Electron., vol. 5, no. 3, pp. 1254-1262, 2017.
loop directly. Therefore, future works would be devoted to [11] R. Kumar and B. Singh, "Single Stage Solar PV Fed Brushless DC
Motor Driven Water Pump," IEEE Journal of Emerging and Selected
power balance studies of the proposed configuration to better Topics in Power Electronics, vol. 5, no. 3, pp. 1377-1385, 2017.
utilize and combine different PV panels at DC links of one [12] Enerdata. Global Energy Statistical Yearbook 2015 [Online].
inverter. Available: http://yearbook.enerdata.net/
[13] J. A. Y. Poissant; and J. Hiscock;, "National Survey Report of PV
Power Application in Canada," INTERNATIONAL ENERGY
VI. CONCLUSION AGENCY2012.
[14] N. Kumar, T. K. Saha, and J. Dey, "Sliding-mode control of PWM dual
In this paper a modified multilevel inverter topology has been
inverter-based grid-connected PV system: modeling and performance
presented. The proposed MPUC inverter can generate 7-level analysis," IEEE Journal Emerg. and Select. Topics in Power Electron.,
voltage waveform at the output with low harmonic contents. vol. 4, no. 2, pp. 435-444, 2016.
Unlike the reported PUC topology, the 7-level MPUC inverter [15] H. Vahedi, A. Shojaei, L.-A. Dessaint, and K. Al-Haddad, "Reduced
DC Link Voltage Active Power Filter Using Modified PUC5
is capable to produce voltage levels more than the DC sources Converter," IEEE Trans. Power Electron., vol. 33, no. 2, pp. 943-947,
used in the structure. It can sum up the DC buses amplitudes to 2018.
deliver more power to the output. The associated switching [16] S. Daher, J. Schmid, and F. L. Antunes, "Multilevel inverter topologies
for stand-alone PV systems," IEEE Trans. Ind. Electron., vol. 55, no.
algorithm has been designed and implemented on the 7, pp. 2703-2712, 2008.
introduced MPUC topology with reduced switching frequency [17] H. Nademi, A. Das, R. Burgos, and L. E. Norum, "A new circuit
aspect. Moreover, photovoltaic application has been targeted performance of modular multilevel inverter suitable for photovoltaic
conversion plants," IEEE Journal Emerg. and Select. Topics in Power
for this inverter to deliver power from PV panels with different Electron., vol. 4, no. 2, pp. 393-404, 2016.
voltage/current rating to grid. In this regard, results have been [18] J. T. Hawke, H. S. Krishnamoorthy, and P. N. Enjeti, "A family of new
shown to validate the acceptable voltage regulation and current multiport power-sharing converter topologies for large grid-connected
controlling of the grid-connected inverter as well as the fuel cells," IEEE Journal Emerg. and Select. Topics in Power
Electron., vol. 2, no. 4, pp. 962-971, 2014.
implemented P&O MPPT algorithm. [19] K. Al-Haddad, Y. Ounejjar, and L. A. Gregoire, "Multilevel Electric
Power Converter," US Patent 20110280052, 2011.
[20] M. Trabelsi, S. Bayhan, K. A. Ghazi, H. Abu-Rub, and L. Ben-Brahim,
"Finite-control-set model predictive control for grid-connected

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/JESTPE.2018.2821663, IEEE
Journal of Emerging and Selected Topics in Power Electronics

packed-U-cells multilevel inverter," IEEE Trans. Ind. Electron., vol. Mohammad Sharifzadeh (S’16) was born in Sari, Iran
63, no. 11, pp. 7286-7295, 2016. in 1989. He received the B.Sc. and M.Sc. degrees in
[21] H. Vahedi and K. Al-Haddad, "METHOD AND SYSTEM FOR power electrical engineering from Babol Noshirvani
OPERATING A MULTILEVEL INVERTER," US Patent University of Technology (NIT), Babol, Iran in 2012,
20160126862, 2015. and 2015, respectively. He is currently pursuing his
[22] H. Vahedi, P. Labbe, and K. Al-Haddad, "Sensor-Less Five-Level PhD in power electrical engineering at the École de
Packed U-Cell (PUC5) Inverter Operating in Stand-Alone and Grid- Technologie Superieure (ÉTS), University of Quebec,
Connected Modes," IEEE Trans. Ind. Informat., vol. 12, no. 1, pp. 361- in Montreal, Canada, as a member of Groupe de
370, 2016. Recherche en Électronique de Puissance et Commande
[23] H. Vahedi and K. Al-Haddad, "Real-Time Implementation of a Seven- Industrielle (GRÉPCI).
Level Packed U-Cell Inverter with a Low-Switching-Frequency His research interests include power electronics multilevel converters;
Voltage Regulator," IEEE Trans. Power Electron., vol. 31, no. 8, pp. topologies, switching techniques particullary Selective Harmonic
5967-5973, 2016. Elimination/Mitigation techniques and advanced control of multilevel voltage
[24] Y. Ounejjar, K. Al-Haddad, and L. A. Grégoire, "Packed U cells source inverters in grid connected applications as well as optimization methods
multilevel converter topology: theoretical study and experimental applications in power system.
validation," IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1294-1306,
2011.
[25] Y. Ounejjar, K. Al-Haddad, and L. A. Dessaint, "A Novel Six-Band
Hysteresis Control for the Packed U Cells Seven-Level Converter: Kamal Al-Haddad (S’82-M’88-SM’92-F’07)
Experimental Validation," IEEE Trans. Ind. Electron., vol. 59, no. 10, received the B.Sc.A. and M.Sc.A. degrees from the
pp. 3808-3816, 2012. University of Québec à Trois-Rivières, Canada, in
[26] M. A. De Brito, L. P. Sampaio, G. Luigi, and C. Canesin, 1982 and 1984, respectively, and the Ph.D. degree
"Comparative analysis of MPPT techniques for PV applications," in from the Institute National Polythechnique, Toulouse,
International Conference on Clean Electrical Power, ICCEP, 2011, France, in 1988. Since June 1990, he has been a
pp. 99-104.
Professor with the Electrical Engineering Department,
[27] M. A. Elgendy, B. Zahawi, and D. J. Atkinson, "Assessment of perturb
and observe MPPT algorithm implementation techniques for PV École de Technologie Supérieure (ETS), Montreal,
pumping applications," IEEE Trans. Sustain. Energy, vol. 3, no. 1, pp. QC, where he has been the holder of the Canada Research Chair in Electric
21-33, 2012. Energy Conversion and Power Electronics since 2002. He has supervised more
[28] M. A. G. De Brito, L. Galotto, L. P. Sampaio, G. de Azevedo e Melo, than 100 Ph.D. and M.Sc.A. students working in the field of power electronics.
and C. A. Canesin, "Evaluation of the main MPPT techniques for He is a Consultant and has established very solid link with many Canadian
photovoltaic applications," IEEE Trans. Ind. Electron., vol. 60, no. 3,
industries working in the field of power electronics, electric transportation,
pp. 1156-1167, 2013.
[29] H. Vahedi and K. Al-Haddad, "A Novel Multilevel Multi-Output aeronautics, and telecommunications. He has coauthored more than 400
Bidirectional Active Buck PFC Rectifier," IEEE Trans. Ind. Electron., transactions and conference papers. His fields of interest are in high efficient
vol. 63, no. 9, pp. 5442 - 5450, 2016. static power converters, harmonics and reactive power control using hybrid
filters, switch mode and resonant converters including the modeling, control,
and development of prototypes for various industrial applications in electric
traction, renewable energy, power supplies for drives, telecommunication, etc.
Hani Vahedi (S’10) was born in Sari, Iran, in 1986. Prof. Al-Haddad is a fellow member of the Canadian Academy of Engineering.
He received his B.Sc. and M.Sc. degrees in Power
He is IEEE IES President Elect 2014-2015, Associate editor of the Transactions
electrical engineering from K. N. Toosi University of
Technology (KNTU), Tehran, IRAN in 2008 and on Industrial Informatics, IES Distinguished Lecturer and recipient of the Dr.-
Babol University of Technology, Babol, IRAN in Ing. Eugene Mittelmann Achievement Award.
2011, respectively. He received his PhD with honor
from École de Technologie Superieure (ÉTS),
University of Quebec, in Montreal, Canada in 2016.
He is the recipient of Best PhD Thesis Award for the
academic year of 2016-2017 from ETS. He has
published more than 60 technical papers in IEEE conferences and Transactions.
He has received best paper or presentation awards as well as travel assistance
in numerous international conferences. He is an active member of IEEE
Industrial Electronics Society (IES) and its Student & Young Professionals
(S&YP) committee. He is a co-chair of special sessions, co-organizer of S&YP
Forum and co-chair of 3M video session in IES conferences. He holds 1 patent
and transferred that technology to the industry. Currently, he is a power
electronics designer at Ossiaco Inc, Montreal, Canada.
His research interests include power electronics multilevel converters topology,
control and modulation techniques, power quality, active power filter, and their
applications into smart grid, renewable energy conversion, UPS, battery
chargers and electric vehicles.

2168-6777 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.