ICs for TV

AN5192K
Single chip IC with I2C bus Interface for PAL/NTSC color TV system

■ Overview Unit: mm
The AN5192K is a single chip IC for PAL/
NTSC system color TV. TV for multiple systems
58.4±0.3
can be easily designed by the use of this IC in com- 64 33
bination with SECAM demodulation IC (The AN

17.0±0.2
5637).

■ Features 1 32
• Free of mechanical adjustment

3.85±0.2
Built-in I2C bus interface eliminates the need for
mechanical adjustment
• Rationalization of external components

5.2 max.
0.7 min.
19.05

(3.3)
(1.641) 1.778 (1.0) 0.5+0.1 0.25+0.1
–0.05
Built-in chroma trap and BPF reduce the external –0.05

Seating plane
components 0° to 15°

■ Applications SDIP064-P-0750B
• TV, TV with VCR

1
2
AN5192K

■ Block Diagram
Ext. Audio

DET Out
Internal Video In
APC
Video Out
IF AGC
SIF In

VCC2

-(B-Y)In
SCP
-(R-Y)Out
-(B-Y)Out
SECAM
V Out
50/60Hz
H Out
HOSC
AFC1
AFC2
FBP In
GND(VCJ)
VCC3(VCJ)
VOSC
APC1

Y In
BL DET

-(R-Y)In 64
63
62
61
60
59
58
57
56
X-ray 55
54
53
52
51
50
49
C In 48
47
Hor. Sync. 46
Ver. Sync. 45
Ver. Clamp 44
43
42
41
40
33

39
38
37
36
35
34

*7-bit Shut
PN/S Ver. HVCO Hor. SCP HBLK VCO 7 dB
Saturation Down CV
SW out Reg. Hor.
*1-bit AFC1 sync.sep clamp *7-bit
*1-bit Limiter
APC1
Chroma R-Y B-Y Hor. VSW
Ver. AFC2 BGP Trap
contrast demod demod Count Hor. *1-bit
Count Down SIF
+/− Down *4-bit Lock det. Ver.
*2-bit *6-bit detect
(50 Hz/60 Hz) sync.sep
G-Y Phase
Sharpness
Killer 50 Hz/60 Hz
Shift
Ident detect *7-bit VCO
LPF Y
*8-bit HVBLK
*1-bit contrast
Brightness De-
APC ACC APC2 AFT
1H System emphasis
det. FF SW Black *9-bit
B-Y Tint expansion *1-bit
clamp *7-bit (Service) Level
Chroma SW Pre-amp.
ACC NTSC adjust *4-bit
CW amp. BPF Y
amp. *1-bit ASW
G-Y Generate *1-bit clamp VIF 1F
clamp Detect AGC
DAC SW
*1-bit
R-Y Out Out
R G B
clamp *1-bit *Drive 8-bit
Drive Cut Off Drive IF RF
Chroma *Cut Off 9-bit I2C Bus
Cut Off (8-bit) Cut Off amp. AGC
VCO YS Interface
Pulse *7-bit

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2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

YS
R In
B In

G In
SCL

APC
ACL
SDA

VCC1

Killer
R Out
B Out

G Out
VIF In 1
VIF In 2

R Clamp
B Clamp

G Clamp
AFT Out

VCC3 (IF)
GND (IF)

4.43 MHz
3.58 MHz

Killer Out
Ext. Video

Lock DET
Audio Out

Spot Killer
Decoupling

GND (RGB)
De-emphasis

RF AGC Out
ICs for TV
ICs for TV AN5192K

■ Pin Description
Pin No. Description Pin No. Description
1 (R-Y) Clamp 33 External Audio Input
2 (G-Y) Clamp 34 SIF Input/DAC Output
3 (B-Y) Clamp 35 IF AGC Filter
4 Killer Filter 36 Video Output
5 Killer Output 37 SIF APC Filter
6 Chroma APC Filter 38 Internal Video Input
7 Chroma VCO (4.43 MHz) 39 VIF Detect Output
8 Chroma VCO (3.58 MHz) 40 VIF APC1 Filter
9 Spot Killer 41 VIF VCO (fP/2)
10 Ys Input (Fast blanking) 42 Black Level Det./Blank off SW
11 External R Input 43 Y Input
12 External G Input 44 Ver.Sync.Clamp
13 External B Input 45 Ver.Sync.Input
14 VCC1 46 Hor.Sync.Input
15 R Output 47 VCC3-2 (Chroma/Jungle/DAC)
16 G Output 48 Chroma Input/Black Expansion Start
17 B Output 49 GND (Video/Chroma/Jungle)
18 Hor.Lock Detect 50 FBP Input
19 GND (RGB/I2C/DAC) 51 VCC2 (Hor.Stability Supply)
20 ACL 52 AFC2 Filter
21 SDA 53 AFC1 Filter
22 SCL 54 Hor.VCO (32 fH)
23 VCC3-1 (VIF/SIF) 55 X-ray Protection Input
24 VIF Input 1 56 Hor.Pulse Output
25 VIF Input 2 57 50 Hz/60 Hz Detect Output
26 GND (VIF/SIF) 58 Ver. Pulse Output
27 RF AGC Output 59 SECAM Interface
28 Audio Output 60 -(B-Y) Output
29 De-emphasis 61 -(R-Y) Output
30 AFT Output 62 Sandcastle Pulse Output
31 External Video Input 63 -(B-Y) Input
32 DC Decoupleling Filter 64 -(R-Y) Input

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AN5192K ICs for TV

■ Absolute Maximum Ratings

Parameter Symbol Rating Unit
Supply voltage VCC VCC1 (14) 10.5 V
VCC3 (23, 47) 6.0
Supply current ICC I14 77 mA
I23+47 119
I51 27
Power dissipation *2 PD 1 372 mW
Operating ambient temperature *1 Topr −20 to +70 °C
Storage temperature *1 Tstg −55 to +150 °C
Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2: The power dissipation shown is the value for Ta = 70°C.

■ Recommended Operating Range

Parameter Symbol Range Unit
Supply voltage VCC1 8.1 to 9.9 V
Supply voltage VCC3 4.5 to 5.5 V
Supply current I51 10 to 25 mA

■ Electrical Characteristics at Ta = 25°C

Parameter Symbol Conditions Min Typ Max Unit
Power supply (DAC Data are typical)
Supply current 1 I14 Current at V14 = 9 V 44 55 66 mA
Supply current 2 I23 Current at V23 = 5 V 8 11 14 mA
Supply current 3 I47 Current at V47 = 5 V 56 71 85 mA
Stabilized power supply voltage V51 Voltage at I51 = 15 mA 5.8 6.5 7.2 V
Stabilized power supply current I51 Current at V51 = 5 V 2 5 7 mA
Stabilized power supply input R51 DC measurement 1 5 10 Ω
resistance Gradient between I51 = 10 mA and
25 mA
VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical)
Video detection output (typ.) VPO Modulation m = 87.5% 1.75 2.1 2.5 V[p-p]
Data 0A = 88
Video detection output (max.) VPOmax Data 0A = F8 2.15 2.6 3.3 V[p-p]
Video detection output (min.) VPOmin Data 0A = 08 1.1 1.6 2.0 V[p-p]
Video detection output f characteristics fPC Frequency to become −3 dB for 1 MHz 5.5 8 12 MHz
Sync. peak value voltage VSP Sync. peak voltage in VPO measurement 1.6 2.0 2.4 V
APC pull-in range (high) fPPH High band side pull-in range 1.0 2.0  MHz
(Difference from fP = 38.9 MHz)

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ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

Parameter Symbol Conditions Min Typ Max Unit
VIF circuit (continued) (Typical input fP = 38.9 MHz, VIN = 90 dBµ, DAC Data are typical)
APC pull-in range (low) fPPL Low band side pull-in range  −2.0 −1.0 MHz
(Difference from fP = 38.9 MHz)
RF AGC delay point adjusting range ∆VRFDP Input to become delay point (V27 = 75  95 dBµ
approx. 6.5 V) at Data 0C = 00 to 7F
VCO free-running frequency ∆fP Dispersion without input VIN, −1.2 0 1.2 MHz
V36 (IF AGC) = 0 V (Measurement
of difference from 38.9 MHz)
RF AGC maximum sink current IRFmax Maximum current IC can sink when 1.5 3.0  mA
pin 27 is low
RF AGC minimum sink current IRFmin IC leakage current at which pin 27 −50 0 50 µA
is high
AFT discrimination sensitivity µAFT Df = ±25 kHz 40 57 75 mV/kHz
AFT center voltage VAFT V30 without input VIN 4.0 4.5 5.0 V
AFT maximum output voltage VAFTmax V30 at f = fP − 500 kHz 7.8 8.1 8.7 V
AFT minimum output voltage VAFTmin V30 at f = fP + 500 kHz 0.3 0.8 1.0 V
Detection output resistance RO39 DC measurement 70 120 170 Ω
External mode output DC voltage V39EXT Output DC voltage in AV SW 0.5 1.0 1.8 V
external mode (04 − D6 = 1)
SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ)
Audio detection output (PAL) VSOP ∆f = ±50 kHz 480 600 720 mV[rms]
0D − D7 = 0, R237 = 560 kΩ
Audio detection output (NTSC/PAL) RSN/P ∆f = ±25 kHz, R237 = 560 kΩ −2.5 − 0.5 1.5 dB
0D − D7 = 1, ratio to PAL
Audio detection output linearity ∆VSOP Ratio of at fS = 6.0 MHz to 6.5 MHz, −2.5 0 2.5 dB
and to 5.5 MHz (270 kΩ addition
between pin 37 and VCC1)
SIF pull-in range (PAL) fSPP PAL mode (0D − D7 = 0) pull-in 5.7  6.8 MHz
range R237 = 560 kΩ
SIF pull-in range (NTSC) fSPN NTSC mode (0D − D7 = 1) pull-in range 4.2  4.8 MHz
range R237 = 560 kΩ
SIF pull-in range (5.5 MHz) fSP5.5 PAL mode (0D − D7 = 0) 5.2  5.8 MHz
270 kΩ addition between pin 37 and VCC1
SIF input resistance RI34 DC measurement 8 10 12 kΩ
De-emphasis pin output resistance (PAL) R29P Impedance of pin 29 at PAL 32 40 48 kΩ
De-emphasis pin output resistance (NTSC) R29N Impedance of pin 29 at NTSC 48 60 72 kΩ
AV SW circuit
Video SW voltage gain GVSW f = 1 MHz, VIN = 1 V[p-p] 6.2 7.2 8.2 dB
Video SW f characteristics fVSW Frequency to become −3 dB from f = 1 MHz 10   MHz

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AN5192K ICs for TV

■ Electrical Characteristics at Ta = 25°C (continued)

Parameter Symbol Conditions Min Typ Max Unit
AV SW circuit (continued)
Video SW external input pin voltage V31 DC measurement 1.7 2.0 2.3 V
Video SW external output DC voltage V36E DC measurement Data 04 − D6 = 1 4.2 4.8 5.4 V
Video SW external input resistance RI31 DC measurement 44 56 68 kΩ
Video SW output resistance RO36 DC measurement 100 140 180 Ω
Audio SW voltage gain GASW Data 04 − D6 = 1 (Outside) −1 0 1 dB
f = 400 Hz, VIN = 1 V[p-p]
Audio SW input pin voltage V33 DC measurement 3.7 4.2 4.7 V
Audio SW input output DC voltage V28 DC measurement 3.7 4.2 4.7 V
Audio SW input resistance RI31 DC measurement 61 72 83 kΩ
Audio SW output resistance RO28 DC measurement 200 400 600 Ω
Video SW internal clamp pin voltage V38 DC measurement 1.3 1.6 1.9 V
Video SW internal output DC voltage V36I DC measurement, Data 04 − D6 = 0 3.1 3.7 4.3 V
Video signal processing circuit (In the following test conditions, the measurements are made with input 0.6 V[p-p]
(VWB = 0.42 V[0-p]) stair-step, G-out.)
Video output (typ.) VYO Data 03 = 40 (typ.) (Contrast) 1.65 2.1 2.55 V[p-p]
Video output (max.) VYOmax Data 03 = 7F (max.) 3.6 4.5 5.35 V[p-p]
Video output (min.) VYOmin Data 03 = 00 (min.) 0.07 0.25 0.5 V[p-p]
Contrast variable range YCmax/min 03 = 7F 20 25 33 dB
03 = 00
Video frequency characteristics fYC Data 0E − D1 = 1(Trap Off) 5.5 6.8  MHz
Data 04 = 00 (Sharpness)
Frequency to become −3 dB from
f = 0.2 MHz
Picture quality variable range YSmax/min 04 = 3F f = 3.8MHz 9 13 17 dB
04 = 00 Data 0E − D1 = 1
Pedestal level (typ.) VPED Data 02 = 80 (typ.) (Brightness) 1.9 2.5 3.1 V
Pedestal level variable width ∆VPED Difference between Data 02 = 00 and FF 2.0 2.6 3.2 V
Brightness control sensitivity ∆VBRT Average amount of change for 1 7 11 14 mV/Step
Step between Data 02 = 60 and A0
Video input clamp voltage VYCLP Clamp voltage of pin 43 3.2 3.7 4.2 V
ACL sensitivity ACL Change of Y-out when V20 = 3.0 V→3.5 V 2.1 2.7 3.2 V/V
Blanking Off threshold voltage VBOFF Maximum blanking Off voltage 0.3 0.5 0.9 V
in lowering pin 42 voltage
Blanking level VYBL DC voltage of blanking pulse 0.5 1.0 1.5 V
DC restoration ratio TDC APL 10% to 90% 90 100 110 %
∆AC − ∆DC
TDC = × 100
∆AC

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ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

Parameter Symbol Conditions Min Typ Max Unit
Video signal processing circuit (continued) (In the following test conditions, the measurements are made with
input: 0.6 V[p-p] (VWB = 0.42 V[0-p] stair-step) at G-out.)
Video input clamp current IYCLP DC measurement: IC inside sink current 8 13 18 µA
ACL start point VACL V20 at which output amplitude becomes 3.4 3.7 4.0 V
90% in decreasing ACL pin (V20)
from 5 V
Color signal processing circuit (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out)
Color-difference output (typ.) VCO Input: Color bar 2.6 3.3 4.0 V[p-p]
Data 00 = 40 (typ.), 03 = 40 (typ.)
Color-difference output (max.) VCOmax Data 00 = 7F amplitude of one side 2.3 3.0  V[0-p]
Data 03 = 40
Color-difference output (min.) VCOmin Data 00 = 00 0  100 mV[p-p]
Data 03 = 40
Contrast variable range CCmax/min 03 = FF Data 00 = 40 20 25 33 dB
03 = 00
ACC characteristics 1 ACC1 Burst 300 mV[p-p]→600 mV[p-p] 0.9 1.0 1.2 Time
Input; Rainbow
ACC characteristics 2 ACC2 Burst 300 mV[p-p]→60 mV[p-p] 0.7 1.0 1.1 Time
Input; Rainbow
NTSC tint center ∆θC Difference from Data = 01 = 40 −13 0 +13 Step
(Tint) at which tint is adjusted to center.
NTSC tint variable range 1 ∆θ1 Data 01 = 7F 30 50 65 deg
NTSC tint variable range 2 ∆θ2 Data 01 = 00 −65 −50 −30 deg
Color-difference output ratio (R) R/B Input; Rainbow for both PAL/NTSC 0.71 0.83 0.95 Time
Color-difference output ratio (G) G/B Input; Rainbow for both PAL/NTSC 0.31 0.37 0.43 Time
Color-difference output angle (R) ∠R Input; Rainbow for both PAL/NTSC 78 90 102 deg
Color-difference output angle (G) ∠G Input; Rainbow for both PAL/NTSC 224 236 248 deg
PAL color killer tolerance VKillP 0 dB = 300 mV[p-p] −57 −44 −34 dB
NTSC color killer tolerance VKillN 0 dB = 300 mV[p-p] −57 −44 −34 dB
APC pull-in range (high) fCPH For both PAL/NTSC 450 900  Hz
APC pull-in range (low) fCPL For both PAL/NTSC  −900 −450 Hz
Color killer detection output voltage VKC V5 measured when chroma is input 4.5 5.0  V
(Color)
Color killer detection output voltage VKBW V5 measured when no chroma is 0 0.1 0.5 V
(B&W) input
Demodulation output-(B-Y) VDB Input; Color bar, measurement by pin 60 555 695 835 mV[p-p]
Demodulation output-(R-Y) VDR Input; Color bar, measurement by pin 61 430 540 650 mV[p-p]
Demodulation output angle ∠B ∠RDB Phase shift of B-Y axis −5 0 5 deg

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AN5192K ICs for TV

■ Electrical Characteristics at Ta = 25°C (continued)

Parameter Symbol Conditions Min Typ Max Unit
Color signal processing circuit (continued) (In the following test conditions, burst 300 mV[p-p] (PAL) and reference is B-out)
Demodulation output angle ∠R ∠RDR Phase difference from B-Y axis 85 90 95 deg
CW output level (4.43 MHz) VCWP AC component when VCO is set at 250 300 350 mV[p-p]
4.43 MHz
CW output level (3.58 MHz) VCWN AC component when VCO is set at  0 50 mV[p-p]
3.58 MHz
CW output level period (SECAM) TCW CW output period at SECAM 1.31 1.41 1.51 ms
SECAM discrimination current ISECAM Minimum value for taking out current 50 100 150 µA
from pin 59 and discriminating as
SECAM
PAL/NTSC DC level V59PN V59 DC level at PAL/SECAM 0.8 1.3 1.65 V
SECAM DC level V59S V59 DC level at SECAM 4.1 4.6 5.1 V
PAL/NTSC R60,61PN DC measurement. pin 60, 61 390 480 570 Ω
output impedance impedance at PAL/NTSC
SECAM R60,61S DC measurement. pin 60, 61 100   kΩ
output impedance impedance at SECAM
RGB Processing Circuit (DAC Data are typical)
Pedestal difference voltage ∆VIPL Difference voltage of R,G,B out pedestal 0  0.3 V
Brightness voltage tracking ∆TBL R, G, B out fluctuation level ratio 0.9 1.0 1.1 Time
of DATA 02 (Brightness) 02 = 40 to C0
Video voltage gain relative ratio ∆GYC Output ratio of R,B out to G out 0.8 1.0 1.2 Time
Video voltage gain tracking ∆TCONT Gain ratio of R, G, B out of Data 03 0.9 1.0 1.1 Time/
(Contrast) 03 = 20 to 60 Time
Drive adjustment range GDV AC change amount of R, B out between 5.3 6.3 7.3 dB
drive adjustment max. and min.
Cut-off adjustment range VCUT-OFF DC change amount of R, G, B out 1.9 2.2 2.5 V
between cutoff adjustment at max.
and min.
YS threshold voltage VYS Minimum DC voltage, when YS turns on 0.7 1.0 1.3 V
External RGB pedestal voltage VEPL YS is On 1.7 2.3 2.9 V
External RGB pedestal difference ∆VEPL YS is On 0  250 mV
voltage
Internal and external pedestal ∆VPL/IE Internal-external 50 200 400 mV
difference voltage
External RGB output voltage VERGB Input 3 V[p-p], contrast 03 = 7F 4.3 5.4 6.5 V[p-p]
External RGB output difference voltage ∆VERGB Input 3 V[p-p], contrast 03 = 7F − 0.6 0 0.6 V
External RGB contrast variable range ECmax/min 03 = 7F 10 13 16 dB
03 = 00
External RGB frequency characteristics fRGBC Input 0.2 V[p-p], DC = 1 V 8 12  MHz

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ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

Parameter Symbol Conditions Min Typ Max Unit
Synchronizing signal processing circuit
Horizontal free-running oscillation frequency fHO Without sync. signal input 15.33 15.63 15.93 kHz
Horizontal output pulse duty cycle τHO Upward going pulse duty cycle 31 37 43 %
Horizontal pull-in range fHP Difference from fH = 15.625 kHz ±500 ±650  Hz
PAL vertical free-running oscillation fVO-P Data 0E − D2 = 1, D3 = 0 48 50 52 Hz
frequency Forced 50 Hz mode, no sync. signal input
NTSC vertical free-running oscillation fVO-N Data 0E − D2 = 1, D3 = 1 58 60 62 Hz
frequency Forced 60 Hz mode, no sync. signal input
Vertical output pulse width τVO For both PAL/NTSC 9 10 11 1/fH
PAL vertical pull-in range fVP-P fH = 15.625 kHz, forced 50 Hz mode 46  54 Hz
NTSC vertical pull-in range fVP-N fH = 15.75 kHz, forced 60 Hz mode 56  64 Hz
Horizontal output voltage (high) V56H High level DC voltage 3.2 3.5 3.8 V
Horizontal output voltage (low) V56L Low level DC voltage 0  0.3 V
Vertical output voltage (high) V58H High level DC voltage 3.9 4.2 4.5 V
Vertical output voltage (low) V58L Low level DC voltage 0  0.3 V
Picture center variable range ∆THC Change amount of phase difference 2.6 3.2 4.4 µS
between H Sync. and H-out of
Data 0A = 80 to 8F
Overvoltage protective operation voltage VXRAY Pin 55 minimum voltage at which 0.60 0.68 0.76 V
H-out stops to appear
Vertical frequency discrimination (50) f50 Vertical frequency to become V57 47  55 Hz
= Low (< 0.5 V)
Vertical frequency discrimination (60) f60 Vertical frequency to become V57 57  63 Hz
= High (> 4.5 V)
Sync. signal clamp voltage (Ver.) V45 Clamp voltage of V45 1.0 1.3 1.6 V
Sync. signal clamp voltage (Hor.) V46 Clamp voltage of V46 1.0 1.3 1.6 V
Horizontal output start voltage VfHS Minimum V50 to become f0 > 10 kHz, 3.4 4.2 5.0 V
when horizontal oscillation output
is 1 V[p-p] or more.
I2C interface
Sink current when ACK IACK Maximum value of pin 21 sink 2.0 2.5 5.0 mA
current at ACK
SCL, SDA signal input high level VIHI 3.1  5.0 V

SCL, SDA signal input low level VILO 0  0.9 V

Maximum frequency allowable to input fImax 100   Kbit/s

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AN5192K ICs for TV

■ Electrical Characteristics at Ta = 25°C (continued)

• Design reference data
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
VIF circuit (Typical input fP = 38.9 MHz, VIN = 90 dBµ)
Input sensitivity VPS Input level to become VPO = −3 dB  45 51 dBµ
Maximum allowable input VPmax Input level to become VPO = 1 dB 104 110  dBµ
SN ratio SNP 50 53  dB
Differential gain DGP 0 3 5 %
Differential phase DPP 0 3 5 deg
Black noise detection level ∆VBN Deference from sync. peak value −55 −45 −35 IRE
Black noise clamp level ∆VBNC Deference from sync. peak value 35 45 35 IRE
RF AGC operation sensitivity GRF Input level difference to become 0.5 1.5 3.0 dB
V27 = 1 V→7 V
VCO switch On drift ∆fPD Frequency drift from 5 seconds to 100 150 200 kHz
5 mins. after SW On
Intermodulation IM VfC − VfP = −2 dB, VfS − VfP = −12 dB 46 52  dB
RF AGC adjustment sensitivity SRF Average amount of change of output 1.0 1.7 2.5 V/Step
voltage V27 at Data 1Step
AFT offset adjustment sensitivity SAFT Average amount of change of output 0.15 0.2 0.25 V/Step
voltage V30 per Data 1Step
Video detection output fluctuation ∆VP/V VCC = ±10%  ±10 ±15 %
with VCC
Video detection output-temperature ∆VP/T Ta = −10°C to +70°C  ±5 ±10 %
characteristics
Input resistance (pin 24, 25) RI24, 25 f = 38.9 MHz  1.2  kΩ
Input capacitance (pin 24, 25) CI24, 25 f = 38.9 MHz  4.0  pF
Sound IF output level VSIF fS = 38.9 MHz − 6.0 MHz, P/S = 20 dB 94 100 106 dBµ
VCO control sensitivity βP ∆V41 = ±0.1 V 2.0 2.7 3.5 kHz/mV
VCO control range fVCO Free-running frequency change 3.0 4.0 5.0 MHz
width from Data 0D = 00 to 7F
RF AGC delay-point temperature ∆VDP/T Ta = −20°C to +70°C 0 3 5 dB
characteristics
VCO free-running frequency ∆fP/T Ta = −20°C to +70°C  300  kHz
temperature characteristics
AFT center frequency ∆fAFT/T Ta = −20°C to +70°C, input  300  kHz
temperature characteristics frequency at which AFT output
voltage becomes 4.5 V

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ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
SIF circuit (Typical input fS = 6.0 MHz, fM = 400 Hz, VIN = 90 dBµ)
Input limiting level VLIM Input level to become VSOP = −3 dB  44 50 dBµ
AM rejection ratio AMR AM = 30% 60 70  dB
Total harmonic distortion THD ∆f = ±50 kHz 0 0.3 0.5 %
SN ratio SNA 50 55  dB
Audio output with VCC fluctuation ∆VS/V VCC = ±10%  ±3 ±6 %
Audio output-temperature characteristics ∆VS/T Ta = −20°C to +70°C  ±5 ±10 %
AV SW circuit
Video SW cross-talk CTVSW f = 1 MHz, VIN = 1 V[p-p]  −66 −60 dB
Internal→External、
External→Internal
Audio SW cross-talk CTAIE fS = 6.0 MHz, fM = 400 Hz  −73 −67 dB
(Internal→External) Without input from outside
Audio SW cross-talk CTAEI fS = 6.0 MHz, fM = 0 Hz  −73 −67 dB
(External→Internal) fM = 400 Hz, VIN = 600 mV[rms]
Video signal processing circuit (In the following test conditions, the measurements are made at G-out with input 0.6 V[p-p]
(VWB = 0.42 V[0-p]). )
Y signal delay time TDL Phase difference from Y input 620 690 790 ns
(PAL: 4.43 MHz)
Black level extension1 VBL1 Input: Total black, difference between −100 0 100 mV
pin 42 of 9 V and Open (With RC
filter)
Black level extension2 VBL2 Input: Total black, difference between 500 800 1100 mV
pin 42 of 3 V and 9 V
Black level extension3 VBL3 Input: approx. 20IRE, voltage difference 100 300 500 mV
between pin 42 of Open and 9 V
Contrast variation with sharpness ∆VCS Y-out output level difference between −300 0 300 mV
sharpness max. and min.
Brightness variation with sharpness ∆VBS Pedestal level DC difference between −250 0 250 mV
sharpness is at max. and min.
Input dynamic range VImax Contrast 03 = 40 1.0 1.7  V[p-p]
Y signal SN ratio SNY Contrast 03 = 7F 51 56  dB
Black level extension start point VBLS Start point at V48 = 4.5 V 37 42 47 IRE
Trap on/off gain difference ∆GTRAP Trap on/off −1 0 1 dB
Trap on/off ∆TTRAP Trap on/off 350 390 430 ns
delay time change amount

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AN5192K ICs for TV

■ Electrical Characteristics at Ta = 25°C (continued)

• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
Video signal processing circuit (continued) (In the following test conditions, the measurements are made at G-out
with input 0.6 V[p-p] (VWB = 0.42 V[0-p]).
Trap frequency error ∆fTRAP Trap center frequency, when chroma −70 0 70 kHz
input is 4.43 MHz
Trap attenuation amount ATT TRAP Attenuation amount of 4.43 MHz, 26 30  dB
when chroma input is 4.43 MHz
Trap automatic adjustment range fTRAP VCO frequency of ∆fTRAP ≤ 70 kHz 3  5 MHz
Trap fixed frequency fST Data 0E − D6 = 1, Trap frequency 4.0 4.8 5.6 MHz
Video output fluctuation with VCC ∆VY/V VCC1 = 9 V (allowance: ±10%) 0 100 200 mV/V
Video output-temperature characteristics ∆VY/T Ta = −20°C to +70°C 0 5 10 %
PAL/NTSC delay time difference ∆TP/N Trap On (NTSC-PAL) −10 10 30 ns
Color signal processing circuit (Burst 300 mV[p-p] (PAL), reference is B-out)
Demodulation output residual carrier VCAR1 2fSC level of pin 60 and 61 0  30 mV
Color difference output residual carrier VCAR2 2fSC level of pin 15, 16, and 17 0  50 mV
VCO free-running frequency (PAL) fCP Difference from f = 4.433619 MHz −300 0 300 Hz
VCO free-running frequency (NTSC) fCN Difference from f = 3.579545 MHz −300 0 300 Hz
fCO fluctuation with VCC ∆VC/V VCC1 = 9 V (allowance: ±10%), −300 0 300 Hz
VCC3 = 5 V (allowance: ±10%)
Static phase error (PAL) ∆θP Tint shift from ∆fC = −300 Hz to 0 2 5 deg/
+300 Hz change 100 Hz
Static phase error (NTSC) ∆θN Tint shift from ∆fC = −300 Hz to 0 2 5 deg/
+300 Hz change 100 Hz
PAL/NTSC RP/N Output amplitude ratio of PAL 0.8 1.0 1.2 Time
to NTSC
Line crawling ∆VPAL Pin 61: Output amplitude difference 0  50 mV
per 1H for-(R-Y) pin
Color difference output bandwidth fCC Band to become −3 dB  1.0  MHz
Chroma BPF characteristics (PAL) BPFP Output level difference between  10  dB
f = 4.43 MHz and 3.58 MHz
Chroma BPF characteristics (NTSC) BPFN Output level difference between  13  dB
f = 3.58 MHz and 2.0 MHz
(when Ext. video)
Color-difference output ∆VC/V VCC1 = 9V (allowance: ±10%)  ±10 ±15 %
fluctuation with VCC VCC3 = 5V (allowance: ±10%)
Color-difference output ∆VC/T Ta = −20°C to +70°C  ±10 ±15 %
-temperature characteristics

12
ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
Color signal processing circuit (continued) (Burst 300 mV[p-p] (PAL), reference is B-out)
Brightness variation with color VBC Pedestal level DC difference −250 0 250 mV
between at contrast max. and min.
Brightness variation difference ∆VBC R, G, B out variation voltage 0  20 mV
voltage with color difference
RGB processing circuit
(C-Y)/Y RC/Y Color bar input, B-out 0.9 1.2 1.5 V[0-p]/
Contrast typ., color Data 00 = 60 V[p-p]
(C-Y), Y delay difference ∆TC/Y Color bar input, B-out −100 0 100 ns
Phase of green→magenta
YS changeover speed fYS fYS, when external input is 3 V, 7 11  MHz
output level −3 dB
External RGB input dynamic VDEXT Contrast max., Data 03 = 77F 2.0 2.5 3.2 V[0-p]
range
Internal/external crosstalk CTRGB Leakage when f = 1 MHz, 1 V[p-p],  −60 −50 dB
and YS = 5 V
Spot killer operation VSPK V9, when V9 is decreased from 9 V 7.4 7.8 8.2 V
and spot killer turns on.
Brightness variation with contrast VBAC Pedestal level DC difference between −250 0 250 mV
contrast max. and min.
Brightness variation difference ∆VBAC R, G, B out variation voltage 0  20 mV
voltage with contrast difference
Pedestal level fluctuation with VCC ∆VPL/V VCC1 = 9 V (allowance: ±10%) 0 200 400 mV/V
Pedestal level- temperature ∆VPL/T Ta = −20°C to +70°C −2.6 −2.2 −1.8 mV/°C
characteristics
Pedestal level 2 VPD2 Pedestal level, when G cutoff 2.1 2.7 3.3 V
Data 05 = 18
Synchronizing signal processing circuit
Lock detection output voltage VLD V18 at horizontal AFC lock 5.7 6.3 6.9 V
Lock detection charge and discharge current ILD DC measurement ±0.6 ±0.8 ±1.1 mA
EBP (RGB) slice level VFBP Minimum voltage of pin 50, when 0.4 0.75 1.1 V
blanking is applied to RGB output
EBP (AFC2) slice level VFBPH Minimum voltage of pin 50 at which 1.5 1.9 2.3 V
AFC2 operates
Horizontal AFC µ µH DC measurement 30 37 44 µA/µs
Horizontal VCO β βH β curve gradient near f = 15.7kHz 1.4 1.9 2.4 Hz/mV
Burst gate pulse position PBGP For both PAL/NTSC, delay from 0.2 0.4 0.6 µs
H. Sync. rise

13
AN5192K ICs for TV

■ Electrical Characteristics at Ta = 25°C (continued)

• Design reference data (continued)
Note) The characteristic listed below are theoretical values based on the IC design and are not guaranteed.
Parameter Symbol Conditions Min Typ Max Unit
Synchronizing signal processing circuit (continued)
PAL burst gate pulse width WBGPP 3.4 4.0 4.6 µs
NTSC burst gate pulse width WBGPN 2.5 3.0 3.5 µs
Burst gate pulse output voltage VBGP DC voltage of pin 62 in BGP period 4.5 4.7 4.9 V
H blanking pulse output voltage VHBLK DC voltage in H-blanking pulse 2.1 2.4 2.7 V
period of pin 62
V blanking pulse output voltage VVBLK DC voltage in V-blanking pulse 2.1 2.4 2.7 V
period of pin 62
PAL V blanking pulse width WVP Pulse width at fH = 15.625 kHz 1.31 1.41 1.51 ms
NTSC blanking pulse width WVN Pulse width at fH = 15.73 kHz 1.01 1.11 1.21 ms
FBP allowable range TFBP Time from H-out rise to FBP center 12  19 µs
I2C interface
Bus free before start tBUF 4.0   µs
Start condition set-up time tSU.STA 4.0   µs
Start condition hold time tHD.STA 4.0   µs
Low period SCL, SDA tLOW 4.0   µs
High period SCL tHIGH 4.0   µs
Rise time SCL, SDA tr   1.0 µs
Fall time SCL, SDA tf   0.35 µs
Data set-up time (write) tSU.DAT 0.25   µs
Data hold time (write) tHD.DAT 0   µs
Acknowledge set-up time tSU.ACK   3.5 µs
Acknowledge hold time tHD.ACK 0   µs
Stop condition set-up time tSU.STO 4.0   µs
DAC
4, 6, 7bit DAC DNLE L4, 6, 7 1LSB = {Data (max.)-Data (00)} 0.1 1.0 1.9 LSB
/15,63,127 Step
8bit DAC DNLE L8 1LSB = {Data (FF) − Data (00)}/255 0.1 1.0 1.9 LSB
Step
Cut off DAC overlap ∆Step Overlap of 8-bit 2-stage changeover 27 32 37 Step
(Same for AFT) of R, B cut-off

14
ICs for TV AN5192K

■ Electrical Characteristics at Ta = 25°C (continued)

• Typical conditions when testing
1. Input signal
1) VIF : fP = 38.9 MHz, VIN = 90 dBµ
Video modulation: modulated signal is 10-staircase. Modulation m = 87.5%
VIN = 90 dBµ, pin 25 input level approx. 84 dBµ
2) SIF : fS = 6.0 MHz, VIN = 90 dBµ, modulated signal fM = 400 Hz, Deviation: PAL ±50 kHz,
NTSC ±25 kHz
3) Video : 10-staircase 0.6 V[p-p] (VBW = 0.42 V[0-p])
4) Chroma : Color bar signal: Burst level 300 mV[p-p]
: Rainbow signal : Burst level 300 mV[p-p]
5) Sync. signal : Video signal 1.5V[p-p] to 2.5 V[p-p] for both horizontal and vertical sync. signal input
2. I2C BUS conditions: (PAL)

Sub Address Data(H) Control Data(H)

00 40 Color 00 = 40
01 40 Tint 01 = 40
02 80 Brightness 02 = 80
03 40 Contrast 03 = 40
04 80 Sharpness 04 = 00
05 00 Cut-off R, B 05, 07 = 00
06 00 Cut-off G 06 = 00
07 00 Drive R, B 08, 09 = 80
08 80 Video output 0A (Upper rank) = 8∗
09 80 Picture center position 0A (Lower rank) = ∗8
0A 88 AFT 0B = 01
0B 01 04 − D7 = 1
0C 40 RF AGC 0C = 40
0D 40 VIF VCO 0D = 40
0E 01

15
AN5192K ICs for TV

■ Terminal Equivalent Circuits

Pin No. Equivalent circuit Description I/O
1 Pin 1: Color difference signal clamp DC
2 9V pin (R-Y) approx. 7 V
(VCC1)
3 Pin 2: Color difference signal clamp
300 Ω pin 1, 2, 3
C-Y pin (G-Y)
300 0.068 µF
Ω Pin 3: Color difference signal clamp
pin (B-Y)
BGP • Color difference signal inputted from
Brightness
150 µA control pin 63, 64 is clamped according to
brightness control voltage.
• Clamp pulse uses internal clamp pulse
(BGP)
4 5V Killer filter pin DC
(VCC3)
• Filter pin for killer detection circuit approx. 3.3 V
3.3 V (operates for BGP period)
Killer 4 • Killer turned On (Without color output)
det. 137 kΩ
270 Ω
1.0 MΩ

circuit 1V 2.8 V or less

2.5 V

0.47 µF
BGP
9V
2.8 V

100 µA

5 VCC for microcomputer Killer output pin DC

(5 V) • Output pin of killer detection circuit Killer On
33 kΩ • Connect 33 kΩ load resistor of pin 5 0.2 V
175 Ω Killer
5 40 µA On to microcomputer VCC Killer Off
To microcomputer Floating
10 kΩ 5V
resistor
Off

6 Pin for APC filter DC

• Filter pin for APC detection circuit approx. 2.5 V
(operates for BGP period)
5V
(VCC3)
• Detection sensitivity becomes large
when external R→large (Tends to
3.3 V pull-in easily. Tends to be affected
0.022 µF

APC 6 by noise)
det.
2.2 µF

40 k
circuit 1V Ω SW β curve
R
2.5 V 7.5 kΩ

BGP fC
max. 1 mA

VCO 270 Ω
circuit
V6

• When SECAM, APC circuit is stopped

by short circuiting 40 kΩ resistor

16
ICs for TV AN5192K

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
7 Pin 7: Chroma oscillation pin (4.43 MHz) AC
8 DC 2.7 V Pin 8: Chroma oscillation pin (3.58 MHz) f = fC
4.43 MHz
7 • Oscillation pin for chroma. Either one approx.
of 4.43 MHz or 3.58 MHz is oscillated 0.3 V[p-p]
C7
IP1 12 pF • Oscillation frequency changeover is
IP2
performed by 0E − D0 bit of I2C Bus
100 µA 500 µA DC 2.7 V
8
3.58 MHz • When 0E − D0 = 1
IP1 and IP2 turn On and 4.43 MHz
C8 oscillates.
IN2 IN1 15 pF
When 0E − D0 = 0
100 µA100 µA 500 µA IN1 and IN2 turn on and 3.58 MHz
oscillates.
C7 and C8 have tempera-
• Pattern from pin to oscillator
ture characteristic (N750)
element should be as short as possible.

9 Spot killer pin DC

9V VCC1
(VCC1) • To be used for discharging electric approx. 9 V
10 kΩ
1.7 kΩ charge on CRT quickly when power
9
to RGB 1 µF of set is turned Off.
output • DC voltage of R,G,B output pin is
circuit 100 kΩ
raised when VCC1 drops.

10 9V
YS input pin AC
(VCC1) • Fast blanking pulse input pin for (pulse)
50 µA to RGB output
circuit OSD
• Turns on at a voltage higher than
from
microcomputer 1 V[0-p]
2.7 kΩ 1V
10
30 kΩ
100 µA

11 Pin 11: External R input pin AC

12 9V Pin 12: External G input pin (pulse)
(VCC1)
13 50 µA Pin 13: External B input pin
to RGB output • External input pin for OSD
circuit
• Output changes linearly according
pin 11, 12, 13 2.7 kΩ to input level.
Contrast
30 kΩ VREF max.
from Output
microcomputer

Contrast
min.
Input 2.5 V (max.)
• Limit voltage of input changes according
to contrast control level.

17
AN5192K ICs for TV

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
14 VCC1 (typ. 9 V) DC
• Output part of VIF and SIF circuit 9V
• AV SW circuit
• Video circuit
• RGB circuit

15 9V
Pin15: R-out pin AC
16 (VCC1) Pin16: G-out pin
130 µA 100 Ω
17 Pin17: B-out pin
50 Ω pin 15 • BLK level approx. 0.9 V
16
C Out 17
• Black (Pedestal) level approx. 2.2 V
• Blanking can be released when pin 42
(Black level detection pin) is set at 0 V.
500 µA

18 Horizontal sync. detection pin DC

• Phase of horizontal synchronizing when
signal and horizontal output pulse is synchronous
detected and outputted. VCC2 − VSAT
to
Chroma 5V • Pin18 is low when out of phase. when
(VCC2) circuit (VCC3)
• In asynchronous state, color control asynchronous
10 kΩ becomes min. and chroma output approx. 0.3 V
2.8 V disappears.
800 µA 12 kΩ 12 kΩ
I1 • Pay attention to impedance when
the voltage of pin 18 is utilized
800 µA for microcomputer
I2
(ZO ≥ 1 MΩ is required)
50 µA
pin 56
H Out

18 ZO pin 46
H Sync. In
• H Sync. period
0.022 µF
1 MΩ 10 kΩ When pin 56 is high: I1 On
When pin 56 is low: I2 On

19 GND
• RGB circuit
• DAC I2C circuit
• VIF (VCO) circuit

18
ICs for TV AN5192K

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
20 ACL pin DC
• Contrast can be reduced when DC approx. 3 V
9V
(VCC1) voltage of pin 20 is decreased from
5.9 V
to Contrast the outside.
60 kΩ 60 kΩ Circuit
2.1 V
6.9 kΩ

2.3 V 6.9 k 3.5 V

Ω
7.1 kΩ 7.1 kΩ
Contrast
control 20
6.9 kΩ
2.3 V
±1 V 4.7 µF
100 µA
100 µA 100 µA

21 I2C Bus Data input pin AC

5V
(VCC3) (pulse)
100 kΩ 50 µA 100 kΩ

DATA 1 kΩ
1.7 V
21
from
µ-COM
to Logic
ACK circuit
30 kΩ 30 kΩ

22 I2C Clock input pin AC

5V
(VCC3) (pulse)
100 kΩ 50 µA 100 kΩ

Clock 1 kΩ
1.7 V
22
from
µ-COM
to Logic
circuit
30 kΩ 30 kΩ

23 VCC3-1 (typ. 5 V) DC
• For VIF, SIF circuit 5V

19
AN5192K ICs for TV

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
24 5V
Pin 24: VIF input pin 1 AC
25 (VCC3) Pin 25: VIF input pin 2 f = fP
3.5 V • Input for VIF amp.and balanced DC level
input approx. 2.7 V
27 kΩ 1.2 1.2
kΩ kΩ • Input max. 120 dBµ
25
SAW
24

150 µA150 µA

26 GND DC
• VIF, SIF circuit

27 5V RF AGC output pin DC

(VCC3)
• Collector open output

to Tuner 1F AGC
27 Bias

RF AGC
control Bias
40
kΩ

28 Audio output pin AC

• There is fluctuation of DC due to 0 kHz to 20 kHz
9V
(VCC1) internal and external changeover DC
approx. 4.2 V
270 Ω
28

100 µA 400 µA

29 De-empahsis pin AC
9V • De-empahsis filter pin for sound 0 kHz to 20 kHz
(VCC1)
detection signal.
detection output 1.7 kΩ
• External C is the same for PAL and
120 kΩ NTSC (Internal impedance changes)
PAL 100 µA
60 kΩ 29 • PAL: 120 kΩ//60 kΩ × 1 200 pF
NTSC
1200 pF = 48 µs
• NTSC: 60 kΩ × 1200 pF = 72 µs

20
ICs for TV AN5192K

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
30 9V AFT output pin DC
(VCC1)
1.1 kΩ 1.1 kΩ • Center voltage offset should be
9V
adjusted by using a bus.
• AFT defeat SW is turned on (0B = 00),
30 to Tuner
V30 becomes a value determined by
the value of externally attached resistor-
divider.
1.1 kΩ 40 kΩ 1.1 kΩ • AFT µ is variable by impedance of
max. 350 µΑ externally attached resistor.

31 External video input pin AC

9V
(VCC1) • Input pin for external video signal. 1 V[p-p]
3.6 V
50 µA DC cut input. (Composite)
Ext. Video
• Typical 1 V[p-p] (max. 1.5 V[p-p])
30 kΩ
to
Video SW 50 kΩ
31
10 µF
DC
100 µA approx. 2.1 V

32 Decoupling pin DC
9V • S curve inside IC is wide band but DC
(VCC1)
10 kΩ feedback is applied so that DC voltage
of output signal becomes constant.
1.7 kΩ
• DC level (typ. 4.5 V)
typ.4.5 V 32 fS→High: V32→Low
1.7 kΩ 10 µF
3 kΩ 3 kΩ

20 kΩ

100 µA 13 µA

33 External audio input pin AC

9V • Input pin for external audio signal 0 kHz to 20 kHz
(VCC1)
5.4 V input. DC cut input.
50 µA
• Typical input level should be adjusted
to to internal sound level.
Audio SW 65 kΩ
33 • Input max. 7 V[p-p]
10 µF

150 µA

21
AN5192K ICs for TV

■ Terminal Equivalent Circuits (continued)

Pin No. Equivalent circuit Description I/O
34 5V SIF Signal input AC
(VCC3)
Input max. 110 dBµ f = fS
SIF In
0.01 µF 10 kΩ 3.0 V DC
34
1 kΩ approx. 2.3 V

100 µA
5V
100 µA
to SIF
Limitter amp.

35 IF AGC filter pin DC

5V
(VCC3) • Pin for IF AGC filter. The current approx. 2 V
obtained from peak AGC circuit is
smoothed by external capacitor.
to • Since response becomes faster when
IF amp. C→small, but sag tends to appear
35
30 µA easily.
0.47 µF

36 Video output pin AC

• Int. video or Ext. video signal selected 2 V[p-p]
9V
(VCC1) by AV SW is outputted.
50 µA • DC fluctuates by internal/external
36 changeover
DC level
approx. 4.5 V
400 µA

37 9V SIF APC filter pin DC

(VCC1)
• Filter pin for APC circuit of SIF approx. 2.5 V
• Recommended resistance value for
single frequency
2.4 kΩ 7.5 kΩ (R237: Connect between the pin and
1.3 V
VCC1)
27 k 37
6.5 MHz: Open
9V
2 pF 1 000 pF
R237 6.0 MHz: 560 kΩ
5.5 MHz: 200 kΩ
4.5 MHz: 560 kΩ

22
 9V
5V
1HDL
BPF

9 V

8
7
6
5
4
3
2
1
9V Trap

9V

9V
Ver.

AFC2
FBP In
Clamp
ICs for TV

X-ray

9
AFC1

10
11
12
13
14
15
16
VOSC
IF

50 Hz/60 Hz
HOSC
Out

5V
APC1

GND (VCJ)
AGC

DET.

BL DET

VCC3 (VCJ)

V Out
H Out

SECAM
Hor. Sync.
APC

Ver. Sync.
9V
5V Ext. Audio

9V
Out
Video

C In

VCC2

-(R-Y)Out

-(R-Y)In 64
-(B-Y)In 63
SCP 62
61
-(B-Y)Out 60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
33

39
Int. V 38
37
36
35
SIF In 34

*7-bit Shut
PN/S Ver. HVCO Hor. SCP HBLK VCO 7 dB
Saturation Down CV
SW out Reg. Hor.
■ Application Circuit Example

*1-bit AFC1 sync.sep clamp *7-bit

*1-bit Limiter
APC1
Chroma R-Y B-Y Hor. VSW
Ver. AFC2 BGP Trap
contrast demod demod Count Hor. *1-bit
Count Down SIF
+/− Down *4-bit Lock det. Ver.
*2-bit *6-bit detect
(50 Hz/60 Hz) sync.sep
G-Y Phase
Sharpness
Killer 50 Hz Shift
/60 Hz *7-bit
Ident detect VCO
LPF Y
*8-bit HVBLK
*1-bit contrast
Brightness De-
APC ACC APC2 AFT
1H System emphasis
det. FF SW Black *9-bit
B-Y Tint expansion *1-bit
clamp *7-bit (Service) Level
Chroma SW Pre-amp.
ACC NTSC adjust *4-bit
CW amp. BPF Y
amp. *1-bit ASW
G-Y Generate *1-bit clamp VIF 1F
clamp detect AGC
DAC SW
*1-bit
R-Y Out Out
R G B
clamp *1-bit *Drive 8-bit
Drive Cut Off Drive IF RF
Chroma *Cut Off 9-bit I2C Bus
Cut Off (8-bit) Cut Off amp. AGC
VCO YS Interface
pulse *7-bit
16
17
18
19
20
21
22
23
24
25
26
28
29
31
32

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

5V
27 9 V
30 9 V

5V

9V

SAW

YS
VCC1

R In
B In

G In
SCL

SDA

R Out
B Out
ACL

G Out
Decoupling

Ext. Video

GND (IF)

VCC3 (IF)

9V

APC

Killer
Audio Out

GND (RGB)

R Clamp
B Clamp

G Clamp
3.58 MHz

4.43 MHz

Killer Out
De-emphasis

Lock DET

Spot Killer
AFT Out

VIF In1
VIF In2

23
AN5192K

RF AGC Out