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Digital Lab

The document describes experiments to verify the operation of basic logic gates - AND, OR, and NAND gates. It lists the required tools and materials. For each gate, it provides the logic operation, circuit diagram, and a table to record the output for all input combinations. The conclusion asks students to summarize the gate operations and provide logic equations and timing diagrams.

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Kyal Sin
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135 views5 pages

Digital Lab

The document describes experiments to verify the operation of basic logic gates - AND, OR, and NAND gates. It lists the required tools and materials. For each gate, it provides the logic operation, circuit diagram, and a table to record the output for all input combinations. The conclusion asks students to summarize the gate operations and provide logic equations and timing diagrams.

Uploaded by

Kyal Sin
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd

Verification of the Basic Logic Gates Operation

Objectives:

 To verify the operation of basic logic gates

 To recognize the operation ,application ,and troubleshooting of logic gates and digital logic
design

 To reinforce theory and technic taught in the class room through project assignment.

Basic logic gates: AND, OR and NAND gates.

Required Tools, Equipment and Materials


1. TTL IC 74LS08 (Quad 2 inputs AND) 1
2. TTL IC 74LS32 (Quad 2 inputs OR) 1
3. TTL IC 74LS00 (Quad 2 inputs NAND) 1
4. Connecting wires
5. Resistor
6. Capacitor
7. LED
8. Project Board

[Type here]
Experiment I: AND gate Operation

 The AND gate output is High (logic 1) only when all its inputs are High. For all other cases,
the AND gate output low (logic 0).

Procedure
 Refer to the pin configuration diagram of TTL logic IC 74LS08, connect the AND circuit as
shown in Fig 1.2.
 Complete Table 2.

Table 2.
Input Output

A B X=A.B

0 0

0 1

1 0

1 1

[Type here]
Experiment II: OR gate Operation

 The OR gate output is LOW (logic 0) only when all its inputs are LOW. For all other cases,
the OR gate output High (logic 1).

Procedure
 Refer to the pin configuration diagram of TTL logic IC 74LS32, connect the OR circuit as
shown in Fig 1.3.
 Complete the following Table 3.

Fig 1.3

Table 3.
Input Output

A B Y=A+B

0 0

0 1

1 0

1 1

[Type here]
Experiment III: NAND gate Operation

 The operation of the NAND gate is equivalent to the AND gate followed by an inverter.

 The output expression is Y

 The NAND gate produces a LOW output only when the inputs are HIGH. When any of the
input is LOW, the output will be HIGH.

Procedure
1. Refer to the pin configuration diagram of TTL logic IC 74LS00, connect the NAND circuit as
shown in Fig 1.4.
2. Complete Table 4.

Fig 1.4

Table 4.
Input Output

A B Y

0 0

0 1

1 0

[Type here]
1 1

Conclusion:

1. The output of an AND gate will be high if ________ (any/ all) of its inputs is/ are high.

2. The output of an OR gate will be High if _______(any/ all) of its inputs is/are high.

3. The logic equation for a 3- input AND gate shown is Y = ______________

4. The logic equation for a 3- input OR gate shown is Z = ______________

5. Complete the output timing diagram of the 2 inputs AND gate?

[Type here]

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