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Analog Circuits ESE ETU4026

Sppu analog paper

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0% found this document useful (0 votes)
96 views16 pages

Analog Circuits ESE ETU4026

Sppu analog paper

Uploaded by

Sahil
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
Government College of Engineering, Amravati (An Autonomous Institute of Government of Maharashtra) Fourth Semester B. Tech. (Electronics and Telecommunication) Winter - 2014 Course Code: ETU402 Course Name: Analog Circuits Time: 2 hr. 30min. Max. Marks: 60 Instructions to Candidate 1) All questions are compulsory. 2) Assume suitable data wherever necessary and clearly state the assumptions made. 3) Diagrams/sketches should be given wherever necessary. 4) Use of logarithmic table, drawing instruments and non- programmable calculators is permitted. 5) Figures to the right indicate full marks. 1 Solve the following questions 12M (a) What is feedback in amplifiers? Derive the expression for the closed-loop gain of the amplifier with (i) positive feedback (ii) negative feedback. (b) A negative feedback of B = 0.002 is applied to an amplifier of gain 1000.Calculate the change in overall gain of the feedback amplifier if the internal amplifier is subjected to a gain reduction of 15%. (b) © (a) (b) Define desensitivity factor D. _Give its significance in negative feedback amplifier. Solve any two from the following questions. Identify the circuit shown in figure. Design a approximate equivalent circuit and prove that Ai =0.707 of its low frequency value for hye. Write a short note on validity of high frequency model. Find the base width of silicon pnp transistor whose figure of merit is 450MHz. Diffusion length of holes is 15cm?/sec. Design a simplified circuit for calculating the CE current gain with resistive load and prove that Ai = —-hfe/V[1+ (Lr Solve any two from the following questions. Explain the effect of emitter bypass capacitor on low frequency response of common emitter configuration and discuss the pole-zero plot of gain. Design high frequency T model for common base 12M 12M 12M 2M. wy ©) (@) (b) (@) configuration? Also explain its common base short circuit current frequency response? A BJT has hig= 6K,and hp=224 at Ic=lmA with Fr =80MHz and Cy.=12pF.Determine (i) &m(ii) ii) row and (iv) Cyreat room temperature and a collector current of ImA. Solve the following questions. A Schmitt trigger with Ge istors having hfe 8M =40 is shown in figure circuit parameters are Veo=22V,Rs=2Km,Rel=10K,Rc2=2K,R1=25K,R 2=100K and Re = 30K.Find (i)UTP(V 1), (ii) LTP(V2),(iii)Rel to eliminate hysteresis ,and (iv)Re2 to eliminate hysteresis. Veo=22V With the help of neat circuit diagram and 4M waveforms, explain the working of astable multivibrator. A . 12M Solve any two from the following questions. . For the current mirror shown in figure, Determine (b) (9) qs R so that Io =100pA. 16V R fle The following figure shows the differential amplifier with the circuit which is used for improving the input parameters, identify the Circuit and derive the current gain? Vbe =Vbe1+Vbe2 Derive the equation for collector current of differential amplifier and discuss the transfer characteristics of it. a Government College of Engineering, Amravati (An Autonomous Institute of Government of Maharashtra) Fourth semester B. Tech. (Electronics and Telecommunication.) Course Code: ETU402 Time: 2 hr. 30min. Summer — 2014 Course Name: Analog Circuits Max. Marks: 60 Instructions to Candidate | Assume suitable data wherever necessary and clearly state the assumptiors made. | Diagrams/sketches should be given wherever necessary. Use of logarithmic table, drawing instruments and non- programmable calculators is permitted. | Figures to the right indicate full marks. | yy 2) 3) 4) 1 (a) (b) © (a) Solve the following questions | Derive an equation for the voltage gain of an amplifier that uses series voltage negative feedback. Draw the circuit diagram of| voltage series feedback amplifier and derive the expression for input and output impedance In a negative feedback amplifier A=100,8=0.02 and input signal voltage is 40 mV. Determine @ Voltage gain with feedback (ii) Feedback factor (iii) Feedback voltage (iv) Output voltage. Solve any two from the following questions Give the validity condition of Giacoletto model and prove that hie = rppt re assuming rpy<< Tpre-How does hie vary with 1.2 12M 12M (b) (a) (b) (a) (b) Design a simplified circuit for calculating the CE current gain with resistive load and prove that £2 Ai = —hfe/V[1 + (4) i Design high frequency T model for common base configuration? Also explain its common base short circuit current frequency response. Solve the following questions 12M A BIT has hj= 6K,and hfe=224 at at Ic=1mA with Fr=80MHz and Cy,.=12pF.Determine (i) Sm(ii) Thre (iii) roy» and (iv) Cy»e at room temperature and a collector current of mA. Design a high frequency equivalent circuit for an emitter follower with bypass capacitor and also design a frequency response for it Solve any two from the following questions 12M Draw the circuit diagram of an astable multivibrator Justify that it is a two stage RC coupled amplifier using feedback. How does it generate a square wave? Silicon transistor with hg(min) equal to 20 are available If Vo¢ = Vos = 12V,determine all the Parameters for the circuit shown in figure © @) &) © What is mean by triggering the binary? Explain unsymmetrical triggering of _ bistable multivibrator through a unilateral device (diode). “Ves Solve any two from the following questions Discuss the method for increasing input resistance of differential amplifier and derive the required equation. Draw and explain a hybrid m model and equivalent small signal equivalent model of differential amplifier. Derive its differential mode gain, common mode gain and calculate CMRR for it. For the circuit shown in figure (a) Determine Ic) and Ic2 (b) Find Rc so that Vo = 6V.Assume & =200. 12M Government College of Engineering, Amravati (An Autonomous Institute of Government of Maharashtra) Fourth semester B. Tech. (Electronics and Telecommunication) Summer - 2013 Course Code :ETU402 Course Name : Analog Circuits Time : 2 hr.30min. Max. Marks : 60 Instructions to Candidate 1) 2) 3) 4) 5) 1 @) (b) © All questions are compulsory. Assume suitable data wherever necessary and clearly state the assumptions made. Diagrams/sketches should be given wherever necessary. Use of logarithmic table, drawing instruments and non- programmable calculators is permitted. Figures to the right indicate full marks. Explain the concept of feedback and discuss the Sm following terms with circuit diagram. (i)Signal source (ii)feedback Network (iii)sampling network (iv)comparator network and (v) transfer gain Discuss the general characteristics of feedback 5m amplifier in detail. If input of 0.028V peak to Peak is given to an 5m open loop amplifier, it gives fundamental frequency output of 36Vpp but it is associated with 7% distortion (DIF the distortion is to be reduced to 1%how much feedback has to be introduced and what will be the required input voltage? (ii)If 1.2% of Vo is feedback and input is maintained at the same level, what will be the output voltage? 2 @ (b) (©) 3 (a) (b) 4 (a) (b) Derive the expression for common emitter short circuit current gain as a function of frequency and hence define the a and 8 cut-off frequencies. Derive the relationship between low frequency h- parameters and high — frequency hybrid-m parameters for transistor in common emitter configuration. ; Identify the circuit shown in figure. Design a approximate equivalent circuit and prove that Ai =0.707 of its low frequency value for hye. Explain the effect of emitter bypass capacitor on low frequency response of common emitter configuration and discuss the pole-zero plot of gain. Derive the equation of source resistance for a single stage transistor amplifier Tesponse and discuss gain bandwidth product for it. (i)Write a short note on comi What are the other capacitor? (ii)What do you mean by self bias binary? What is the effect of single power suppl: performance of the binary? ee mutating capacitor. names of commutating OR The self bias bistal ble multivibrat ili ‘ Ir transistors with cere! Silicon htecminy=20.The junction voltage 5m 5m 5m 6m. 6m Sm Sm 10 5 (a) (b) and Icpo may be neglected. Design the circuit subject to the condition V.c=18V,R1=R2, 1C(may=10mA.The base current of ON transistor twice the minimum base current, and Vpg of the OFF transistor is equal to -1V. i)For the current mirror shown in figure, Determine R so that Io =100pA. 45V R J ii)The following figure shows the differential amplifier with the circuit which is used for improving the input parameters, identify the circuit and derive the current gain? = 1 ibe L Vee =vbet+vbez | E OR Derive the equation for collector current of differential amplifier and discuss the transfer characteristics of it. 4m 4m 8m & Government College of Engineering, Amravati (An Autonomous Institute of Government of Maharashtra) Fourth Semester B. Tech. (Electronics and Telecommunication.) Summer Term — 2013 Course Code :ETU402 Course Name : Analog Circuits Time : 2 hr.30min. Max. Marks : 60 Instructions to Candidate 1) All questions are compulsory. 2) Assume suitable data wherever necessary and clearly state the assumptions made. 3) Diagrams/sketches should be given wherever necessary. 4) Use of logarithmic table, drawing instruments and non- programmable calculators is permitted. 5) Figures to the right indicate full marks. 1 (a) An amplifier has a midband gain of 100 and 3m bandwidth of of 200kHz. i) What will be the new bandwidth and gain if 5% of negative feedback is introduced? ii) What should be the amount of feedback if bandwidth is to be restricted tol MHz? (b) Draw a feedback amplifier in block diagram form. sm Identify each block and state its function. (c) Draw a sketch to illustrate the principle of voltage series feedback and briefly explain. List the major Sm effects of negative feedback on an amplifier. 2 (a) Derive the expression for the two capacitances Sm associated with high frequency model of transistor. Give the validity condition of Giacoletto model, au (b) Design a high frequency equivalent circuit for Sm (©) 3 (a) (b) 4 @ (b) following figure and also design frequency response for it. voc Design high frequency T model for common base configuration? Also explain its common base short circuit current frequency response. Design an approximate equivalent circuit and high frequency response for calculating the short circuit CE. current gain without resistive load. Also discuss parameter Fy and its measurement. Design a CE short circuit current frequency response? Also prove that Fr=Fa.ao. i) Silicon transistors with hfe(min)=20 available. If Vec=Vpp multivibrator. ii) What do you mean by loading of a binary? What are the effects of performance of binary? are =10V, design the bistable OR A fixed bias binary shown in figure uses n-p-n silicon transistors with hfe=20.The Circuit parameters are Vec= 12V,Vpp=3V, Re=1k,R1=5K,R2=10k Vee(sat)=0.4V And Vbe(sat)=0.8V.(i)Find stable state voltages and currents.(ii) What is the maximum load the multivibrator can drive still maintaining one Sm 6m 6m 6m 6m 12m (a) (b) transistor in saturation and other in cut-off?(iii)What is maximum reverse saturation current Ico tolerated so that neither of transistor in cut-off?iv)If the initial value of Igo is 10mA at room temperature ,what is the maximum temperature at which the device remains OFF? vgc i)Figure shows a modified current mirror circuit. Determine the emitter current in transistor Q3,if B=100 and Vbe=0.75V. -s0v ii) Design a hybrid 7 model and equivalent small 3m signal equivalent model for calculating ferential mode gain and common mode gain of differential amplifier. Also calculate CMRR for it. OR Explain the method for increasing input resistance of 6m differential amplifier and derive the required equation. Government College of Engineering, Amravati (An Autonomous Institute of Government of Maharashtra) Fourth Semester B. Tech. (Electronics and Telecommunication) TO CHOSE oo = Summer - 2017) Apa 1S Course Code: ETU402 Course Namezalog Circuits) Max. Marks: 60 Time: 2 hrs. 30mi Instructions to Candidate 1) All questions are compulsory. 2) Assume suitable data wherever n\ state the assumptions made. 3) Diagrams/sketches should be given wherever necessary. 4) Use of logarithmic table, drawing instruments and non- programmable calculators is permitted. 5) Figures to the right indicate full marks. ecessary and clearly 1 Solve any two from the following. (a) An amplifier without feedback gives fundamental 6 output 36V with 7% second harmonic distortion; when the input is 0.028V. i) If 1.2% of the output is feedback into the input in a negative voltage series feedback, what is the output voltage? ii) If the fundamental but the second harmonic disto1 1%, what is the input voltage? | output is maintained at 36V tion is reduced to (b) Explain general characteristics of negative 6 feedback amplifier in detail. (c) List the steps required to carry out the analysis of 6 a feedback amplifier in brief and hence explain the current series feedback amplifier. Contd... @) (b) ©) (a) (b) (a) ) © (a) mplifier in brief and hence explain the feedback amplitic ve any two from the follow 6 i. e have width of a germanium PNP transistor ig 5 rons, At room temperature and for 6 : a de emitte current of 2mA, determine i) emitter resistan i) alpha cut off” frequency, iti) emitter diffusa capacitance and iv) base transit time, Given the following transistor measurements made at Ip = SmA, Vee = 10V and at room temperature 6 hye = 100, hie = 6002, Aic = 10 at 10 MHz, Ce 3pP. Find fy, fr, Ce, tore and yy: aa Write notes on: i) Gain bandwidth product 6 ii) Variation of hybrid x parameters Explain the working of two stages RC coupled 6 amplifier with its circuit diagram, frequency response, advantages & disadvantages and applications. Derive the expression for n stage CE cascaded ¢ amplifier with respect to voltage gain, current gain, input impedance, output impedance and power gain. Solve any two from the following. Explain UJT relaxation oscillator along with its 6 waveforms across resistor and capacitor and hence derive the expression for frequency of that. List the drawbacks in current mirror circuit and 6 hence explain modified current mirror circuit to overcome the drawbacks in detail. = Explain different methods employed for triggering 6 a bistable multivibrator, In circuit diagram shown in figure-1, Voc = +12V, 6 > , Vpye T2V; Re 10KQ, Re = 10KQ, Ra = 20k22. {) Determine output voltage if transistors Qy and Q) are identical with Pye = 75. ii) Determine the base currents and base voltage: iii) Determine base current and base voltages if transistors Q) and Q) are identical except for Pac: ‘Transistor Qy has Pac = 60 and Qz has Bde = 80. +Vec Figure-1 (b) For the BJT monostable multivibrator circuit shown in figure-2, show that the element values gives the required biasing under normal and triggered conditions. Also determine the amplitude and saturation of the current pulse in load resistance. (ly for transistors used is 60.) Veo = 6V

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