No.
Assembly Syntex Function Operation Status Bit
1 NOP No Operation None
2 SLEEP Enter SLEEP Mode 0 → WDT, Stop OSC /PF, /TF
3 CLRWDT Clear Watch Dog Timer 0 → WDT /PF, /TF
4 LJUMP N Unconditional JUMP N → PC
5 LCALL N CALL subroutine N → PC, PC + 1 → Stack
6 RETI Return from Interrupt Stack → PC. 1 → GIE
7 RET Return from subroutine Stack → PC
8 BCR R, b CLEAR Bit 'b' of registor R to '0' 0 → R(b)
9 BSR R, b SET Bit 'b' of registor R to '1' 1 → R(b)
10 CLRR R CLEAR registor R to '0' 0→R Z
11 LDR R, d (MOVF) SAVE R to d R→d Z
12 COMR R, d One's complement of R /R → d Z
13 INCR R, d R+1 R+1→d Z
14 INCRSZ R, d R+1, SKIP if result is '0' R+1→d
15 DECR R, d R-1 R-1→d Z
16 DECRSZ R, d R-1, SKIP if result is '0' R-1→d
17 SWAPR R, d SWAP nibble in registor R R(0-3) ⇌ R(4-7) → d
18 RRR R, d R rotate RIGHT with carry R(0) → C; R(n) → R(n-1); C → R(7); C
19 RLR R, d R rotate LEFTwith carry R(7) → C; R(n) → R(n+1); C → R(0); C
20 BTSC R, b BIT TEST, SKIP if the result is '0' Skip if R(b) = 0
21 BTSS R, b BIT TEST, SKIP if the result is '1' Skip if R(b) = 1
22 CLRW CLEAR working regiator W to '0' 0 →W Z
23 STTMD SAVE W registor content to OPTION registor W → OPTION
24 CTLIO R SET the I/O direction control registor TRISr W →TRISr
25 STR R (MOVWF) SAVE W registor to R registor W →R
26 ADDWR R, d ADD W registor and R registor W+R→d C, HC, Z
27 SUBWR R, d R registor MINUS W registor R-W→d C, HC, Z
28 ANDWR R, d AND W registor and R registor R&W→d Z
29 IORWR R, d OR W registor and R registor W|R→d Z
30 XORWR R, d XOR W registor and R registor W^R→d Z
31 LDWI I (MOVLW) STORE immidiate value I in W I→W
32 ANDWI I AND of W and immidiate value I I&W→W Z
33 IORWI I OR of W and immidiate value I I|W→W Z
34 XORWI I XOR of W and immidiate value I I^W→W Z
35 ADDWI I ADD W and immidiate value I I + W →W C, HC, Z
36 SUBWI I Immidiate valie I MINUS W I-W→W C, HC, Z
37 RETW I RETURN, STORE the immidiate number I into W Stack → PC; I → W