Philco STC-9630 Service Manual
Philco STC-9630 Service Manual
STC-9630
1 MIC 2 OPEN/CLOSE
CONTENTS
1. SAFETY PRECAUTIONS 1
5.3 MISCELLANEOUS 7
6. ELECTRICAL CONFIRMATION 8
8.1 MT1336 11
8.2 MT1379 19
8.3 AM29LV160D 35
8.4 HY57V641620HG 40
1
2 3 4 5 6 7 8
1 MIC 2 OPEN/CLOSE
9 10 11 12 13 14
2
4.PREVENTION OF STATIC ELECTRICITY DISCHARGE
The laser diode in the traverse unit (optical pickup)may brake down due to static electricity of clothes or human
body. Use due caution to electrostatic breakdown when servicing and handling the laser diode.
3
5. Assembling and disassembling the mechanism unit
Pic (1)
4
Materials to Pic (1)
5
5.2 Bracket Explosed View and Part List
Pic (2)
Materials to Pic(2)
1.bracket 14. front silicon rubber
2.belt 15. Back silicon rubber
3.screw 16. Pick-up
4.belt wheel 17. Pick-up
5.gearwheel 18. switch
6.iron chip 19. Five-pin flat plug
7. Immobility mechanism equipment 20. screw
8. Magnet 21. PCB
9. Platen 22. motor
10. Bridge bracket 23. Motor wheel
11. screw 24. screw
12. screw 25.tray
13. Big bracket
Before going process with disassembly and installation, please carefully both
peruse the chart and confirm the materials.
6
5.3 MISCELLANEOUS
5.3.1 Protection of the LD(Laser diode)
Make sure that the workbenches,jigs,tips,tips of soldering irons and measuring instruments are
grounded,and that personnel wear wrist straps for ground.
Open the LD short lands quickly with a soldering iron after a circuit is connected.
Keep the power source of the pick-up protected from internal and external sources of electrical
noise.
Refrain from operation and storage in atmospheres containing corrosive gases (such as H2S,SO2,
NO2 and Cl2)or toxic gases or in locations containing substances(especially from the organic silicon,cyan,
formalin and phenol groups)which emit toxic gases.It is particularly important to ensure that none of the
above substances are present inside the unit.Otherwise,the motor may no longer run.
7
6.Electrical Confirmation
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohms.
8
6.2 Video Output(Chrominance Signal) Confirmation
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohme.
9
7.MPEG BOARD CHECK WAVEFORM
7.1 27MHz WAVEFORM
DIAGRAM
10
MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
D V D - R O M d r i v e r u p t o 1 6 X S . I t a l s o s u p p o r t s D V D- R A M r e a d u p t o 4 X S V e r s i o n 2 . I t c o n t a i n s s e r v o a m p li f i e r s
t o g e n e r a t e f o c u s i n g e r r o r , 3-b e a m t r a c k i n g e r r o r , 1 b e a m r a d i a l p u s h -p u l l s i g n a l , R F l e v e l a n d S B A D f o r s e r v o
f u n c t i o n s . I t a l s o i n c l u d e s D P D t r a c k i n g e r r o r s i g n a l f o r D V D _ R O M a p p l i c a t i o n . F o r D V D- R A M d i s k s , t h e r e a r e
a l s o D i f f e r e n t i a l P u s h -P u l l ( D P P ) m e t h o d f o r g e n e r a t i n g t r a c k i n g s i g n a l a n d D i f f e r e n t i a l A s t i g m a t i c D e t e c t i o n
(DAD) for processing focusing signal. Programmable equalizer and AGC circuits are also incorporated in this
chip to optimize read channel performance. In addition, this chip has dual automatic laser power control circuits
f o r D V D- R O M ( D V D-R A M ) and C D -R O M s e p e r a t e l y a n d r e f e r e n c e v o l t a g e g e n e r a t o r s t o r e d u c e e x t e r n a l
c o m p o n e n t s . P r o g r a m m a b l e f u n c t i o n s a r e i m p l e m e n t e d b y t h e a c c e s s o f i n t e r n a l r e g i s t e r t h r o u g h b i -d i r e c t i o n a l
FEATURES
n RF equalizer with programmable fc from 3MHz to 70 MHz and programmable boost from 3dB to
13dB.
n M T 1 3 3 6 s u p p o r t s a t l e a s t e i g h t d i f f e r e n t k i n d s o f p i c k-u p h e a d s w i t h v e r s a t i l e i n p u t c o n f i g u r a t i o n f o r
n One beam differential phase tracking error (DPD) generator for DVD_ROM application.
n Differential push pull tracki ng error (DPP) generator for DVD_RAM application.
n Focusing error signal generator for CD-ROM, DVD-ROM and DVD-RAM (DAD method).
n One beam push -pull signal generator for central servo application.
n High speed RF envelop detection circuit with bandwidth up to 400KHz for CD-ROM.
n Dual automatic laser power control circuits with programmable level of LD monitor voltage.
11
MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
OSP
DVDA OSN
CDA
RFOP
DVDB ATTENUATOR
INPUT MUX VGA EQ
RFON
CDB
DVDC
LRFRP
CDC
DEFECT
DVDD
HRFRP
CDD
CRTP
DVDRFIN ENVELOP
CRTPLP
DETECTOR
DVDRFIP
AGC
MA
MB CSO
MC
LVL
MD
DPD TEO
SA
SB
FEO
SC
REFCOS
SD
PCS HALLCOS
SBAD
DPFN COSPHI
REFSIN
DPFO
HALLSIN
IR
SINPHI
DPDMUTE TE DVD MDI2
APC
TPI
TNI LDO2
CDFOP RF
CDFON LEVEL
RFGC
RFGCU
MDI1
RFGCI FE CD
APC LDO1
AGC1
AGC2
CENTRAL
AGC3
SERVO
RFSUBO UDGATE
IDGATE
WOBSO WOBBLE
VFO13
DET
SDATA
SERIAL
V20 SLCK
PORT
REF and 2VREF SDEN
V2REFO
Voltage Generator
VREFO
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MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
RFSUBO
WAVDD
WAGND
CDFOP
CDFON
MDI1
MDI2
WGND
AGC3
AGC2
AGC1
LDO2
LDO1
SGND
SVDD
AVDD
AGND
TPI
TNI
IR
MD
MC
SC
SB
SD
SA
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
WOBSO 1 102 MB
WVDD 2 101 MA
AGNDX 3 100 DVDA
AGNDX 4 99 DVDB
AVDDO 5 98 DVDC
RFOP 6 97 DVDD
RFON 7 96 DVDRFIP
AGNDO 8 95 DVDRFIN
TM1 9 94 CDA
TM2 10 93 CDB
TM3 11 92 CDC
AGNDT 12 91 CDD
TM4 13 90 OSN
MT1336
AVDDT 14 89 OSP
V2REFO 15 88 RFGC
VREFO 16 87
DVD-ROM
RFGCU
V20 17 86 RFGCI
FEO 18 85 CEQP
LVL
CSO
19
20 With 84
83
CEQN
AGNDX
DVD_RAM
TEO 21 82 AGNDX
VDDP 22 81 MON
Read
DEFECT 23 80 MOP
LRFRP 24 79 SW1
HRFRP 25 78 SW2
CRTP 26 77 SWO
CRTPLP 27 76 SINPHI
TRLPA 28 75 REFSIN
TRLP 29 74 HALLSIN
HTRC 30 73 AGNDM
GNDP 31 72 REFCOS
DPFN 32 71 HALLCOS
DPFO 33 70 COSPHI
AGNDX 34 69 AVDDM
AGNDX 35 68 AGNDX
AGNDX 36 67 AVDDF
VDD 37 66 VCON
VFO13 38 65 AGNDF
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IOB
IOA
DPDMUTE
SCLK
SDEN
RST
GND
XCK16M
SDATA
VDDS
GNDS
UDGATE
HDGATE
AGNDP
AVDDP
AGNDX
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MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
LQFP128
RF Flag Interface
RF SIO interface
RF SERVO interface
RF
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MT1336
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TRACKING ERROR
ALPC
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MT1336
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RF RIPPLE
25 HRFRP Analog output High frequency RF ripple output or Blank detector’s output
REFERENCE VOLTAGE
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MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
ALPC TRIMMING
PCS
74 HALLSIN Analog input Negative input of amplifier for hall sensor signal
75 REFSIN Analog input Positive input of amplifier for hall sensor signal
71 HALLCOS Analog input Negative input of amplifier for hall sensor signal
72 REFCOS Analog input Positive input of amplifier for hall sensor signal
42 IO0
43 IO1
44 IO2
45 IO3
46 IO4
47 IO5
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MT1336
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48 IO6
49 IO7
50 IO8
51 IO9
52 IOA
53 IOB
18
MT1379
Specificationsaresubjecttochangewithoutnotice Progressive Scan DVD Player Combo Chip
8.2 MT1379
§ Tray control can be PWM output or digital output
n Super Integration DVD player single chip § Built-in DSP for digital servo control
§ Servo controller and data channel processing
§ MPEG-1/MPEG-2/JPEG video decoding
§ Dolby AC-3/DTS/DVD -Audio audio decoding
§ n Host Micro controller
Unified track buffer and A/V decoding buffer
§ Built-in 8032 micro controller
§ Video processing for scaling and video quality
§ Built-in internal 373 and 8-bit programmable
enhancement
§ lower address port
OSD & Sub-picture decoding
§ 1024-bytes on-chip RAM
§ Built-in clock generator
§ Up to 2M bytes FLASH-programming interface
§ Built-in TV encoder
§ Supports 5/3.3-Volt. FLASH interface
§ Built-in progressive video output
§ Supports power-down mode
§ Video input port and audio/SPDIF input port
§ Supports additional serial port
n Speed Performance on Servo and Decoding
§ n DVD-ROM/CD-ROM Decoding Logic
DVD-ROM up to 8XS
§ Supports CD-ROM Mode 1, CD-ROM XA Mode 2
§ CD-ROM up to 24XS
Form 1, CD-ROM XA Mode 2 Form 2, and CD-DA
§ Built-in a frequency programmable clock to µP formats
and RSPC Decoder to optimize the performance § High-speed ECC logic capable of correcting one
over power
error per each P-codeword or Q-codeword
§ Automatic sector Mode and Form detection
n Channel Data Processor
§ § Automatic sector Header verification
Provides interface with analog front-end
processor § 8-bit counter for decode completion check
§ Analog data slicer for small jitter capability § Programmable descrambling and error
§ Built-in high performance data PLL for chann el correction schemes
data demodulation § Automatically repeated error corrections
§ EFM/EFM+ data demodulation § 8-bit C2 Pointer counter
§ Enhanced channel data frame sync protection & § Decoder Error Notification Interrupt that signals
DVD-ROM sector sync protection various decoder errors
§ Provide error correction acceleration
n Servo Control and Spindle Motor Control
§ Programmable frequency error gain and phase n Buffer Memory Controller
error gain of spindle PLL to control spindle motor § Supports 16Mb/32Mb/64Mb/128Mb SDRAM
on CLV and CAV mode § Supports 16-bit/32-bit SDRAM data bus interface
§ Provide a varipitch speed control for CLV and CAV § Build in a DRAM interface programmable clock to
mode
optimize the DRAM performance
§ Built-in ADCs and DACs for digital servo control § Provide the self-refresh mode SDRAM
§ Provide 2 general PWM § Programmable DRAM access cycle and refresh
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MT1379
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MT1379
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P IN D EFINITIONS
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26 Jul, 2002
PWM2VREF Page 1 of 2
YUV3/CVBS
PWMVREF
RFDTSLVN
RFDTSLVP
DACVDDA
DACVDDB
ADCVDD3
DACVSSC
DACVSSA
DACVSSB
RFRP_DC
RFRP_AC
RFLEVEL
ADCVSS
SPMCLK
UDGATE
SPLRCK
TEZISLV
SPDATA
YUV4/G
IDGATE
YUV6/R
YUV1/C
YUV5/B
YUV2/Y
RFSUBI
HRFZC
DVDD3
DVDD3
SPBCK
DVDD2
SDATA
BLANK
WOBSI
XTALO
VFO13
SLCK
SDEN
HSYN
DVSS
DVSS
VSYN
XTALI
PRST
YUV7
ADIN
RFIN
RFIP
CSO
BDO
ICE
FEI
TEI
213
216
215
214
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
IREF 1 162 YUV0/CIN
PLLVSS 2 161 FS
LPIOP 3 160 VREF
LPION 4 159 DACVDDC
LPFON 5 158 ASDATA4
LPFIP 6 157 ASDATA3
LPFIN 7 156 ASDATA2
LPFOP 8 155 ASDATA1
JITFO 9 154 ASDATA0
JITFN 10 153 SPDIF
PLLVDD3 11 152 MC_DATA
FOO 12 151 ACLK
TRO 13 150 DVDD3
TROPENPWM 14 149 ALRCK
PWMOUT1 15 148 ABCK
PWMOUT2 16 147 RD16
DVDD2 17 146 RD17
DMO 18 145 DVSS
FMO 19 144 RD18
DVSS 20 143 RD19
FG 21 142 RD20
HIGHA0 22 141 RD21
HIGHA1 23 140 DVDD2
HIGHA2 24 139 RD22
HIGHA3 25 138 RD23
HIGHA4 26 MT1379 137 DQM2
HIGHA5 27 136 DQM3
DVSS 28 (216 pins) 135 DVSS
HIGHA6 29 134 RD24
HIGHA7 30 133 RD25
AD7 31 132 RD26
AD6 32 131 RD27
AD5 33 130 DVDD3
AD4 34 129 RD28
DVDD3 35 128 RD29
AD3 36 127 RD30
AD2 37 126 RD31
AD1 38 125 DVSS
AD0 39 124 RA3
IOA0 40 123 RA2
IOA1 41 122 RA1
DVDD2 42 121 RA0
IOA2 43 120 DVDD2
IOA3 44 119 RA10
IOA4 45 118 BA1
IOA5 46 117 DQM0
IOA6 47 116 DQM1
IOA7 48 115 DVSS
A16 49 114 RA4
A17 50 113 RA5
IOA18 51 112 RA6
IOA19 52 111 DVDD3
IOA20 53 110 RA7
APLLVSS 54 109 DMVSS
100
101
102
103
104
105
106
107
108
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
URD#
DMVDD3
APLLVDD3
RD15
RD14
RD13
RD12
RD11
RD10
RCS#
DVDD3
DVDD2
UWR#
DVDD2
DVDD3
RA11
ALE
IOOE#
BA0
RWE#
IR
CLK
RA9
RA8
DVSS
DVSS
DVSS
DVSS
CKE
IOWR#
IOCS#
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
RD9
RD8
CAS#
RAS#
UP1_2
UP1_3
UP1_4
UP1_5
UP1_6
UP1_7
UP3_0
UP3_1
UP3_4
UP3_5
INT0#
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MT1379
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
F UNCTIONAL B LOCK
DVD module
Playback
Controller
Audio DAC
Flash DRAM SPDIF MIC
Servo Controller
The servo control is accomplished through the servo DSP (Servo Digital Signal Processor) and its accessory I/O circuits. This servo
DSP is capable of performing complex operations an d also provides a friendly interface for the system controller. By issuing type
1 and type 2 commands from the system controller, the servo DSP can accomplish various complicated servo control functions,
such as tracking, seeking and MT1336/MT1376 chip register programming. As for the servo I/O circuits, it provides interface
between the input servo signals and the Servo DSP. It has built-in ADCs to digitize the servo control signal and DACs to provide
signals for the actuator and sledge motor. It also has a serial interface to communicate with the MT1336/MT1376 chip.
DPU
Data path unit (DPU) provides protection on data with lost synchronization patterns and demodulates EFM/EFM+ bit stream into
the channel raw data that will be corrected by the decoder. The synchronization protection makes data after the synchronization
pattern to be extracted even if the synchronization pattern is not found.
Spindle Controller
The spindle controller is used to control disc spindle motor. It includes a varipitch CLV clock generator, a CLV/CAV controller,
and a PWM generator. The varipitch CLV clock enerator generates a reference colck for the speed of operation. The CLV/CAV
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controller changes the mode and speed of operation according to servo register setting. The PWM generator generates
pulse -width-modulated signal to drive disc spindle motor driver.
CSS/CPPM
The CSS/CPPM module provides functions necessary for decoding discs conforming to CSS/CPPM specification.
System Parser
The system parser is used to help the system controller to decode DVD/SVCD/VCD bitstream just after the channel decoder
performing error correction. Acting as a DMA master, it moves bitstream data from RSPC buffer to video, audio, or sub-picture
buffer according to system controller request. It also decrypts the scramble data of the CSS/CPPM sectors. Another function of
system parser is providing system controller/DSP a DRAM memory copy controller to enhance system controller/DSP performance.
Video Decoder
The primary function of MT1379 is to support MPEG1 and MPEG2 video decoding. The video decode engine comprises of
variable length decoder (VLD), inverse transformer (IT), motion compensator (MC), and block reconst ructor (BR). The video
decode engine decodes the variable length encoded symbols in MPEG bitstream and performs inverse scan, inverse
quantization, mismatch control and inverse discrete cosine transform onto the variable length decoded data. The motion
compensator fetches prediction data from reference picture buffer according to motion vectors and motion prediciton mode for P
and B pictures. Finally, the block reconstructor combines both the results of inverse transformer and motion compensator to derive
the reconstructed image macroblock and write back to picture buffer.
The video decode engine can also support JPEG and BMP file decoding by common image compression hardware kernels.
Video Output
The Video Output unit contains Video Processor, SPU, OSD, Cursor, TV encoder units, it performs
§ Reading decoded video from DRAM buffer
§ Scaling the image
§ Gamma/Brightness/Hue/Saturation adjustment and edge enhancement
§ Reading and decoding SPU and OSD data from DRAM buffer
§ Generating hardware cursor image
§ Merging the video data, SPU, OSD and cursor
Video Processor
The Video Processor unit controls the transfer of video data stored in the DRAM to an internal or external TV encoder. It uses
FIFOs to buffer outgoing luminance and chrominance data, and performs YUV420 to YUV422 conversion and arbitrary
vertical/horizontal decimation/interpolation, from 1/4x to 256x. With this arbitrary ratio scaling capability, the Video Processor
can perform arbitrary image conversion, such as PAL to NTSC, NTSC to PAL, MPEG1 to MPEG2, Letterbox, Pan-Scan
conversion or zoom in, zoom out. It is also capible of interlace to progressive conversion.
The V ideo Processor unit contains two 2-tap vertical filters for luminance and chrominance . These filters are used to
interpolate and reposition luminance and chrominance line to improve picture quality. These filters are capble of generating
up to eight, unique subline value between two consecutive scan lines. The generation of lines depends on the ratio between
the height of the source image and the target image. In applications where DRAM bandwidth are critical the filters can be
configured as simple line-repeating to reduce the DRAM bandwidth required.
The Video Processor unit integrates two separate horizontal postprocessing filter, a simple 2-tap linear horizontal filter and
an 8-tap programmable filter. These filters are provided for scaling images horizontally along the scan line. These two filters
is capable of generating up to eight, unique subpixel values between two consecutive pixels on a scan line. The generation
of pixels depends on the ratio between the width of the source image and the target image.
SPU
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This is a hardware sub-picture decoder. It decodes the compressed SPU image bitstream and CHG_COLCON commands
according to SPU header information previously decoded by system controller. The SPU module also allows two SPU
objects to be displayed at the same time. SPU image is blended with main video stream.
OSD
The OSD module can operate with 2/4/16/256 -color bitmap format (1/2/4/8 bits), and 16/256 color RLC format, all have 16
levels of transparency. In addition, it accepts an special WARP mode, which inserts one programmable RLC code in the
bitmap to reduce the image size stored in DRAM. It also features automatic shadow/outline generation in 2-color mode, 2
Hilight areas, 1 ChangeColor area and 1 OSDVoid area. One OSD area can occupy the full or a partial screen, or multiple
OSDs can occur in a screen at the same time, only if they don't occupy the same horizontal line. The output image is
blended with the video-SPU mixed stream.
Cursor
A hardware cursor generator is integrated in Video Ou tput Unit. The cursor image is a 32x32 4-color bitmap image, each
colors are programmable. Cursor can be enlarged by 2 in both vertical and horizontal directions. Cursor image is multiplexed
with video-SPU-OSD mixed stream.
Audio Interface
Audio interface consists of Audio Output Interface and Microphone Input Interface.
With built-in PLL, MT1379 can provide the audio clock (ACLK) for external audio DAC at 384Fs, where Fs is usually 32KHz,
44.1KHz, 48KHz, 96KHz, or 192KHz. ACLK can also be programmed to be from outside MT1379. When ACLK is input to
MT1379, the frequency could be 128*n Fs, where n is from 1 to 7.
Audio raw (encoded) data or cooked (decoded) data can be output on a single line using S/PDIF interface. The output slew
rate and driving force of this pad are programmable.
System Controller
MT1379 uses an embedded Turbo-8032 as System Controller and provide ICE interface to increase the feasibility of F/W
development. Also, MT1379 includes an build-in internal 373 to latch lower byte address from 8032 Port 0 and provide a
glue-logic free solution. MT1379 supports up to 1M X 16 bits Flash ROM to store 8032 code, H/W related data, User data, etc.
F/W upgrade can be achieved either by debug interface or by disk.
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E LECTRICAL C HARACTERISTICS
DC Charateristics
Symbol Parameters Min Typ Max Unit
34
8.3 Am29LV160D
DISTINCTIVE CHARACTERISTICS
■ Single power supply operation ■ Embedded Algorithms
— Full voltage range: 2.7 to 3.6 volt read and write — Embedded Erase algorithm automatically
operations for battery-powered applications preprograms and erases the entire chip or any
— Regulated voltage range: 3.0 to 3.6 volt read and combination of designated sectors
write operations and for compatibility with high — Embedded Program algorithm automatically
performance 3.3 volt microprocessors writes and verifies data at specified addresses
■ Manufactured on 0.23 µm process technology ■ Minimum 1,000,000 write cycle guarantee
— Fully compatible with 0.32 µm Am29LV160B device per sector
■ 20-year data retention at 125°C
■ High performance
— Reliable operation for the life of the system
— Access times as fast as 70 ns
■ Package option
■ Ultra low power consumption (typical values at
5 MHz) — 48-ball FBGA
— 200 nA Automatic Sleep mode current — 48-pin TSOP
— 200 nA standby mode current — 44-pin SO
— 9 mA read current ■ CFI (Common Flash Interface) compliant
— 20 mA program/erase current — Provides device-specific information to the
system, allowing host software to easily
■ Flexible sector architecture
reconfigure for different Flash devices
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
thirty-one 64 Kbyte sectors (byte mode) ■ Compatibility with JEDEC standards
— One 8 Kword, two 4 Kword, one 16 Kword, and — Pinout and software compatible with single-
thirty-one 32 Kword sectors (word mode) power supply Flash
— Supports full chip erase — Superior inadvertent write protection
— Sector Protection features: ■ Data# Polling and toggle bits
A hardware method of locking a sector to prevent — Provides a software method of detecting program
any program or erase operations within that sector or erase operation completion
Sectors can be locked in-system or via ■ Ready/Busy# pin (RY/BY#)
programming equipment
— Provides a hardware method of detecting
Temporary Sector Unprotect feature allows code program or erase cycle completion (not available
changes in previously locked sectors on 44-pin SO)
■ Unlock Bypass Program Command ■ Erase Suspend/Erase Resume
— Reduces overall programming time when issuing — Suspends an erase operation to read data from,
multiple program command sequences or program data to, a sector that is not being
■ Top or bottom boot block configurations erased, then resumes the erase operation
available ■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data Publication# 22358 Rev: B Amendment/+3
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. Issue Date: November 10, 2000
35
PRODUCT SELECTOR GUIDE
Family Part Number Am29LV160D
BLOCK DIAGRAM
RY/BY# DQ0–DQ15 (A-1)
VCC
Sector Switches
VSS
Erase Voltage Input/Output
RESET# Generator Buffers
WE# State
Control
BYTE#
Command
Register
PGM Voltage
Generator
Chip Enable Data
Output Enable STB Latch
CE#
Logic
OE#
Y-Decoder Y-Gating
STB
Address Latch
A0–A19
Am29LV160D 36
CONNECTION DIAGRAMS
A15 1 48 A16
A14 2 47 BYTE#
A13 3 46 VSS
A12 4 45 DQ15/A-1
A11 5 44 DQ7
A10 6 43 DQ14
A9 7 42 DQ6
A8 8 41 DQ13
A19 9 40 DQ5
NC 10 39 DQ12
WE# 11 Standard TSOP 38 DQ4
RESET# 12 37 VCC
NC 13 36 DQ11
NC 14 35 DQ3
RY/BY# 15 34 DQ10
A18 16 33 DQ2
A17 17 32 DQ9
A7 18 31 DQ1
A6 19 30 DQ8
A5 20 29 DQ0
A4 21 28 OE#
A3 22 27 VSS
A2 23 26 CE#
A1 24 25 A0
A16 1 48 A15
BYTE# 2 47 A14
VSS 3 46 A13
DQ15/A-1 4 45 A12
DQ7 5 44 A11
DQ14 6 43 A10
DQ6 7 42 A9
DQ13 8 41 A8
DQ5 9 40 A19
DQ12 10 39 NC
DQ4 11 38 WE#
VCC 12 Reverse TSOP 37 RESET#
DQ11 13 36 NC
DQ3 14 35 NC
DQ10 15 34 RY/BY#
DQ2 16 33 A18
DQ9 17 32 A17
DQ1 18 31 A7
DQ8 19 30 A6
DQ0 20 29 A5
OE# 21 28 A4
VSS 22 27 A3
CE# 23 26 A2
A0 24 25 A1
37
CONNECTION DIAGRAMS
RESET# 1 44 WE#
A18 2 43 A19
A17 3 42 A8
A7 4 41 A9
A6 5 40 A10
A5 6 39 A11
A4 7 38 A12
A3 8 37 A13
A2 9 36 A14
A1 10 35 A15
A0 11 34 A16
CE# 12 SO 33 BYTE#
VSS 13 32 VSS
OE# 14 31 DQ15/A-1
DQ0 15 30 DQ7
DQ8 16 29 DQ14
DQ1 17 28 DQ6
DQ9 18 27 DQ13
DQ2 19 26 DQ5
DQ10 20 25 DQ12
DQ3 21 24 DQ4
DQ11 22 23 VCC
FBGA
Top View, Balls Facing Down
A6 B6 C6 D6 E6 F6 G6 H6
A5 B5 C5 D5 E5 F5 G5 H5
A9 A8 A10 A11 DQ7 DQ14 DQ13 DQ6
A4 B4 C4 D4 E4 F4 G4 H4
WE# RESET# NC A19 DQ5 DQ12 VCC DQ4
A3 B3 C3 D3 E3 F3 G3 H3
RY/BY# NC A18 NC DQ2 DQ10 DQ11 DQ3
A2 B2 C2 D2 E2 F2 G2 H2
A7 A17 A6 A5 DQ0 DQ8 DQ9 DQ1
A1 B1 C1 D1 E1 F1 G1 H1
A3 A4 A2 A1 A0 CE# OE# VSS
A
38
PIN CONFIGURATION LOGIC SYMBOL
A0–A19 = 20 addresses
20
DQ0–DQ14 = 15 data inputs/outputs A0–A19 16 or 8
DQ15/A-1 = DQ15 (data input/output, word mode),
DQ0–DQ15
A-1 (LSB address input, byte mode)
(A-1)
BYTE# = Selects 8-bit or 16-bit mode
CE# = Chip enable CE#
OE# = Output enable OE#
WE# = Write enable
WE#
RESET# = Hardware reset pin
RESET#
RY/BY# = Ready/Busy output
(N/A SO 044) BYTE# RY/BY#
(N/A SO 044)
VCC = 3.0 volt-only single power supply
(see Product Selector Guide for speed
options and voltage supply tolerances)
VSS = Device ground
NC = Pin not connected internally
39
HY57V641620HG
4 Banks x 1M x 16Bit Synchronous DRAM
8.4 HY57V641620HG
DESCRIPTION
The Hyundai HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which
require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576x16.
HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro-
nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output
voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated
by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of
read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst
read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
• Single 3.3±0.3V power supply Note) • Auto refresh and self refresh
• All device pins are compatible with LVTTL interface • 4096 refresh cycles / 64ms
• JEDEC standard 400mil 54pin TSOP-II with 0.8mm • Programmable Burst Length and Burst Type
of pin pitch
- 1, 2, 4, 8 or Full page for Sequential Burst
• All inputs and outputs referenced to positive edge of
system clock - 1, 2, 4 or 8 for Interleave Burst
40
HY57V641620HG
PIN CONFIGURATION
VDD 1 54 VSS
DQ0 2 53 DQ15
VDDQ 3 52 VSSQ
DQ1 4 51 DQ14
DQ2 5 50 DQ13
VSSQ 6 49 VDDQ
DQ3 7 48 DQ12
DQ4 8 47 DQ11
VDDQ 9 46 VSSQ
DQ5 10 45 DQ10
DQ6 11 44 DQ9
VSSQ 12 43 VDDQ
DQ7 13 54pin TSOP II 42 DQ8
VDD 14 400mil x 875mil 41 VSS
LDQM 15 0.8mm pin pitch 40 NC
/WE 16 39 UDQM
/CAS 17 38 CLK
/RAS 18 37 CKE
/CS 19 36 NC
BA0 20 35 A11
BA1 21 34 A9
A10/AP 22 33 A8
A0 23 32 A7
A1 24 31 A6
A2 25 30 A5
A3 26 29 A4
VDD 27 28 VSS
PIN DESCRIPTION
The system clock input. All other inputs are registered to the SDRAM on the
CLK Clock
rising edge of CLK
Controls internal clock signal and when deactivated, the SDRAM will be one
CKE Clock Enable
of the states among power down, suspend or self refresh
CS Chip Select Enables or disables all inputs except CLK, CKE and DQM
LDQM, UDQM Data Input/Output Mask Controls output buffers in read mode and masks input data in write mode
VDD/VSS Power Supply/Ground Power supply for internal circuits and input buffers
NC No Connection No connection
41
HY57V641620HG
CS 1Mx16 Bank 0
State Machine
X decoders
RAS DQ0
Memory DQ1
Column Add
Bank Select Counter
A0 Address
A1 Registers
Address buffers
Burst
Counter
A11
BA0
CAS Latency
BA1 Mode Registers Data Out Control Pipe Line Control
42
VCC
U401
R401 51K 1 32
OSC GND
LED401 2 31 G5 TC402
DOUT GR1
1 S1 LEDAT 3 30 G2 VCC 100uF/16V
DIN GR2 XS401
2 S2 LEDCK 4 29 IR 7
CLK GND
5 S3 VCC LEDST 5 28 G3 VCC 6
STB GR3
7 S4 KEY1 6 27 G6 GND 5
K1 GR4 10K
10 S5 KEY2 7 26 R403 LEDST 4
K2 GND 10K
12 S6 KEY3 8 25 R404 LEDCK 3
K3 VDD 10K
14 S7 9 24 G4 R405 LEDAT 2
VDD GR5 0R
15 S8 S1 10 23 G1 LED R402 1
SEG1/KS1 GR6
16 S9 S2 11 22 G7
SEG2/KS2 SEG12/GR7 XS07
11 G1 C401 S3 12 21 VCC
A SEG3/KS3 SEG11 0R
13 G2 104 13 20 R408 LED
B NC SEG10/KS10
8 G3 S4 14 19 S9
C SEG4/KS4 SEG9/KS9 R410 R411
4 G4 S5 15 18 S8
D SEG5/KS5 SEG8/KS8 1/4W 1/4W
9 G5 S6 16 17 S7
E SEG6/KS6 SEG7/KS7
6 G6
F
3 G7
G
PT6961
TC401 C401 VCC R412 VCC2
LED-SOCK(1) 220uF/16V R409
104 Q402 100R TC403
10K 8050 100uF/16V
VCC1
FRONT SCHEMATIC DIAGRAM
XS402
1 VCC2 VCC1
2 VCC1
3 GND
4 IR
5 KEY1 VCC
6 KEY2
7 KEY3
43
8 S1 R406
9 S2 470
9. SCHEMATIC & PCB WIRING DIAGRAM
1
1
1
1
1
1
1
XS09 U901
LED901 LED902 LED903 LED904 LED905 LED906 LED907 HS0038A2
IR 3
2 LED#
XS403 1 GND LED R407 Q401 C901 1
2
2
2
2
2
2
2
VCC2
S1
S2
D901 D902
1N4148 1N4148 XS901
1 VCC2
XSA01 2 VCC1
1
2 LED# 3 GND
1 GND LEDA01 K901 K904 4 IR
5 KEY1
XS02
KEY1 6 KEY2
K902 K905 7 KEY3
8 S1
2
KEY2 9 S2
K903 K906
XS09
KEY3
FRONT SCHEMATIC DIAGRAM
44
CN505
SD+5V 1
L505 DGND 2
C507 10uH/1A DGND 3
101 +9V +12V 4
XS04
TC503 TC504 C508 DGND 6
470uF/16V 470uF/16V 104
D508 SD+5V 5
HER105 DGND 4
SA+5V 3 CN502
R503 C502 DGND 2 XS06
D502 D503 39K/2W 103/1KV ! +9V 1
1N4007 1N4007
T501 16
R502
D501 D504 C509
120K/2W 15 1 3 SA+5V
1N4007 1N4007 101 IN OUT
2
GND
FB
L502 R504
L503
101 TC511
1M 100uF/16V
45
D511
HER105 VOICE-DET 1
POWER BOARD SCHEMATIC DIAGRAM
3
2
R511 OK 2
220R/1W AGND 3
4 -9V +9V 4
D
FB
C514 -9V 5 CN503
VCC
1 101 TC512 R507 R508 TC513 DGND 6 XS10
GND ZD502
47uF/50V 10K 4.7K 100uF/16V +5V 7
U501 9.1V/1W DGND 8
5L0380R R512 +3.3V 9
330 R510 5.1V
4.7K ZD501 +3.3V 10
C515
104
CN501
FL+ 1 +5V 1
! FL- 2 -9V 2
C506 U502 -21V 3 +9V 3
223 HS817 U503 K DGND 4 AGND 4 CN504
! R501 LM431A R R509 +5V 5 OK 5 XS06
680K 1/2W 12K DET 6
XS05
! A
F501
! T1.6A/250V
BCN502
BC503
SW-SPST ! ~400V 471
BCN501
!
~220V
POWER BOARD SCHEMATIC DIAGRAM
46
OK
R609 10K
R607
TC605 1K C605 100p
22uF/16V -9VA
R613
5.1K
4
MIC602 9 TC603 C607 100P
8 TC601 R603 2 4.7uF/16V
7 560R 1 MIC2 R623 -9VA
4.7uF
6 3 10K
5
4
4 L602
U601A
3
OK SCHEMATIC DIAGRAM
8
R612 4.7K
2 R601 C603 R605 4558 OUT2 2 TC613
1 22K 103 10k 1
+9VA R611 4.7K 3
OUT1 4.7uF/16V
U602A
4558
8
+5V
+9VA
R615
R610 100K
10K
R608
TC606 1K
MIC601 22uF/16V C606 R617 R616
C608 100K 330 VD601
9 100p
102 1N4148
8
7 U601B TC604 VD603
6 TC602 R604 6 4558 4.7uF/16V 6 1N4158
5 L601 560R 7 MIC1 7 R619 DET
4.7u
4 5 5
47
100
3 R618 U602B
2 10K 4558
1 VD602 TC611 R620
R602 C604 R606 1N4148 47uF/16V 1K
22K 103 10K
XS602
XS601
1 +5V 1 OUT1
2 -9V 2 OUT2
3 +9V 3 AGND
4 AGND 4 MIC1
5 OK 5 MIC2
6 DET
XS05 VRB01 VRB02
XS06 10K 10K
R621 R622 MIX MIC 1 OUT1
10ohm1/6W 10ohm1/6W 2 OUT2
1 3 3 1
+9V +9VA -9V -9VA XSB01 3 GND
2
2
XS05 4 MIX
5 MIC
TC615 C601 TC616 C602
47uF/16V
OUT2
OUT1
麦克风副板
OK SCHEMATIC DIAGRAM
48
XS701
1 HS
2 VS JK702
3 SPDIF CC L701 1
4 VCC FB C701
L709
5 Y Y1 G Y- 1 GREEN 102
6 FBSMT 2
7 C TC702
8 1000uF/16V 2
9 Pr LFE L702 3
10 FB
11 Y1 VIEDO 3 BLACK C702
12 TC701 102
13 Pb 220uF R706 L710
14 2.2R FBSMT JK701
15 VIEDO AV8
16 SL L703 4
17 L FB
L707 C703
18 Pb B Pb- 4 BLUE
19 R FBSMT 102 5
20 TC703
21 SL 220uF/16V 5
22 SR L704 6
23 SR FB
L708 C704
24 Pr R Pr- 6
25 CC FBSMT RED 102
26 TC704
27 LFE 220uF/16V
28 RCA-407
L L705 7
XS28
FB
VGND C705
VGND 102 8
R L706 9
FB
C706
102
49
OUTPUT BOARD SCHEMATIC DIAGRAM
10
JK705 WHITE
OPTICAL
R703
SPDIF 1 11
VIN
VCC
68R
2
VCC
C708 12
RED
C707 C711 224 3
GND
105(DNS) 104
JK706
JK704 Pr-
1
V-OUT5 Y-
2
Pb-
3
4
R701 220R 5
SPDIF C710 5
6
104
R702 7
6
8
100R 9
VGND
10
11
7
R704 100R 12
HS
13
VS
14
2
R705 100R 15
TC705 L711
220uF/16V FBSMT HEADER 15
Y 3
JK703
L712 S-VIDEO
C 4
FBSMT
TC706
1
220uF/16V
VGND
OUTPUT BOARD SCHEMATIC DIAGRAM
50
AVCC
R308 R309
100K 10K
R311 IOA
AVCC 10K
XS301 V305
24P0.5mm 3904-S
C328 TC301
24 L301 FBSMT 104 220uF/16V
23 L303 10uH
22 V303 V304 TRCLOSE R303 10K
21 FBSMT 2SK3018-S 2SK3018-S R310 TROPEN R304 10K
L304 R314
20 L305 FBSMT MD11 ENDM R305 10K
22R LDO-AVCC 100K
IOA
10uH
URST
SDATA
SDEN
SCLK
ENDM
STBY
LIMIT
TROUT
TRIN
19 L306 STBY R306 10K
18 L307 FBSMT TC302
PWMOUT2
TRCLOSE
17 L308 FBSMT 47uF/16V
16 LDO2 RVCCIN RFVCC
15 L310 FBSMT E V301
14 L311 FBSMT 2SB1132-S
13 V20
12 R337 0R C327 C326 C338 C339
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
11 L312 FBSMT F DV33 104 104 104 104
L325 FBSMT
10 L314 FBSMT B LDO-AVCC
9 L316 FBSMT A V302
R344 0R
FBSMT
IO9
IO8
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
8 L317 RFO 2SB1132-S LDO1 AVCC
IOB
IOA
RST
GND
SCLK
FBSMT
SDEN
7 IOA
GNDS
VDDS
L318 FBSMT
SDATA
L326
AVDDP
AGNDP
AGNDX
6 L319 FBSMT D TC303 RVCCIN 65 38
XCK16M
HDGATE
UDGATE
FBSMT AGNDF VFO13
DPDMUTE
5 L320 C 47uF/16V 0R 66 37
FBSMT R345 VCON VDD 0R
4 L321 RVCC 67 36 R324
FBSMT AVDDF AGNDX 0R
3 L322
R315 LDO-AVCC
FBSMT 68 35 R325 GND
FBSMT 22R L327 AGNDX AGNDX
2 L323 RFVCC 69 34 C310 27pF R326 DNS HSYNC#
FBSMT AVDDM AGNDX
1 L324 0R OPO 70 33 R327 DNS SW1
R346 COSPHI DPFO
VCC OP- 71 32 R302 27K
HALLCOS DPFN
OP+ 72 31
C329 C330 REFCOS GNDP
73 30 HTRC
104 104 AGNDM HTRC
74 29 C308 C309
HALLSIN TRLP
MIAN SCHEMATIC DIAGRAM
75 28 153 10pF
REFSIN TRLPA
76 27
SINPHI CRTPLP
77 26 CRTP
SW0 CRTP
78 25 RFRP
SW2 HRFRP R301
SW1 79 24 100K
SW1 LRFRP
VCC 80 23 BDO
MOP U301 DEFECT
81 22
MON VDDP
82 21 TEO C304 C305 C306 C307
29
30
AGNDX MT1336E_128 TEO
83 20 CSO 391 391 333 471
R312 R313 R318 R317 AGNDX CSO
C311 104 84 19 RFL
1R 1R 1R 1R CEON LVL
85 18 FEO
CEOP FEO
15 14 86 17 V20
VOTK+ VOFC+ RFGCI V20
GND
GND
16 13 87 16 V1P4
VOTK- VOFC- RFGCU VREFO
51
SL+ 17 12 SP- C312 104 88 15 V2P8
VOLD+ VO2+ RFFGC V2REFO
SL- 18 11 SP+ 89 14
VOLD- VOSL- OSP AVDDT
VCC 19 10 C313 104 90 13
PGND PGND OSN TM4
20 9 91 12 C301 C302 C303 TC307
VNFTK PVCC1 CDD AGNDT
21 8 RFO C314 105(DNS) 92 11 104 104 TC306 104 10uF/16V
PVCC2 VCC CDC TM3
93 10 10uF/16V
C342 CDB TM2
GND TC304 C335 C336 22 7 R319 10K R320 20K D C315 105 94 9
PREGND VINFFC 101 CDA TM1
FMSO 47uF/16V 104 104 23 6 DMSO 95 8
VINLD VOSL DVDRFIN AGNDO
R316 20K 24 5 A C316 105 96 7 RFON
CTK2 VINSL- DVDRFIP RFON
25 4 V1P4 C331 151 DD# 97 6 RFOP
CTK1 VINSL+ R321 20K DVDD RFOP
C334 151 TRSO 26 3 B C317 105 CC# 98 5
VINTK CF2 DVDC AVDDO
V1P4 27 2 BB# 99 4
BIAS CF1 DVDB AGNDX
STBY 28 1 FOSO C C318 105 AA# 100 3 RVCCIN
STBY VINFC DVDA AGNDX
C337 C 101 2
MA WVDD
104 B 102 1
U302 MB WOBSO
BA5954 TC305 C320 C321 C322 C323
47uF/16V 104 104 104 104
MC
MD
SA
SB
AGND
IR
AVDD
SC
SD
CDFOP
CDFON
SVDD
TPI
TNI
SGND
WGAND
AGC1
WAVDD
AGC2
AGC3
MD12
MD11
LDO1
LDO2
RFSUBO
WGND
XS303
C333 27pF OPO XS06
R331 750K R332 0R
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
ADIN 1 SL+
OP- 2 SL- RVCCIN
OP+ 3 LIMIT
4 A
5 SP+ D
R334 R333 R335 6 R307 C319 C324 C325
330K 330K C341 750K 33K 153 104 104
R336 104
1R V1P4
F
E
MD11
LDO1
LDO2
SP-
LOAD+
LOAD-
R322 R323
470R 470R
TROPEN (TRCLOSE1) V307 V308 (TROPEN1) TRCLOSE
8050 8050
R341 V310 R339 (TRCLOSE1)TROPEN
2.2R\1/4W 9014-S 10K
A5V
C255 20pF(DNS) R263
150R VIDEO_Y
2Q15
3906-S
L243 L210
-9V +9V RVCC VCC DV33 AV33 R262 0R 1.8uH C256
150R 101
L205 C254
XS203 FB R224 101
1 L239 FBSMT VOICE-DET
2 L240 FBSMT OKA 0R(DNS) VGND VGND
3 GND A5V
4 L241 FB 2Q01 C2154
5 L242 FB 8050 104
6 TC213 U205E U205F
7 L249 FB 220uF/16V
8 V25 IEC958 R257 10 11 12 13 SPDIF# C258 20pF(DNS) R275
9 L250 FB 150R VIDEO_C
0R
10 GND
11 L218 A5V HCU04 HCU04
C295 C296 C297 C2153 2Q17
12 ASTB FB PDAT0 TC211
104 3906-S
13 L219 FB MUTEA 220uF/16V L211
104 104 104 R274 L244 1.8uH
XS13 0R
TC208 TC207 150R
C294 220uF/16V 220uF/16V C257 C259
104 101 101
A5V AVCC
U208 L209 VGND VGND A5V
BA033FP(DNS) FB
IN
GND
OUT
C261 20pF(DNS) R271
150R
1
2
3
VCC AV33 VIDEO_COMP
MIAN SCHEMATIC DIAGRAM
Y3 2Q16
3906-S
L245 L212 C262
XS205 R270 0R 1.8uH
101
XS17(DNS) 150R
1 HSYNC# C260 A5V
2 VSYNC# 101
3 GND FBSMT(DNS) Y2 VGND VGND
4 B L228 VIDEO_V
5 GND FBSMT(DNS)
6 R L227 VIDEO_U Y1 C264 20pF(DNS) R272
7 GND 150R VIDEO_Y1
FBSMT(DNS)
8 G L226 VIDEO_Y1 U209
9 GND FBSMT(DNS) LM1117MP-2.5(DNS)
L246
52
10 CVBS L225 VIDEO_COMP Y4 2Q13
11 GND 3906-S
GND
OUT
IN
FBSMT(DNS) 0R
12 L224 Lt A5V L213
13 GND R273 1.8uH
FBSMT(DNS)
150R
1
2
3
14 L223 Rt V25 VCC
15 +5V TC203 C263 C265
FBSMT(DNS)
16 L208 +9V C2152 C2151 C2150 10uF/16V 101 101 A5V
17 L251 PDAT0 104 104 104 VGND VGND
FBSMT(DNS)
VGND
XS204
HSYNC# 1 Y5 2Q20
VSYNC# 2 3906-S
IEC958 R256 3 U211 L247 L214
+5V 4 DMA0 23 2 DQ0 R276 0R 1.8uH
150R A0 DQ0
VIDEO_Y 5 DMA1 24 4 DQ1 150R
A1 DQ1 C266 C268
6 DMA2 25 5 DQ2
A2 DQ2 101 101
VIDEO_C 7 DMA3 26 7 DQ3
A3 DQ3
8 DMA4 29 8 DQ4 VGND VGND A5V
A4 DQ4
VIDEO_V 9 DMA5 30 10 DQ5
A5 DQ5
10 DMA6 31 11 DQ6
A6 DQ6
VIDEO_Y1 11 DMA7 32 13 DQ7
A7 DQ7
12 DMA8 33 42 DQ8
A8 DQ8 R281
VIDEO_U 13 DMA9 34 44 DQ9 C270 20pF(DNS)
33R A9 DQ9 150R
14 R283 DMA10 22 45 DQ1
0 VIDEO_V
A10/AP DQ1
0
VIDEO_COMP 15 DMA11 MA11 35 47 DQ1
1
A11 DQ1
1
VDATA3 R241 16 33R BA0 20 48 DQ1
2
R284 BA0/A13 DQ1
2
0R(DNS) Lt 17 BA1 #BA1 21 50 DQ1
3 Y6 2Q14
BA1/A12 DQ1
3
AGND 18 51 DQ1
4 3906-S
DQ1
4
Rt 19 SDCLK 38 53 DQ1
5 L248 L215
R242 CLK DQ1
5 R280 0R 1.8uH
20 SDCKE 37
0R CKE 150R
SL 21 SD33
22 DCS# 19 1 C269 C271
/CS VCC 101 101
SR 23 DRAS# 18 14
/RAS VCC
24 DCAS# 17 27 VGND VGND
/CAS VCC
Cc 25 DWE# 16
/WE
26 SD33
LFE 27 DQM
0 15 3
R243 0R(DNS) DQM
L VCCQ
+9V 28 DQM
1 39 9
DQM
H VCCQ
XS28 43
VCCQ
AGND R244 36 49
NC VCCQ
0R VGND AGND 40
NC C236
6
VSSQ 104
54 12
VSS VSSQ
41 46
VSS VSSQ
28 52
VSS VSSQ
SDRAM 64M
DV33 DV33
L331
DACV33C
U202 V1P4 TC219 FBSMT
AT24C02/X4050 R227 R228 R217 100K 10uF/16V C235 U203 U204
C201 1K 1K 104 SDRAM 512*
16*2 SDRAM 512*
16*2
1 8 104 C230 TC202
DC/NC VCC C2137
0R(DNS) 104 C231
XTALI
2 7 RFRPC R218 DV33 10uF/16V 104 DMA0 21 2 DQ0 DMA0 21 2 DQ16
RST_/NCRST/WP 0R 104 C232 A0 DQ0 A0 DQ0
3 6 SCL HTRC R219 DMA1 22 3 DQ1 DMA1 22 3 DQ17
WP/RST_ SCL R236 A1 DQ1 A1 DQ1
4 5 SDA V2P8 L330 104 TC215 DMA2 23 5 DQ2 DMA2 23 5 DQ18
RFRP
VSS SDA 0R(DNS) FBSMT A2 DQ2 A2 DQ2
C234 47uF/16V L329
FBSMT DMA3 24 6 DQ3 DMA3 24 6 DQ19
TC201 A3 DQ3 A3 DQ3
V25 104 DMA4 27 8 DQ4 DMA4 27 8 DQ20
10uF/16V A4 DQ4 A4 DQ4
GND DMA5 28 9 DQ5 DMA5 28 9 DQ21
A5 DQ5 A5 DQ5
C233
102
C229
104(DNS)
R237 DMA6 29 11 DQ6 DMA6 29 11 DQ22
18K
C207 C202 C203 C204 C205 C206 RFON A6 DQ6 A6 DQ6
C238 102 RFIN V25 1.5K DMA7 30 12 DQ7 DMA7 30 12 DQ23
4.7R(DNS)
104 104 104 104 104 104 A7 DQ7 A7 DQ7
DMA8 31 39 DQ8 DMA8 31 39 DQ24
RFL
FEO
CSO
TEO R216
ADIN
BDO
SCLK
SDEN
SDATA
VGND
Y7
Y6
Y5
VGND
Y4
Y3
VGND
Y2
Y1
VGND
A8 DQ8 A8 DQ8
URST
XI
XO
SPBCK
SPLRCK
SPDATA
SPMCLK
VSDA1
RFOP C239 102 RFIP DMA9 32 40 DQ9 DMA9 32 40 DQ25
HSYNC#
VSYNC#
DACV33A
DACV33B
C227 C253 C208 C209 C210 A9 DQ9 A9 DQ9
RFZC
C211DV33 VGND DMA10 20 42 DQ10 DMA10 20 42 DQ26
R214
RFRPC
104 104 104 104 104 104 A10 DQ1
0 A10 DQ1
0
BA0 19 43 DQ11 BA0 19 43 DQ27
C237 BA/A11 DQ1
1 BA/A11 DQ1
1
45 DQ12 45 DQ28
104 DQ1
2 DQ1
2
AV33 R251 4.7R SDCLK 35 46 DQ13 SDCLK 35 46 DQ29
CLK DQ1
3 CLK DQ1
3
GND 48 DQ14 48 DQ30
DQ1
4 DQ1
4
SDCKE 34 49 DQ15 SDCKE 34 49 DQ31
4.7R CKE DQ1
5 CKE DQ1
5
R252 SD33 SD33
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
C272 C240 TC204 DCS# 18 1 DCS# 18 1
104 104 47uF/16V CS VCC CS VCC
25 25
VCC VCC
DRAS# 17 DRAS# 17
RAS RAS
C
FEI
TEI
LPIOP 7 7
ICE
LV
CSO
RFIP
BDO
VCCQ VCCQ
RFIN
PRST
ADIN
SLCK
DVSS
DVSS
SDEN
YUV7
LPION DCAS# 16 13 DCAS# 16 13
HSYN
VSYN
VFO13
XTALI
HRFZ
WOBSI
SPBCK
CAS VCCQ CAS VCCQ
SDATA
DVDD3
XTALO
DVDD3
DVDD2
RFSUBI
YUV6/R
YUV5/B
YUV4/G
YUV2/Y
YUV1/C
IDGATE
SPLRCK
8.2K 1 162 Y0 38 38
SPDATA
R201
ADCVSS
SPMCLK
TEZIS
UDGATE
RFRP_AC
RFRP_DC
IREF YUV0/CIN VCCQ VCCQ
RFLEVEL
BLAANK#
DACVSSA
DACVSSB
DACVSSB
DACVSSC
ADCVDD3
2 161 FS DWE# 15 44 DWE# 15 44
RFDTSLVP
PWMVREF
DACVDDA
RFDTSLVN
PWM2VREF
PLLVSS FS WE VCCQ WE VCCQ
YUV3/CVBS
C212 103 3 160 VREF
LPIOP VREF
C213 4 159 DACV33C DQM
0 14 4 DQM
2 14 4
LPION DACVDDC DQM
L VSSQ DQM
L VSSQ
103 C214 103 5 158 10 10
LPFON ASDATA4 VSSQ VSSQ
LPFIP 6 157 DQM
1 36 41 DQM
3 36 41
LPFIP ASDATA3 DQM
H VSSQ DQM
H VSSQ
C215 103 7 156 ASDAT2 47 47
LPFIN ASDATA2 VSSQ VSSQ
LPFOP 8 155 ASDAT1 33 33
LPFOP ASDATA1 NC NC
9 154 ASDAT0 37 26 37 26
R202 JITFO ASDATA0 NC VSS NC VSS
JITFO C216 750K 10 153 ASPDIF 50 50
JITFN SPDIF VSS VSS
JITFN 101 11 152 AMDAT
20K PLLVDD3 MC_DATA
FOSO R203 12 151 ACLK
FOO ACLK
MIAN SCHEMATIC DIAGRAM
XI
28 135 A15 2 47
53
U205A DVSS DVSS A14 BYTE
A14 29 134 DQ2
4 1K A14 3 46 GND
14
HIGHA6 MT1379E_216 RD24 A13 Vss
HCU04 C2113 A15 30 133 DQ2
5 A13 4 45 A0
4.7K
4.7K
4.7K
0R
AD5 33 130 A10 7 42 AD6
R238 R239 AD5 DVDD3 A9 DQ6
AD4 34 129 DQ2
8 A9 8 41 AD13
AD4 RD28 A8 DQ13
7
0R(DNS) 0R(DNS) U205B 35 128 DQ2
9 A20 9 40 AD5
DVDD3 RD29 A19 DQ5
R208 100K HCU04 AD3 36 127 DQ3
0 10 39 AD12
R215
R223
R222
XTALI
AD2 37 126 DQ3
1 DWR# 11 38 AD4
AD2 RD31 WE DQ4
R240
AD1 38 125 RSET 12 37 VD
R255 AD1 DVSS RESET Vcc
XO AD0 39 124 DMA3 VP 13 36 AD11
AD0 RA3 NC DQ11
0R A0 40 123 DMA2 14 35 AD3
R209 IOA0 RA2 NC DQ3
A1 41 122 DMA1 15 34 AD10
C222 X201 C223 10R(DNS) IOA1 RA1 RY/BY DQ10
42 121 DMA0 A19 16 33 AD2
27pF 27MHz 27pF DVDD2 RA0 R221 A18 DQ2
A2 43 120 A18 17 32 AD9
IOA2 DVDD2 4.7K(DNS) A17 DQ9
A3 44 119 DMA10 A8 18 31 AD1
IOA3 RA10 A7 DQ1
A4 45 118 BA1 A7 19 30 AD8
IOA4 BA1 A6 DQ8
27MHZ A5 46 117 RDQM0 A6 20 29 AD0
IOA5 DQM0 A5 DQ0
A6 47 116 RDQM1 A5 21 28 DRD#
C2149 IOA6 DQM1 A4 OE
A7 48 115 A4 22 27 GND
10pF(DNS) A16 IOA7 DVSS A3 Vss
49 114 DMA4 A3 23 26 DCE#
A16 RA4 A2 CE
A17 50 113 DMA5 A2 24 25 A1
A17 RA5 A1 A0
A18 51 112 DMA6 AVCC
IOA18 RA6
A19 52 111 8M_FLASH(TSOP)
XS202 IOA19 DVDD3
1 DV33 A20 53 110 DMA7 VD DV33
C224 IOA20 RA7 R2157 VD201 R220
2 RXD GND 54 109
104 APLLVSS DMVSS 10K 1N4148
3 TXD 0R
4 GND AV33 C226 VCC
225 C2146 L206
APLLVDD3
ALE
IOOE#
IOWR#
IOCS#
DVSS
UP1_2
UP1_3
UP1_4
UP1_5
UP1_6
DVDD3
UP1_7
UP3_0
UP3_1
INT0#
IR
DVDD2
UP3_4
UP3_5
UWR#
URD#
DVSS
RD7
RD6
RD5
RD4
DVDD2
RD3
RD2
RD1
RD0
RWE#
CAS#
RAS#
RCS#
BA0
DVSS
RD15
RD14
RD13
RD12
DVDD3
RD11
RD10
RD9
RD8
DVSS
CLK
CLE
RA11
RA9
RA8
DMVDD3
XS04(DNS) 104
ASPDIF R254 33R SPDIF# TC237 FB(DNS)
R212 2Q04
4.7R RDQM3 R249 33RDQM3 47uF/16V
RDQM2 33R DQM 2 9014 5 6 R2159 URST
R248
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
PRD#
PWR#
PCE#
VSCK
VSDA
VSTB
SCL
SDA
VDATA3
6 VCC 4.7R 0R R260 0R(DNS)
DCLK
DCKE
DMA11
DMA9
DMA8
5 GND RST#
4 L201 FBSMT VSTB
33R
33R
33R
33R
33R
33R
33R
33R
XS07
IR
RXD
TXD
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ9
DQ8
C273 C274
R229
R230
R231
R232
R233
101 101
C241 C243 C244
47pF C242 47pF 47pF
47pF
DRD# R2107
DWR# R2108
DCE# R2109
GND
PDAT0
DV33
DWE#
DCAS#
DRAS#
DCS#
BA0
AVCC DV33
R225 R226
+9V 0R(DNS) 0R AVCC
C291 TC236
104 10uF/16V
C278 C279 C280 TC231
104 104 104 C293 C292 U207
R2129 20K R2132 10uF/16V
OKA 104 104 1 28 MUTE1
VLS MUTEC1
AGND 20K SDATA0 2 27 LL
SDIN1 AOUTA1
C2111 101 SDATA1 3 26 RR
8
C2116 SDIN2 AOUTB1
-9V SDATA2 4 25 MUTE2
+9V 102 SDIN3 MUTEC2
SBCLK 5 24 LS
R2130 R2131 R2136 6.8K SCLK AOUTA2
TC240 2 SLRCK 6 23 RS
LRCK AOUTB2
1 4.7K 4.7K SACLK 7 22
C2122 MCLK VA
C281 C282 C283 3 8 21
C2112 122 VD GND
104 104 104 10uF/16V U219A 9 20 C#
102 GND AOUTA3
4580 AGND RST# 10 19 LFE#
-9V RST AOUTB3
4
AGND SCL 11 18 MUTE3
SCL MUTEC3
SDA 12 17
SDA VQ
AGND 13 16
20K R2156 CS FILT+
R2133 14 15
R282 VLC M2 C290 TC233
20K 104 10uF/16V
C2114 101 0R CS4360
8
Rt R2117 CH-R
+9V
2Q05 1K R2134 R2135 R2148 6.8K C289 TC232
6
2SC1815-YS TC241 7 104 10uF/16V
R2118 4.7K 4.7K
R2111 CH-L 5 C2129
100K C2115 122
1K U219B
10uF/16V 4580 102 AGND
-9V
4
AGND
AGND R2137 20K TC225 10uF/16V
R2112 R2119 R RR
100K
1K
2Q06 C2117 101 TC226 10uF/16V
8
2SC1815-YS R2120 L LL
MIAN SCHEMATIC DIAGRAM
1K +9V
Lt
TC221 2 R2138 R2139 R2152 6.8K C2132
SR R2121 CH-SR 1 683(DNS)
4.7K 4.7K
3 C2130
1K
10uF/16V C2118 122
R2122 U220A
R2113 4580 102
100K -9V
4
1K
2Q07 AGND
AGND 2SC1815-YS C2119 SR# RS
R2141 20K 0R TC227
10uF/16V
R2123 MUTE-1 LS
R2114 C2120
1K 101 TC228
8
100K 2Q08 C2131 10uF/16V
+9V
54
2SC1815-YS 0R
R2124 R2142 R2143 R2153 6.8K
SL TC222 6 SL#
1K CH-SL 7 4.7K 4.7K
5 C2133 C2138
LFE R2125 10uF/16V U220B C2121 122
4580 102
1K -9V
4
683(DNS)
R2115 R2126 SW LFE#
100K R2145 20K AGND TC229
1K
2Q09 10uF/16V
C2123 101
2SC1815-YS /C C#
8
R2127 +9V
AGND
1K R2146 R2147 R2154 6.8K TC230
TC223 2 10uF/16V
R2116 CH-SW 1 4.7K 4.7K
100K 2Q10 3 C2135
2SC1815-YS 10uF/16V U221A C2124 122 MUTEA R297 0R VOICE-DET
Cc 4580 102
-9V
4
R2128 R267
1K +9V 1K 2Q18
R2149 AGND VCC 1015 MUTE-1
20K VD207 VD206
C2126 1N4148 R2105 1N4148
101 MUTE1 1K 2Q19 +9V
8
C2134 TC238 R266 1015
+9V 683(DNS) VD208 2.2uF/16V(DNS) 1K
TC224 6 R2150 R2151 R2155 6.8K 1N4148 R2106 2Q12 VD205 TC235
1K
CH-C 7 MUTE2 2Q11 2SC1815-Y 1N4148 220uF/16V
4.7K 4.7K
AVCC 5 C2136 C2128 1015
10uF/16V C2127 122 VD209 R265 AGND
4580 102 1N4148 R253 10K
C287 TC242 C288 -9V U221B
4
R269
0R(DNS)
R279
0R(DNS)
AMDAT
R278
0R(DNS)
R268
0R(DNS)
MIAN SCHEMATIC DIAGRAM
55
10. SPARE PARTS LIST
STC-9630 MATERIAL LIST
1. DECODE BOARD
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
C2119,C2128,C2131,L243~L248,R205,R
1 SMD RESISTOR 1/16W 0Ω ±5% 24 219,R220,R226,R240,R241,R244,R255,R
257,R259,R282,R332,R337,R2162,R297
R2107~R2109,R2159,R229~R235,R246,
8 SMD RESISTOR 1/16W 33Ω ±5% 22
R247,R254,R283,R284,R291~R296
R227,R228,R266,R267,R2105,R2106,R2
12 SMD RESISTOR 1/16W 1K ±5% 20
117~R2128,R2158,R2160
R222,R223,R211,R2130,R2131,R2134,R
14 SMD RESISTOR 1/16W 4.7K ±5% 16 2135,R2138,R2139,R2142,R2143,R2146,
R2147,R2150,R2151,R285
R206,R250,R265,R303~R306,R309,R311
17 SMD RESISTOR 1/16W 10K ±5% 12
,R319,R339,R2157
R2129,R2133,R2137,R2141,R2145,R214
21 SMD RESISTOR 1/16W24K±5% 8
9,R2132,R2156
TC201,TC202,TC203,TC217,TC219,TC
28 CD CD11 16V10U±20%5×11 2 23 221~TC233,TC236,TC240,TC241,TC30
6,TC307
TC207,TC208,TC211,TC213,TC235,TC
29 CD CD11 16V220U±20%6×12 2.5 6 301
TC204,TC206,TC215,TC234,TC237,TC
30 CD CD11 16V47U±20%5×11 2 11 302~TC305,TC308,TC309
56
C225,C241,C242,C243,C254,C256,C257,
33 SMD CAPACITOR 50V 47P ±5% NPO 0603 14
C259,C260,C262,C266,C268,C269,C271
C216,C273,C274,C342,C2111,C2114,C2
34 SMD CAPACITOR 50V 101 ±5% NPO 0603 10
117,C2120,C2123,C2126
35 SMD CAPACITOR 50V 331 ±5% NPO 0603 2 C217,C218
36 SMD CAPACITOR 50V 151 ±5% NPO 0603 2 C331,C334
37 SMD CAPACITOR 50V 471 ±5% NPO 0603 1 C311
38 SMD CAPACITOR 50V 82P ±5% NPO 0603 1 C305
39 SMD CAPACITOR 50V 391 ±10% 0603 1 C304
C201~C211,C221,C224,C227,C230~C23
2,C234,~C237,C240,C246,C247,C251~C
253,C272,C278~C283,C289~C297,C301
40 SMD CAPACITOR 50V 104 +80%-20% 0603 74
~C303,C312~C313,C320~C330,C332,C3
35~C339,C341,C2113,C2137,C2146,C21
50~C2154
C201~C211,C221,C224,C227,C230~C23
2,C234,~C237,C240,C246,C247,C251~C
253,C272,C278~C283,C289~C297,C301
40.1 SMD CAPACITOR 25V 104 +80%-20% 0603 74
~C303,C312~C313,C320~C330,C332,C3
35~C339,C341,C2113,C2137,C2146,C21
50~C2154
C2122,C2129,C2130,C2133,C2135,C213
44 SMD CAPACITOR 50V 122 ±10% 0603 6
6
L201~L203,L216,L239,L240,L301,L304,
51 SMD MAGNETIC BEADS FCM1608K-221T05 30 L305,L307,L308,L310,L311,L312,L314,
L316~L324,L329~L331,L325,L326,L327
57
60 SMD TRIODE 3904 1 V305
61 SMD TRIODE 9014C 1 V310
62 SMD TRIODE 2SK3018 2 V303,V304
63 SMD TRIODE 2SB1132 2 V301,V302
64 IC NJM4558M SOP 3 U219,U220,U221
64.1 IC 4580 SOP 3 U219,U220,U221
64.2 IC 4558 SOP 3 U219,U220,U221
65 IC MM74HCU04M SOP 1 U205
65.1 IC HCU04 SOP 1 U205
66 IC HY57V641620HGT-7 TSOP 1 U211
66.1 IC MT48LC4M16A2-7 SOP 1 U211
67 IC CS4360 SSOP 1 U207
68 IC 24C02N SOP 1 U202
69 IC MT1336E-C QFP 1 U301
70 IC MT1379EE-C QFP 1 U201
71 IC BA5954FP HSOP 1 U302
72 CRYSTAL OSCILLATOR 27.00MHz 49-S 1 X201
14P 1.0mm STRAIGHT DUAL LINE
73 CABLE SOCKET 1 XS204
PLUG
74 PCB 2963-0 1
2. POWER BOARD
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
1 CARBON FILM RESISTOR 1/4W33Ω±5% SHAPED 10 1 R505
2 CARBON FILM RESISTOR 1/4W330Ω±5% SHAPED 10 1 R506
3 METAL OXIDE FILM RESISTOR 1W330Ω±5% SHAPED R 15×8 1 R511
4 CARBON FILM RESISTOR 1/4W10K±5% SHAPED 10 1 R507
5 CARBON FILM RESISTOR 1/4W1MΩ±5% SHAPED 10 1 R504
6 METAL FILM RESISTOR 1/4W4.7K±1% 1 R508
7 METAL FILM RESISTOR 1/4W12K±1% SHAPED 10 1 R509
8 METAL OXIDE FILM RESISTOR 2W39K±5% SHAPED FLAT 15×9 1 R503
8.1 METAL OXIDE FILM RESISTOR 2W39K±5% SHAPED FLAT 15×7 1 R503
9 METAL OXIDE FILM RESISTOR 2W120K±5% SHAPED FLAT 15×7 1 R502
10 HIGH VOLTAGE RESISTOR 1/2W680K±5% 1 R501
11 PORCELAIN CAPACITOR 50V 100P ±10% 5mm 5 C505,C507,C509,C511,C514
12 PORCELAIN CAPACITOR 50V 104 ±20% 5mm 4 C504,C508,C510,C515
13 PORCELAIN CAPACITOR 1000V 101 +80%-20% 7.5mm 1 C503
13.1 PORCELAIN CAPACITOR 1000V 101 ±10% 7.5mm 1 C503
14 PORCELAIN CAPACITOR 1000V 103 +80%-20% 7.5mm 1 C502
15 CERAMIC CAPACITOR CT81 400V 221±20% 10mm 1 BC503
58
15.1 CERAMIC CAPACITOR CT81 400V221±10% 10mm 1 BC503
16 TERYLENE CAPACITOR 100V 223 ±10% 5mm 1 C506
17 TERYLENE CAPACITOR 275V 104 ±20% 15mm 1 BC501
17.1 TERYLENE CAPACITOR 275V 104 ±10% 15mm 1 BC501
18 CD GZ16V100U±20%6×12 2.5 2 TC508,TC513
18.1 CD CD11 16V100U±20%6×12 2.5 2 TC508,TC513
18.2 CD CD110 16V100U±20%6×12 2.5 2 TC508,TC513
18.3 CD CD11C 16V100U+20%-15%6×7 2.5 2 TC508,TC513
18.4 CD CD11C 16V100U±20%6×7 2.5 2 TC508,TC513
19 CD CD11 25V470U+20%-10%10×16 5 2 TC503,TC504
19.1 CD CD11 25V470U±20%10×16 5 2 TC503,TC504
20 CD CD11 50V47U±20%6×12 2.5 2 TC502,TC512
21 CD CD11 10V1000U±20%8×16 3.5 4 TC505,TC506,TC509,TC510
21.1 CD CD11 10V1000U±20%8×14 3.5 4 TC505,TC506,TC509,TC510
21.2 CD GS 10V1000U±20%8×16 3.5 4 TC505,TC506,TC509,TC510
21.3 CD GS 10V1000U±20%8×14 3.5 4 TC505,TC506,TC509,TC510
22 CD LP3 400V47U±20%22×28 10 1 TC501
22.1 CD LS 400V47U±20%22×25 10 1 TC501
23 MAGNETIC BEADS INDUCTOR RH354708 1 L503
24 CHOKE COIL VERTICAL 10UH 1A 5mm 1 L505
25 CHOKE COIL VERTICAL 10UH 2A 5mm 2 L506,L507
SWITCHING POWER
26 BCK-28-0286 1 T501
TRANSFORMER
SWITCHING POWER
26.1 BCK2801-624 1 T501
TRANSFORMER
27 DIODE HER105 3 D506,D508,D511
28 DIODE HER306 1 D510
29 SCHOTTKY DIODE SR360 1 D509
30 DIODE HER107 1 D505
31 DIODE 1N4007 4 D501~D504
32 VOLTAGE REGULATOR DIODE 9.1V 1W 1 ZD502
33 IC 5L0380R YDTU 1 U501
34 IC LM431ACZ TO-92 1 U503
34.1 IC TL431C TO-226AA(LP) 1 U503
34.2 IC 431L TO-92 1 U503
34.3 IC KA431AZ TO-92 1 U503
35 POWER GRID FILTER UT-20 40mH ±20% 10×13 1 L501
36 PHOTOELECTRIC COUPLER HS817 1 U502
37 IC LM7805 GOLD SEALED TO-220 1 U504
38 PCB 5933-0 1
39 SOCKET 9P 2.5mm 1 CN503
40 SOCKET 2P 2.5mm 1 CN502
41 SOCKET 6P 2.5mm 1 CN504
42 SOCKET 2P 8.0mm 2# 2 BCN501,BCN502
43 CONNECTION CORDS Φ0.6 SHAPED 7.5mm 2 J506,J503
44 CONNECTION CORDS Φ0.6 SHAPED 10mm 4 L502,J501,J505
45 CONNECTION CORDS Φ0.6 SHAPED 12.5mm 2 J504,J502
46 FUSE T1.6AL 250V(VDE) 1 F501
59
47 FUSE HOLDER BLX-2 1 FOR F501
48 HEAT RADIATOR BOARD 11×15×25 AB009K 2 U501,U504 FOR HEAT RADIATION
48.1 HEAT RADIATOR BOARD 11×15×25 WHITE AB905 2 U501,U504 FOR HEAT RADIATION
49 GROUND CHIP OF POWER BOARD AB903 2 G501~G502
50 TAPPING SCREW BT 3×8 BLACK 2 FIXED HEAT RADIATION BOARD
3. OK BOARD
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
1 CARBON FILM RESISTOR 1/6W560Ω±5% 2 R603,R604
2 SMD RESISTOR 1/16W 1K ±5% 3 R607,R608,R619
3 CARBON FILM RESISTOR 1/6W1K±5% 2 R611,R626
4 CARBON FILM RESISTOR 1/6W4.7K±5% SHAPED 7.5 2 R622,R628
5 SMD RESISTOR 1/16W 5.1K ±5% 1 R616
6 SMD RESISTOR 1/16W 10K ±5% 5 R605,R606,R617,R621,R624
7 CARBON FILM RESISTOR 1/6W10K±5% 2 R612,R620
9 SMD RESISTOR 1/16W 22K ±5% 2 R602,R601
10 CARBON FILM RESISTOR 1/6W10Ω±5% SHAPED 7.5 2 R632,R633
11 SMD RESISTOR 1/16W 15K ±5% 2 R614,R618
12 SMD RESISTOR 1/16W 18K ±5% 1 R615
13 CARBON FILM RESISTOR 1/6W27K±5% 1 R629
14 SMD RESISTOR 1/16W 30K ±5% 3 R613,R609,R610
15 SMD CAPACITOR 50V 101 ±5% NPO 0603 4 C607,C620,C605,C606
16 SMD CAPACITOR 50V 561 ±10% 0603 2 C610,C612
17 SMD CAPACITOR 50V 103 ±10% 0603 4 C603,C604,C616,C619
4. OK SUBSIDIARY BOARD
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
60
1 ROTATED POTENTIOMETER WHE101N-2-B10K±20% 1 VRB02
4 PCB B963A-1 1
5. AV BOARD
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
1 CARBON FILM RESISTOR 1/4W100Ω±5% 1 R702
2 CARBON FILM RESISTOR 1/4W68Ω±5% 1 R703
3 CARBON FILM RESISTOR 1/4W2.2Ω±5% 1 R706
4 CARBON FILM RESISTOR 1/4W220Ω±5% 1 R701
5 SMD CAPACITOR 50V 102 ±10% 0603 6 C701~C706
6 PORCELAIN CAPACITOR 50V 104 ±20% 5mm 1 C710
6.1 PORCELAIN CAPACITOR 50V 104 +80%-20% 5mm 1 C710
MULTILAYER CERAMIC
7 50V 224 ±20% 5mm 1 C708
CAPACITOR
MULTILAYER CERAMIC
7.1 50V 224 ±10% 5mm 1 C708
CAPACITOR
19 PCB 7939A-1 1
61
6 IC PT6961 SOP 1 U401
7 SOCKET 2P 2.0mm 1 XS403
8 SOCKET 9P 2.0mm 1 XS402
9 SOCKET 6P 2.0mm 1 XS401
11 SMD RESISTOR 1/16W 100Ω ±5% 1 R412
12 SMD RESISTOR 1/16W 2.2Ω ±5% 1 R408
13 SMD RESISTOR 1/16W 10K ±5% 3 R403,R404,R405
14 SMD RESISTOR 1/16W 51K ±5% 1 R401
15 SMD CAPACITOR 50V 104 +80%-20% 0603 1 C401
16 PCB 4963-2 1
7. SUBSIDIARY BOARD 1
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
8. SUBSIDIARY BOARD 2
NO MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
1 SMD CAPACITOR 50V 104 +80%-20% 0603 1 C901
4 SMD DIODE 1N4148 2 D901,D902
5 LIGHT TOUCH RESTORE SWITCH VERTICAL 6×7×1 1 K906
6 SMD LIGHT TOUCH SWITCH TD-BXAX-A00(160 GRAM POWER) 5 K901~K905
9P70 2.0 2 SOCKET WITH L NEEDLE,
7 SOFT FLAT CABLE 1 XS901
THE SAME DIRECTION
8 IR SENSOR HS0038B3V 1 U901
12 PCB 9963-0 1
62
ENGLISH
STC-9630
Service manual
STC-9630 SERVICE MANUAL
CAUTIONS
There is high voltage inside this unit. Make sure to pull out the plug of this unit before
repairing!
There are many high voltage components inside this unit. Please pay attention to all
warnings and instructions marked on this unit to avoid electric shock!
Specifications of the replaced components must be the same as that of the original
components. Do not change the components' specifications to prevent risks!
CONTENTS
CAUTIONS
1 STC-9630 FEATURES
STC-9630 FEATURES
5.1CH volume and level adjustment incorporate IC PT2258 and realize the standby and mute
functions.
CPU incorporates IC AT89C2051.
Small signal amplification and amplified LPF incorporate IC NJM4558.
Power amplification of L, R, SL and SR channels incorporates power IC TDA7377.
Power amplification of the C channel employs power IC TDA2003.
Power amplification of the SW channel employs two LM1875 to form BTL.
Status display employs a LED digital tube, displayed range: 0~16.
Full function remote control.
Square power transformer, bridge and full wave rectifying circuit.
Satellite speakers employ plastic body. Subwoofer speaker's body employs xyloid MDF
construction with PVC cover.
Satellite speakers employ 3-inch wide frequency band high performance unit.
Subwoofer incorporates 6.5-inch aluminum audio coil with dual magnetic circuits exclusively for
the subwoofer unit.
All-in-one flat radiator board with long radiator sluts for excellent heat radiation.
1
STC-9630 SERVICE MANUAL
CIRCUIT CONNECTION
DIAGRAM
OUTPUT BOARD
1. GND 1. GND
2. GND 2. GND
3. C 3. C
INPUT BOARD 4. SR 4. SR XP4
XS4
1. SW 1. SW 1. L 1. L
2. SR 2. SR 2. R 2. R
3. SL 3. SL 3. SL 3. SL
XP2 4. C 4. C XS2
1. R 1. R
2. L 2. L XS3
3.GND 3. GND SW SPEAKER
3. b1+c1
11.GND
2. RM
1. Vs
4. a2
5. b2
6. c2
7. d2
8. e2
10.g2
9. f2
+
-
3. b1+c1
11.GND
2. RM
1. Vs
4. a2
5. b2
6. c2
7. d2
8. e2
10.g2
9. f2
XP3
SW
FRONT PANEL'S BOARD
BLOCK DIAGRAM L
L R SL SR SL
INPUT BOARD
POWER
BUFFER
AMPLIFICATION
SR
L
L R SL SR
R
C
C
5.1CH VOLUME C
C
SW CONTROL
INPUT POWER
L R SW AMPLIFICATION
SL
SR
LPF
SW
AMPLIFICATION
SW
POWER
AMPLIFICATION
OUTPUT BOARD
CPU
LED
REMOTE
CONTROL
RECEPTION
POWER
SUPPLY
DISPLAY
2
STC-9630 SERVICE MANUAL
3
STC-9630 SERVICE MANUAL
4
VD412
Vs VD401~VD404
1N4004 RL254 C403
VD413 A+18V +12V
4700u/25V R401
7
13
3
XS1 C401T4AL250V C406 VD410
224 12V C410
470u/16V 104 -12V N410
1 104 A-18V R402
TDA7370B
From Trans. 2
220/0.5W C447 XS5
3
S-B
Vcc
Vcc
C4044700u/25V
C402 L 4
FL402 IN1 1 C455
3PIN 224 VD405 N401 C448 OUT1 1 GND
RL254 224 2
B+18V 7809 +9V +5V SR 5 220u/25V
R403 IN2 3 C
1 Vin Vout 3 C449 OUT2 2 C454 4 SR
T4AL250V VD406 224 To Sub-AMP Board
180 R 12 5 L
IN3 220u/25V
GND
C414 C450 15 C453 6 R
C411 C413 VD411 224 OUT3 7 SL
RL254 C412 47u/16V SL 11
4700u/25V 104 5.1V IN4
2
220u/16V 220u/25V 7PIN
C451
224 14 C452
6 OUT4
SVR
220u/25V
PG
SG
C.D
+5V 47u/16V
RESET Vs
XS3
8
9
REMOTEC416
10
C415 104 R405 680 1 Vs
10u/16V 2 REMOTE
R406 1.5k 3 b1+c1
N402 4 a2
1 20 R407 1.5k 5 b2
RST/Vpp Vcc
C417 2 P3.0 P1.7
19 6 c2
R404 3 18 R408 1.5k 7 d2 To Display Board
10k P3.1 P1.6
4 XTAL2 P1.5
17 8 e2
20p G401 5 16 R409 1.5k 9 f2
4M XTAL1 P1.4
6 15 10 g2 B+18V
P3.2 P1.3
7 14 R410 1.5k 11 GND
P3.3 P1.2
C418 8 13 12 g1
P3.4 P1.1 C458
20p 9 P3.5 P1.0
12 R411 1.5k 11PIN N409
10 11 104
GND P3.7 TDA2003
5
5
22k 47k
R466 C462 2.2u/16V2
N405B -
10k 151 R459 220u/25V
5 4558
3
R433
C419 100k C428
R415 2.2u/16V 151 470u/25V R462
4.7k R434 R435 2.2 C445
R460 104
10k 12k
8
R416 R417 +12V 47
N405A
22k 150k N403 C427
1 20 3 4558
C420 IN1 OUT1 1 A+18V
R418 2.2u/16V C429 2
5
22k 2.2u/16V
2 IN2 OUT2
19 C461 N408
R458 1 LM1875
C431 R436 151 +
4
R419 R420 3 18 2.2u/16V -12V 22k 4
IN3 OUT3 100k 2
4.7k 150k C430 R444 - R457
+9V
R421 2.2u/16V 151
3
4
C 4 C422 C433 -12V 4 GND
2.2u/16V N406A
SL 3 R424 8 13 A+18V
IN4 OUT4 R440 4PIN
SR 2 2 4558
5
C434
100k +12V
STC-9630 SERVICE MANUAL
STC-9630 SERVICE MANUAL
Y303
GSA DC12V
XP5
GND 1
2
C 3
From Sub-AMP Board
SR 4
L 5 VD305
R 6
SL 7
7PIN 1N4148
Y302
GSA DC12V
XS4
1 GND
2
3 C
4 SR To Output Board
5 L
R301 R302 R303 R304 R305 6 R
100 100 100 100 100 VD304 7 SL
7PIN
1N4148
Y301
GSA DC12V
XS8
XS7 1
1 C301 V302 2 To SW Speaker
2 330u/25V R308 S8050 3
From Sub-AMP Board
Vs 3 3PIN
GND 4 20/2W
4PIN R306 VD303
4.7k
VD301 V301
R307 1N4148 9014
56k 1N4148
VD302
6.8V
C302
47u/25V V303
S8050
XP6
1 GND XJ4
2 XJ6
2PIN
NOTE:
When repairing the power amplifying board, make sure that the IC is fixed to the big radiator board closely
and rightly without any inclination in assembling the Power IC N407, N408, N409 and N410. A silicon oiled
mica spacer needs to be placed between the IC and the big radiator board. When fixing the screws of the
Power IC N407, N408, N409 and N410, the insulating spacers need to be placed between the screws and
the Power IC. A multimeter can be used to detect whether the insulation is effective or not. Otherwise, a
short circuit may be resulted to burn out the Ics.
6
STC-9630 SERVICE MANUAL
2. INPUT BOARD
MAIN PARTS LIST OF THE INPUT BOARD
XP2
C 7
6
5
4
Signal Source 3 To Power AMP Board
SL 2
1
7PIN
SR
SW
7
STC-9630 SERVICE MANUAL
+5V
J?
LED4
COMMON ANODE
6
N901
HS0038B
REMOTE
1
3 2 14 3 1110 8 7 5 12 9 13
b1
c1
a2
b2
c2
d2
e2
f2
g2
g1
Vs
C901
104
1
2
3
4
5
6
7
8
9
10
11
12
XP3 12PIN
8
STC-9630 SERVICE MANUAL
MAIN PARTS LIST OF THE POWER SWITCH AND POWER IC OF THE AMP BOARD
MAIN PARTS LIST O F THE PO WER SWITCH AN D PO WER IC OF THE AMP BO ARD
NO. DESCRIPTION SPECIFICATIONS/PART NUMBER LOCATION SPECIFICATIONS
1 Porcelain Capacitor CT7 400V 103 ±20% 10mm PO WER S WITC H
2 Power S witch PS8-11 2#
3 Mains Cords 2P1.9m10A STC-999(MX)
4 Fuse Tube T1.6AL 250V FUS E TUBE HOLDER
5 Mica S pacer 24×22×0.1 N410
Mica S pacer 22×20×0.1 N410
6 Insulation Cannular 3×6×3 N407~N410
Pyrocondensat ion
7 25 PO WER S WITC H
Cannular
8 Mica S pacer 18×13×0.1 N407,N408,N409
SW 6A/250V
L FL TRANS XP1
L250V
T1.6A C ~14V 1 To AMP Bo ard
~110V N 2
50Hz ~14V 3
E 0.01u/400V
3.96
3PIN
TK6301500
9
STC-9630 SERVICE MANUAL
Features:
1N1 1dB/Step
OUT1
10dB/Step
Ref
10dB/Step
OUT2
1N2 1dB/Step
1N3 1dB/Step
OUT3
10dB/Step
Ref
10dB/Step
OUT4
1N4 1dB/Step
1N5 1dB/Step
OUT5
10dB/Step
Ref
10dB/Step
OUT6
1N6 1dB/Step
VCC
10
STC-9630 SERVICE MANUAL
PDIP/SOIC
15 OUT 3
RST/VPP 1 20 VCC OUT 4
14
(RX1) P3.0 2 19 P1.7 13 VCC
(TX1) P3.1 12 INPUT 3
3 18 P1.6
11 INPUT 4
XTAL2 4 17 P1.5 10 CLIP DET
XTAL1 5 16 P1.4 9 S-GND
8 PW-GND
(INT0) P3.2 6 15 P1.3
7 STAND-BY
(INT1) P3.3 7 14 P1.2 6 SUR
(T0) P3.4 8 13 P1.1 (AIN1) 5 INPUT 2
4 INPUT 1
(T1) P3.5 9 12 P1.0 (AIN0)
3 VCC
GND 10 11 P3.7 2 OUT 2
1 OUT 1
Features: Features:
11
STC-9630 SERVICE MANUAL
Features: Features:
12