A Tutorial Introduction

to Power Factor Correction

Christophe Basso
Business Development Manager
IEEE Senior Member

August 2022 – Rev 0.36

 Agenda

▪ Notions of Power Factor

▪ Power Factor Correction Structures
▪ Processing the Power
▪ Loop Compensation of a PFC
▪ Solutions from Future Suppliers
 What is Power Factor?
▪ The goal of any power factor correction circuit is to emulate a resistance
➢ The absorbed current must be sinusoidal and in phase with the input voltage
vin ( t )
vin ( t ) pin ( t ) = iin ( t ) vin ( t ) = vin ( t )
R
iin Tline
1
Pin , avg =  pin ( t )  dt = 70 W
vin Tline 0

iin ( t ) Pin , app = Vin , rms  I in , rms = 85  823m = 70 VA

70 W active power [W]

PF = = =1
Tline apparent power [V  A]

vin ( t ) Tline
1
Pin , avg =  pin ( t )  dt = 70 W
iin Tline 0

vin
Pin , app = Vin , rms  I in , rms = 85  1.46 = 124 VA
iin ( t )
active power [W]
70 W PF = = = 0.56
apparent power [V  A]
 What is the Impact of a Low PF?
▪ Assume a 250-W load absorbed by an equipment from a 110-V 15-A ac outlet
▪ With a PF of 0.56, the current is 250/110/0.56  4 A rms
✓ You can safely connect a maximum of 3 devices (15/4 = 3.75)
Iin,rms = 4 A

110 V – 15 A x3
Pmax = 1.65 kVA 250 W – PF = 0.56

▪ Add a front-end power factor correction stage to bring PF close to unity

Iin,rms = 2.3 A
You can safely
connect 6
workstations
110 V – 15 A x6
Pmax = 1.65 kVA PFC 250 W – PF = 0.99
 Explaining Power Factor with Beer
▪ A low power factor will force the circulation of a higher rms current
▪ Electric wires can overheat and utility companies push for power factor correction
✓ A glass of beer with an excessive foam can help appreciate the issue
Useless
circulating
power

Apparent
power S
supplied by
the utility
[VA] [W] [VAR]
S = P + jQ
If PF < 0.95
P
= P2 + Q2
Average power PF Q  VAR   33%  P  W 
contributing 1
Q=P −1
the work PF2
[Link]
 Power Factor and Distortion
▪ Power factor depends on two parameters:
Fundamental rms current
I1, rms ✓ kd represents the distortion factor
PF = cos  = kd k
I rms ✓ k designates the displacement angle
Total rms current
For a displacement angle k of 1:
v (t ) v (t )
1
THD = 30%, PF = 0.958
i (t )
THD = 10% PF = 0.995
i (t )
0.9
THD = 5% PF = 0.999
kd < 1, k < 1 kd < 1, k = 1 PF

v (t ) v (t ) 0.8

PF =
1 Check harmonics
i (t ) THD limits according to
i (t ) 1+
100 IEC1000-3-2
0.7
0 20 40 60 80 100
kd = 1, k < 1 kd = 1, k = 1 THD (%)
 Equipment Compliance
▪ The standard EN61000-3-2 defines the class of equipment and associated limits

Class C Class B Enter

yes yes

Lighting no Portable no 3-phase

equipment? tool? equipment?
Class D limits
no
yes
yes Motor yes
PC/monitor Class A
equipment?
TV?

no
no Class D
Pin > 75 W Pin > 75 W

J. Turchi, D. Dalal, Power Factor Correction: from Basics to Optimization, Technical Seminar, APEC 2014
 The Need for Storage
▪ The goal of a PFC front-end converter is to emulate a resistive load
▪ The power of a single-phase ac source feeding a resistance involves a squared sinewave
F = 100 Hz
300
vin ( t ) pin ( t )
Power
excess
Pin = 150 W
pin ( t ) = 150 W
iin ( t ) (W)
pin ( t ) = vin ( t )  iin ( t )
Power
F = 50 Hz shortage

0 10 20 30 40
▪ Active power factor stores and release energy (ms)
Release 420 V
vin ( t )
energy ✓ Output voltage
Store 400 V ripple is twice the
energy
Output
input frequency
capacitor vout ( t ) 380 V
 Agenda

▪ Notions of Power Factor

▪ Power Factor Correction Structures
▪ Processing the Power
▪ Loop Compensation of a PFC
▪ Solutions from Future Suppliers
 Passive Power Factor Correction
▪ Capacitor refueling in a full-bridge rectifier is confined at the sinewave peak
▪ A very narrow spike is generated, rich of numerous harmonics
✓ Spreading the current across the sinewave smooths the current signature
vin ( t )

L1 = 34 mH
choke
iin ( t )

L1 = 0 H

Pout = 100 W
❖ Choke is bulky, heavy and induces mechanical stress Iin,rms = 1.8 A without L
❖ Reduces rms current but marginal results harmonic-wise Iin,rms = 1.2 A with L = 34 mH
 Active Power Factor Correction
▪ An active PFC forces a sinusoidal current absorption in phase with the voltage
▪ A boost converter is traditionally employed for this operation
100- or
120-Hz ripple

vrec ( t ) 400 V
vout ( t )
iL ( t ) id ( t ) ✓ The rectified input
iin ( t ) DRV RL
voltage sets the inductor
Cbulk current envelope

iSW ( t ) ✓ The inductor current is

adjusted to match power
demand
iin ( t ) iL ( t )
 Conduction Mode – BCM or CrM
▪ Inductor current reduces to 0 A before a new cycle starts in borderline conduction mode
✓ Well suited for power levels up to 300 W or higher with interleaved version
✓ Near-zero-voltage switching in some conditions
✓ Discontinuous operation reduces trr-related power dissipation on the diode
Ip
iL ( t ) iL ( t )
Ip
ton toff
Ip
iL ( t ) =
2

0A
Averaged inductor current

❖ Variable-frequency switching makes light-load operation less efficient

❖ Internal frequency clamp or foldback is generally implemented to reduce losses
❖ Large circulating currents inducing conduction (rms) and core losses (IL)
CrM: CRitical Conduction Mode
 Conduction Mode - CCM
▪ The inductor current never touches zero within a switching cycle
✓ Continuous conduction mode is well suited for high-power converters > 300 W
✓ Current can be monitored by an independent loop for best distortion figures
✓ Circulating rms currents are minimized with a moderately-low ripple current

iL ( t ) iL ( t )
iL ( t )

Averaged inductor current

0A

❖ CCM induces switching losses and low-trr diodes or SiC types are mandatory
❖ Larger inductance value compared to BCM operation
❖ Two loops to stabilize in the classical multiplier-based approach
 Single-Stage Converters
▪ It is possible to combine a PFC stage with an isolated flyback converter
▪ This single-stage approach is well adapted to power levels up to 100-150 W
✓ The components count is reduced
✓ It provides galvanic isolation to the downstream load
vin ( t )

iin ( t )

❖ Large output capacitance for the storing process

❖ Fairly-distorted input current barely passes PF specifications
❖ Slow-loop operation makes it well suited for lighting systems
 Bridgeless PFC
▪ The bridge hampers overall efficiency with two permanently-conducting diodes
Pd  2V f I d , avg P = 300 W
Pd  5 W
 = 100%
2 2 Pout Eff. loss  1.7%
I F , avg = Vac,LL = 90 V rms
 Vac , LL
▪ The bridgeless PFC ensures one diode conduction via the MOSFET body

Positive Negative ✓ Only one diode is conducting in low

frequency
✓ The MOSFETs share a common drive
signal without caring about line
polarity

High-frequency operation ❖ Poor common-mode noise signature

Low-frequency operation
D. Mitchell, Ac-Dc Converter having Improved Power Factor, U.S. Patent 4,412,277, Oct. 25, 1983
 Variation of the Bridgeless PFC
▪ The original scheme suffers from a poor common-mode EMI signature
▪ A variation around this circuit was proposed by Ivo Barbi in 1999

Turn-on
snubber vin(t) Active pos. cycle

Low-frequency diodes Active neg. cycle

✓ Two PFC in parallel driven by the same

pattern – easy to drive with one controller
✓ Conventional structure automatically A. F. de Souza and I. Barbi, High power factor rectifier with reduced conduction and
activated depending on the line polarity commutation losses, 21st International Telecommunications Energy Conference.
INTELEC '99 (Cat. No.99CH37007), 1999
B. J. Turchi, A High-Efficiency 300-W Bridgeless PFC Stage, AND8481/D, onsemi, 2014
 The Totem-Pole PFC
▪ The two high-frequency switches are connected in a half-bridge configuration
▪ Two diodes in the slow leg route the low-frequency portion of the input current
Vout

✓ The fast-leg transistors alternatively perform

as power switch and catch diode
✓ D2 and D1 must be fast diodes with no
recovery loss: SiC or GaN transistors are
perfect for this function
✓ D3 and D4 can be controlled-switches for
improved efficiency
Fast leg Slow leg
High frequency 10 ms ✓ Common-mode noise improved compared
to bridgeless PFC
0V +
-
 The Need to Detect the Input Line Polarity
▪ Each fast-leg transistor alternatively plays the role of the switch and the diode
✓ The switching element needs instruction on the input line polarity

Manage line
polarity
 Dedicated Controllers for TPPFC
▪ onsemi has introduced two low-voltage controllers operating in BCM and CCM
✓ NCP1680 can implement a pre-converter up to 300 W

SiC- or GaN-
MOSFET-based
slow leg based fast leg
✓ One single inductor
with auxiliary winding
ensures ZVS operation
Power inductor
with extra winding

✓ Line management
with a pair of resistive
Valley
detection dividers
Polarity
management
✓ Two external drivers
dedicated to fast and
slow legs: NCP51820
and NCP51530
ZCD and
current-
sense
 Efficiency Performance of the BCM TPPFC
▪ The TPPFC efficiency is excellent compared with a classical approach
▪ A gain of 1.8% is brought by the all-synchronous approach at 90-V rms input voltage

300-W PFC demonstration board

265 V rms
230 V rms

115 V rms

90 V rms

NCP1680

✓Efficiency approaches 99% at 230 V rms and full power

 TPPFC High-Power Operations
▪ Continuous conduction mode is selected for high-power PFC pre-converters
▪ The NCP1681 includes a multi-mode engine operating in CCM, BCM and DCM
✓ Mode change is inhibited for high-power applications and the part keeps CCM
Add aux. winding
for multi-mode
Slow leg

Fast leg
 Multi-Mode Operations
▪ The downstream converter may operate with different load profiles, low to high current
▪ CCM is optimized for high power but BCM and DCM bring better efficiency in lighter loads
✓ NCP1681 embarks a multi-mode engine smoothly transitioning across all these modes
DCM valley switching 1st valley BCM
Reference
timing
TSW
TSW

High-power CCM
✓ The part internally
compares operating
timings with thresholds to
determine the mode
✓ The mode is kept during
an entire half cycle
 Managing Current Transformers
▪ Fast-leg switches play the main power switch or the rectifier role in a TPPFC
▪ Current flow in the leg depends on the input line polarity and needs specific action
✓ Current transformers secondaries are alternatively shorted depending on line polarity

Inductor current
upslope

iL ( t )

Inductor current
downslope FDS8935
 A Reliable Controller with Fault Management
▪ The controller permanently monitors operating variables for maximum protection
▪ Some minor faults involve a quick recovery while heavier issues start a 500-ms timer

✓ UVP or under-voltage protection

monitors the FB pin and checks
for a bias before delivering pulses

✓ BUV or bulk under-voltage checks

that the output voltage is above
80% of its nominal value

✓ Soft OVP is active when a benign

overshoot is detected like a load
release

✓ Hard OVP can be seen as more

severe fault in case of stronger
overshoot or loop failure
 NCP1681 Evaluation Board
▪ A 500-W demonstration board operated in multi-mode Optional in-rush limiter

By-pass
diodes CT blanking

To upper
fast-leg

Slow-leg
 The Control Section
▪ The NCP1681 senses the polarity via two resistive networks
▪ The slow-leg requires a bootstrapped driver but of lesser speed than for GaNs
Input mains
Feedback polarity detection
connection for
regulation and ✓ One option
BUV Vcc OVP and OTP with isolated
gate driver
NCP51561
and discrete
To GaNs GaNs
(GS66508B)

Zero crossing
detection for Polarity indicator
inductor current for CT short
downslope
✓ One option
Slow-leg
control signal To SJ MOSFETs with one
NCP51561
and two
NCP58921
 NCP51561 Half-Bridge Driver
▪ Isolated drivers are preferred for the fast leg considering switching speed and noise
✓ Differential voltage up to 1.5 kV between channels
✓ 5-ns delay matching and pulse distortion
✓ Common Mode Transient Immunity grater than 200 V/ns
 NCP58921 Integrated GaN Driver
▪ Integrated GaN and driver simplifies PCB layout and reduces BOM cost

NCP51560

GaN + driver
CT blanking NCP58921

GaN + driver
 Efficiency Charts with Multi-Mode Engine
▪ The multi-mode engines clearly shows its positive effects in light-load conditions

MM achieves excellent efficiency at light and intermediate loads

48 7/29/2022
 Operating Waveforms
▪ The part excels in distortion performance which keeps below 5% at full load

vM(t) vM(t)

iin(t)
iin(t)

vCS(t)
vCS(t)

vSW(t) vSW(t)

Vin = 115 V rms – THD = 4.2% Vin = 230 V rms – THD = 2.7%
 Agenda

▪ Notions of Power Factor

▪ Power Factor Correction Structures
▪ Processing the Power
▪ Loop Compensation of a PFC
▪ Solutions from Future Suppliers
 Constant On-Time Control
▪ Voltage-mode control offers the easiest implementation for BCM PFCs
✓ Start with the inductor instantaneous current waveform:
I peak iL , peak ( t )
pin ( t ) = vin ( t ) iin ( t ) = vin ( t )
2
ton toff
vin ( t ) vin 2 ( t )
iL , peak ( t ) = ton ( t ) pin ( t ) = ton ( t )
I peak
iL ( t ) =
2 L 2L

vin ( t ) vin ( t ) vin ( t )

0A iL ( t ) iin ( t ) = ton ( t ) iin ( t ) = =
2L Rin Pin
Resistive input Vac
▪ The power sets the on-time value in relationship with the rms input voltage
2 LPin ✓ On-time is ton = 18 µs
ton = constant
Vac 2 ✓ Frequency is f SW ( t )
Vac 2ton variable
iin ( t ) = sin (t )
2L
constant iL ( t )
 Modulating the On-Time
▪ A capacitor is charged by a constant-current source
✓ The error voltage modulates the toggling threshold and adjusts ton

Q
✓ A maximum on-time clamp
limits the power
✓ This clamp can be adjusted
vPWM(t) ton based on the line level
Q Ct ✓ Modulation around the 0-V
t input improves distortion

Verr vCt(t) Pout increases

FB verr(t)
COMP
Vref Pout decreases

t
 Voltage-Mode Operation
▪ Constant on-time can be implemented in voltage-mode control Zero-crossing
distortion
✓ No need to sense the input voltage! f sw ( t )

Bypass diode
iin ( t )

iL ( t )
Demagnetization
detection vFB ( t )

vout ( t )

vrect ( t )
On-time modulator Compensation
 Peak-Current-Mode Operation
▪ The inductor peak current follows the rectified voltage for a sinusoidal envelope
o A multiplier is needed to sense the input voltage: increased power consumption

Bypass diode
iin ( t )

iL ( t )
Demagnetization detection

vrect ( t )

Compensation
Multiplier vFB ( t )

vout ( t )
 A Multiplier in the Chip
▪ The inductor current is scaled by the rectified voltage and follows the envelope
▪ A small offset is added to the multiplier and effectively reduces Fsw near 0 V
vin ( t )
vin ( t ) km Ri i p ( t )
+
a
Input sensing reset
 +
Inductor
reset k mult -
kdiv vin ( t )
kdiv b

VFB koff koff = 0.0417

S 1.9 V
Vc kmult = 0.65
Q
Compensator vc ( t )
b
R
a
a  b  kmul

Verr Offset limits

Vref Fsw excursion
Multiplier

Ri
 Harmonic Distortion Enhancer
▪ The front-end capacitor holds some residual voltage near zero crossing
▪ A THD enhancer typically forces a higher on-time at low input voltage

Front-end capacitor
does not discharge
L6564H data-sheet to 0 V
 Average Mode Current
▪ The inductor current is shaped by a dedicated high-bandwidth loop
✓ Error between the inductor current and setpoint is minimized for best distortion

Vin = 100 V rms

Pout = 1 kW
k  vin ( t ) iin ( t )
k  vin ( t )  Verr

Multiplier
needed!
Verr
2.5 V

THD = 2.3% Vin = 100 V rms

THD = 2.9% Vin = 230 V rms

vsense ( t ) Current loop

 A High-Speed Current Loop
▪ It is important to ensure the fast and precise tracking of the current envelope
✓ The current loop must exhibit a wide bandwidth, e.g. 10 kHz typically

From control circuitry

 Predictive Power Factor
▪ Most of the PFC circuits do sense the input voltage to build the control law
✓ Predictive timing generates PWM control without high-voltage sensing
Switching cell
L c p Vout ➢ The input current is the inductor current
vL ( t )
D
+ iin ( t ) = iL ( t ) iin ( t ) = iL ( t )
Depends
SW C R on power
Vin
vin ( t ) Vout Re
a - = Doff Doff = iL ( t )
iin ( t ) iL ( t ) Vout
Regulated
vc ( t ) = Vin
Input
vL ( t ) = 0 resistance
Re output

vc ( t ) = Vout (1 − D ) = Vout Doff ➢ Set the control law to program Doff(t)

Re  Re  vin ( t )
Vin = Vout Doff Doff ( t ) = iin ( t ) d off (t ) =  
Vout  Vout  Re
Average values Instantaneous variables
Sam Ben-Yaakov and Ilya Zeltser, PWM Converters with Resistive Input, IEEE Transactions on Industrial Electronics, vol. 45, Issue: 3, June 1998)
 No Input Voltage Sensing
▪ By modulating the off-time duration across the input line, resistive input is ensured
▪ The input current is sensed via a shunt and averaged through a low-pass filter
✓ The error voltage adjusts the capacitor charging current and hence off-time duration

I ch = g mVe
I ch g V
v( + ) ( t ) = t= m et
LP
Cch Cch
filter v( − ) ( t ) = iL ( t ) Rs
v( − )
toggling
v( + ) = v( − ) g mVe
Toff = iL ( t ) Rs
Cch

iL ( t ) Rs Cch
Experimental embodiment Doff ( t ) =
Ve g m Tsw
Method and Apparatus for Regulating the Input Impedance of PWM Converters, S. Ben-Yaakov, M. Hadar, Green Power Technologies, US 6,307,361B1
 Simulation Example
▪ The application circuit is simple and requires a specific off-time modulator
▪ A dedicated amplifier shapes the negative input current via a shunt

vin ( t )
0.4 200

0.3 100

doff ( t )0.2 0 vin ( t )

Sense
resistor 0.1 − 100

Doff ( t )
0 − 200
0 0.01 0.02 0.03 0.04 0.05
t

✓ The average off-time is

modulated along the input
sinewave
modulator
Part of my 80+ ready-made templates available here
 Simulation Results
▪ The input current waveform is perfectly sinusoidal and undistorted
Vin = 100 V rms, Pout = 1 kW

iin ( t )
Distortion data:
iL ( t ) Pout = 1 kW
Vin = 100 V rms THD = 3%
Vin = 230 V rms THD = 6%

Off-time

On-time

Regulated
output voltage
 Single-Stage Converter
▪ It is possible to combine a PFC function with a flyback converter
▪ Very popular in lighting applications where bandwidth is naturally low

✓ Operates in quasi-resonant mode

✓ Power factor is usually greater than 0.9
✓ Constant on-time voltage-mode operation

vrect ( t )

vZCD ( t )

verr ( t )
iLED ( t )

Typical operating waveforms – 120 V rms

 Agenda

▪ Notions of Power Factor

▪ Power Factor Correction Structures
▪ Processing the Power
▪ Loop Compensation of a PFC
▪ Solutions from Future Suppliers
 The Need for Stability
▪ A PFC is usually a boost converter operated in different conduction modes:
➢ Continuous Conduction Mode or CCM: high-power system, usually > 300 W
➢ Boundary/Borderline Conduction Mode or BCM: small to moderate power < 300 W
➢ Many derived structures like interleaved or totem-pole for higher power levels
▪ The PFC controller implements a control law: how to force a sinusoidal input current?
➢ In BCM converters, it is usually a constant on-time control, voltage- or current-mode
➢ In CCM, there are usually proprietary control laws optimizing distortion and efficiency

Regardless of the
implementation, loop analysis is
important to guaranty a stable o Capacitor stress
and reliable operation o OVP can be triggered
o Poor stabilization time
vout ( t )
MC33262
 Modeling a Power Factor Correction Stage
▪ Several ways exist to model switching converters
✓ State-space averaging (SSA), PWM switch model, 1st-order approximation etc.
▪ A PFC is a slow system in essence with crossover frequency below 10 Hz
✓ 1st-order approximation averages power without considering switching mechanism
L Vout
Verr
Simplified
Pin CCM or BCM rC
model
Rload Control Pin
VM or CM Rload
Vout
VM or CM Cbulk
Current Cbulk
source

➢ If the load is a regulated switching converter, the incremental resistance is negative

 A General Formula to Express the Output Power
▪ A generic PFC control law obeys the following formula:

K  Vin , rms m  Vcontrol ✓ m characterizes the input-voltage feed-forward

Pin , avg = ✓ n is 1 in general for predictive-sensing stages
Vout n ✓ K is a constant which depends on the modulator, L, Rsense etc.

✓ This is a large-signal expression which needs to be linearized

✓ The corresponding model does not predict high-frequency phenomenon like RHPZ
✓ Perfect for low-frequency approach of a naturally-slow PFC stage
▪ Works for any type of operation, CCM, CrM/BCM, fixed or variable frequency etc.

iL ( t ) iL ( t )

0A 0A
CCM, fixed frequency CrM, variable frequency
J. Turchi, D. Dalal, Power Factor Correction: from Basics to Optimization, Technical Seminar, APEC 2014
 Example with CrM Power Factor Correction
▪ The power transmitted by a power stage operated in CrM obeys the formula:
Vac 2
NCP1608
✓ constant on-time voltage-mode control
=
NCP1622
Pin , avg GPWM Verr ✓ GPWM represents the modulator small-signal gain
L6562
L6564
2L ✓ L is the boost inductor value MP44019
MP44018

100% efficiency
Vac 2
I out = GPWM Verr Nonlinear expression!
2 LVout
Pin = Pout
▪ Run partial differentiation to obtain small-signal coefficients:

ˆiout =   V 2
G V    V 2
ac GPWM Verr


ac PWM err
 vˆout +   vˆerr
Vout  2 L Vout  vˆ = 0 Verr  2 L Vout  vˆ
err out =0

C. Basso, Transfer Functions of Switching Converters, Faraday Press 2021

 Modeling a Power Factor Correction Stage
▪ From the small-signal equation, build the complete simplified model
response Vout ( s )
ESR contribution
s
1+
Dc gain high frequency only
varies with
stimulus
z 1
H ( s) = H0
V squared rC
 H0
in
2
Vac GPWM
Verr ( s ) s s
2 L Vout
Rload Rload
1+ 1+
Cbulk 2
p p
Vac Rload GPWM 2
H0 = p 
4L Vout Rload Cbulk

▪ Assume the following specifications: 0

40
H(f)
Pin = 144 W (dB) 20
− 20
(°)
Plot
Vout = 380 V (
20 log HLL( i 2  f k ) ) − 40
( )
arg HLL( i 2  f k ) 
180

H 0 = 78  38 dB
0

L = 250 µH
H ( f )
− 60
 p  1.6 Hz power − 20

Cbulk = 200 µF stage (LL) − 40 Vin = 90 V rms − 80

Rload = 1 kΩ 0.01 0.1 1 10 100

fk
 Compensation Strategy for the PFC
▪ Without specific treatment, dc gain changes with line input squared
▪ For ratio of 2.3 between 265 V and 90 V rms input, gain changes by 2.942  9
➢ Select a crossover fc = 50 Hz at a 265-V input to keep at least 8-10 Hz at lowest line

H0 gain excess
H ( fc ) = = 26.6 ▪ Bring a 1/26.6 or 28.5-dB attenuation at 50 Hz
2
 fc  Go for a
50 Hz 1+   ▪ For a 70° phase margin, boost the phase by:
 f 
 p boost = 70 − ( −88 ) − 90 = 68
type 2
 fc 
H ( f c ) = − tan   = −88
−1 ▪ One pole and one zero to boost the phase by 68°
 f 
 p ➢ fp = 260 Hz z
50 Hz 1+
➢ fz = 9.6 Hz G ( s ) = G0 s
s
1+
p
Type 2 compensator
 Check Compensated Response
C2

▪ A type 2 compensator is needed

C1 R2
R1 R1
Vout ( s ) Verr ( s ) Vout ( s )
HV output
gm HV output Verr ( s )
R2
Rlower C2 Rlower
Operational Operational
Transconductance Vref C1 Vref Amplifier (op-amp)
Amplifier (OTA)

▪ Check crossover and phase margin at the input line extremes T ( s ) = H ( s ) G ( s )

50
T ( f ) 100
50
100

m T ( f ) m
( (dB))
20 log T OL_LL( i 2  f k )
(°)( ( ))
OL_LL(i 2  f kk )   0 (°)( )
arg T OL_HL( i 2  f k ) 
180 180
0 020 log
arg T OL_HL i 2  f
(dB) 0


fc fc
T(f)
− 100 − 100
T(f)
− 50 − 50
Low line, 90 V rms High line, 265 V rms
3 4 3 4
0.01 0.1 1 10 100 110 110 0.01 0.1 1 10 100 110 110
fk fk

f c = 8.5 Hz  m = 50 Fc_HL = 50 Hz

f c = 50 Hz  m = 70
Phase_marg inHL = 70 °
Gain _marginHL = −458.975
 Simulate the Converter after Compensation
▪ SIMPLIS® is well suited for simulating power factor correction stages
▪ The program can plot the ac response from a switching circuit and simulates fast

ZCD
winding

Error amplifier section

On-time modulator
Templates can be freely downloaded from [Link]
 Check Transient Response is Acceptable
▪ The output current is stepped from 400 to 600 mA at the lowest 90-V rms input voltage

iIN ( t )

iL ( t )

600 mA

iout ( t )
400 mA

vout ( t )

vrec ( t )
Vin = 90 V rms
 Transient Response at High Line
▪ In high-line conditions, the PFC is stable but given the higher crossover, distortion suffers

iIN ( t )

iL ( t )

600 mA

iout ( t )
400 mA

vout ( t )

vrec ( t )
Vin = 265 V rms
 Compensating a CCM PFC
▪ We take the example of a 1-kW PFC operated in continuous conduction mode
▪ An averaged model is used to extract the control-to-output transfer function
▪ The predictive controller is the NCP1654 from

Predictive scheme of NCP1654

 Closing the Loop
▪ The control-to-output transfer function is obtained with an averaged SPICE model
▪ Some in-line behavioral equations describe the controller’s internals
✓ Works in ac and transient analyzes Automatic computation
.param gm=200u .param Vrms=230
.param boost={PM-PS-90} .param Vout=400
PWM .param G={10^(-Gfc/20)} .param Pout=1.3k
switch .param k={tan((boost/2+45)*pi/180)} .param L=54u
model .param fp={fc*k}
.param fz={fc/k} .param RBOL=82.5k
.param RBOU=6.6Meg
.param a={sqrt((fc^2/fp^2)+1)} .param ROCP=3.8k
.param b={sqrt((fz^2/fc^2)+1)} .param Vp=2.5
.param Rsense=30m
.param R2={(a/b)*(fp*G)*(Rlower+Rupper) .param Ib=100u
+/((fp-fz)*Rlower*gm)} .param Rupper={(Vout-2.5)/Ib}
.param C1={1/(2*pi*R2*fz)} .param Rlower={2.5/Ib}
.param C2={(Rlower*gm/(2*pi*fp*G*
+(Rlower+Rupper)))(b/a)} .param fc=20
.param Gfc=36.7
.param ps=-60
Control law .param pm=60

Off-time modulation
 The Power Stage Response
▪ The control-to-output transfer function is the starting point for compensation
▪ Infer a compensation strategy by reading information from magnitude and phase
Power stage response
Vin = 230 V rms H ( 20 Hz ) = 36.7 dB ✓ Crossover cannot be too high otherwise ripple may pollute the
Vin = 100 V rms
control voltage
➢ Too high then ripple will bring distortion and produce third
harmonic
➢ Too low brings an unacceptable slow transient response
✓ Without feedforward the crossover may theoretically with a factor
H(f) of 9 in high- and low-line conditions
✓ NCP1654 feedforward limits the change in crossover frequency

H ( 20 Hz ) = −57

Select fc in high-line conditions

to obtain 5-10 Hz at low line
H ( f )
fc,HL = 20 Hz

J. Turchi, D. Dalal, Power Factor Correction: from Basics to Optimization, Technical Seminar, APEC 2014
 Check Loop Gain
▪ The dc input voltage in an ac analysis is the rms voltage of the source
➢ Enter 100 V dc and 230 V dc for respective low- and high-line simulations
Computed values:
G( f ) Vin = 230 V rms T(f) Vrms = 230
Vout = 400
fc,HL = 20 Hz Pout = 1.3k
L = 54u
RBOL = 82.5k
RBOU = 6.6Meg
ROCP = 3.8k
fc,HL = 9 Hz Vp = 2.5
Rsense = 30m
Ib = 100u
Type 2 compensator Vin = 100 V rms Rupper = 3.975Meg
Rlower = 25k
fc = 20

G ( f ) T ( f ) Gfc = 36.7
ps = -60
pm = 60
gm = 200u
boost = 30
G = 14.621771745m
k = 1.73205080757
fp = 34.6410161514
Boost = 30° fz = 11.5470053838
a = 1.15470053838
b = 1.15470053838
PM low line = 78° R2 = 17.546126093k
C1 = 785.54219388n
PM high line = 62° C2 = 392.77109694n
Compensator
 Transient Response Performance
▪ The large-signal average model lends itself well to a transient simulation
▪ The input current at low line shows a good harmonic distortion figure of 4.2%
THDLL =4.23%
THDHL =6.33%
iin ( t ) The output iin ( t )
current is
stepped from
300 W to 1.3
kW with a 1- iout ( t )
A/µs slope

LL
The transient HL
vout ( t )
response is
stable at low
and high line
 Internal Digital Compensation
▪ The NCP1680 embarks an internal type 2 compensator
▪ A low-pass filter then follows to reduce the ripple contribution
✓ Mid-band gain is adjusted based on the input line value
HV divider
R1
Vout ( s ) Verr ( s )
HV output
gm
R2
Rlower C2 Adjusted
Vref C1 with line

z G0  13.6 dB
Verr ( s ) 1+
 z  1.44 Hz
G (s) = = −G0 s
Vout ( s ) 1+
s  p  68 Hz
p

Type 2 compensator – analogue version Digital implementation

 A Low-Pass Filter Reduces Feedback Ripple
▪ A low-pass filter is inserted in series with the compensator
▪ The digital implementation of this filter brings efficient output ripple rejection
▪ The sampling frequency is adjusted depending on the line frequency
(dB)
y  n  = 0.5 ( u  n  + u  n − 1) -20
GLP ( f )
-40
✓ Sampling
-60
frequency is 4Fline
-80

-100
✓ It sets a notch at
twice the line
GLP ( f )
(°)
frequency
45

2
s s
1+ +  0
QN   
G (s)  2
s s -45
1+ + 
QD   
100m 1 2 4 6 8 10 20 40 60 100 200 600 1k
 SIMetrix Compensated Simulation
▪ The digital filter is simulated with delay lines and fed by a Laplace expression

Compensated
loop gain

Resistive
Transfer function of Moving average
divider
the power stage low-pass filter
gain

Type 2 compensator
 Typical Results for a 300-W Board
▪ The 300-W TPPFC features a constant crossover frequency regardless of input line

T(f)
High line
Low line

Crossover frequency
Vin = 100 V rms is almost unchanged

Vin = 230 V rms

T ( f ) m
 Agenda

▪ Notions of Power Factor

▪ Power Factor Correction Structures
▪ Processing the Power
▪ Loop Compensation of a PFC
▪ Solutions from Future Suppliers
 Power Factor Controller Selection
▪ The selection of a PFC controller depends on various parameters:
✓ Constant on-time in BCM for low power, up to 200-300 W
✓ Want higher power in BCM: go for interleaved PFC
✓ Average mode control and CCM for high power, up to several kW
✓ Need for optimized efficiency? Go for multi-mode operation
✓ Need for the best efficiency? Go for a totem-pole PFC
✓ For compact design, go for a combo chip combining a PFC and a switching controller
▪ TEA2017: PFC and LLC
LLC
▪ FAN6921BMR: PFC and QR flyback PFC
▪ IDP2308: PFC and LLC
▪ STCMB1: PFC and LLC
▪ HR1213: PFC and LLC
 PFC Controllers from
Part- Operating Control Operating
Structure HV pin Package
Number Frequency Mode Mode
MP44018A Boost Variable VM BCM ⎯ SO-8

MP44019 Boost Variable VM BCM ⎯ SO-8

MP44010 Boost Variable VM BCM ⎯ SO-8

Variable
HR1213 Combo LLC CM CCM MM  SO-20
Fixed
Variable
HR1210 Combo LLC CM CCM MM  SO-20
Fixed
Variable
HR1211 Combo LLC VM CCM MM  SO-16
Fixed

[Link]
 PFC Controllers from
Part- Operating Control Operating
Structure HV pin Package
Number Frequency Mode Mode
NCP1623 Boost Variable VM BCM ⎯ TSOP-6

NCL2801 Boost Variable VM BCM ⎯ SO-8

NCP1654 Boost Fixed CM CCM ⎯ SO-8

NCP1680 Totem-pole Variable VM BCM  SO-16

Variable
NCP1681 Totem-pole CM CCM MM  SO-20N
Fixed
FAN6921 Combo QR Variable VM BCM  SO-16

NCP1937 Combo QR Variable VM BCM 

Variable
NCP1618 Boost CM CCM MM  SOIC-9
Fixed
NCP1632 Interleaved Variable VM BCM ⎯ SO-20

[Link]
 PFC Controllers from
Part- Operating Control Operating
Structure HV pin Package
Number Frequency Mode Mode
TEA19162HT Boost Variable VM BCM ⎯ SO-8

TEA19162T Boost Variable VM BCM ⎯ SO-8

Variable
TEA2017AAT Combo LLC CM CCM MM  SO-16
Fixed
Variable
TEA2016AAT Combo LLC CM CCM MM  SO-16
Fixed

✓ The two standalone PFCs can be teamed up with LLC controller TEA19161T

[Link]
 PFC Controllers from
Part- Operating Control Operating
Structure HV pin Package
Number Frequency Mode Mode
ICE2PCS01/G Boost Adjustable CM CCM ⎯ DIP/SO-8

ICE3PCS01G Boost Adjustable CM CCM ⎯ SO-14

ICE3PCS03G Boost Adjustable CM CCM ⎯ SO-8

ICE3PCS05/G Boost Adjustable CM CCM ⎯ DIP/SO-8

IRS2505LPBF Boost Variable VM BCM ⎯ SOT23-5

✓ ICE3PCS03G and ICE3PCS01G include an internal digital compensation

[Link]
 PFC Controllers from
Part- Operating Control Operating
Structure HV pin Package
Number Frequency Mode Mode
L6562A Boost Variable VM BCM ⎯ DIP/SO-8

L6563S Boost Variable CM BCM ⎯ SO-14

L6564 Boost Variable CM BCM ⎯ SSOP-10

L6564H Boost Variable CM BCM  SO-14

Nearly
L4984D Boost CM FOT ⎯ SSOP10
Fixed
Variable
STCMB1 Combo LLC VM BCM  SO-20W
Fixed

[Link]
 Conclusion
❑ Nonlinear loads force the unnecessary circulation of reactive power
❖ Reactive power flows in the grid and heats up distribution wires
❑ Mains rectification brings a poor power factor and distorts the current
✓ Power factor correction forces the absorption of a sinusoidal current
✓ It reduces the circulating reactive power and reduces the rms current
❑ The boost converter is a popular structure and can operate in:
✓ Borderline conduction mode up to 200-300 W
✓ Continuous conduction mode for high output levels beyond 1 kW
✓ Multi-mode combine best of both worlds for optimized efficiency
❑ The totem-pole PFC becomes popular owing to wide-bandgap components
❑ A PFC is a closed-loop system: pay attention to the stability