Traffic light Controller
The traffic light controller will have three lights:
Red (R): Stop
Yellow (Y): Prepare to stop (Transition)
Green (G): Go
Typically, a simple traffic light system has three states for a main road and a side road:
1)Main Road Green, Side Road Red
2)Main Road Yellow, Side Road Red
3)Main Road Red, Side Road Green
4)Main Road Red, Side Road Yellow
Design
module Traffic_Light_Controller(
input clk,
input rst,
output reg [2:0] light_M, // Main road light
output reg [2:0] light_S // Side road light
);
parameter S1 = 0, S2 = 1, S3 = 2, S4 = 3; // State definitions
reg [3:0] count; // Counter for timing
reg [1:0] ps; // Present state
parameter sec7 = 7, sec2 = 2, sec3 = 3; // Timing parameters
// State transition logic
always @(posedge clk or posedge rst) begin
if (rst) begin
ps <= S1; // Reset to initial state
count <= 0; // Reset counter
end else begin
case (ps)
S1: if (count < sec7) begin
ps <= S1;
count <= count + 1;
end else begin
ps <= S2;
count <= 0;
end
S2: if (count < sec2) begin
ps <= S2;
count <= count + 1;
end else begin
ps <= S3;
count <= 0;
end
S3: if (count < sec7) begin
ps <= S3;
count <= count + 1;
end else begin
ps <= S4;
count <= 0;
end
S4: if (count < sec2) begin
ps <= S4;
count <= count + 1;
end else begin
ps <= S1;
count <= 0;
end
default: ps <= S1;
endcase
end
end
always @(ps) begin
case (ps)
S1: begin // Main road green
light_M <= 3'b001; // Main road green
light_S <= 3'b100; // Side road red
end
S2: begin // Main road yellow
light_M <= 3'b010; // Main road yellow
light_S <= 3'b100; // Side road red
end
S3: begin // Side road green
light_M <= 3'b100; // Main road red
light_S <= 3'b001; // Side road green
end
S4: begin // Side road yellow
light_M <= 3'b100; // Main road red
light_S <= 3'b010; // Side road yellow
end
default: begin
light_M <= 3'b000; // Off
light_S <= 3'b000; // Off
end
endcase
end
endmodule
Testbench
module Traffic_Light_Controller_tb;
reg clk;//Inputs
reg rst;
wire [2:0] light_M; // Main road light
wire [2:0] light_S; // Side road light
Traffic_Light_Controller uut (.clk(clk),.rst(rst),.light_M(light_M),.light_S(light_S));
always #5 clk = ~clk;
initial begin
clk = 0;
rst = 1;
#20 rst = 0;
#500 $finish;
end
initial begin
$monitor("Time: %0t | light_M = %b, light_S = %b", $time, light_M, light_S);
end
endmodule
WaveForm
Output
Time: 0 | light_M = 001, light_S = 100
Time: 95000 | light_M = 010, light_S = 100
Time: 125000 | light_M = 100, light_S = 001
Time: 205000 | light_M = 100, light_S = 010
Time: 235000 | light_M = 001, light_S = 100
Time: 315000 | light_M = 010, light_S = 100
Time: 345000 | light_M = 100, light_S = 001
Time: 425000 | light_M = 100, light_S = 010
Time: 455000 | light_M = 001, light_S = 100
