UNIT- III
ARITHMETIC
Addition and Subtraction of Signed Numbers
Design of Fast Adders
Multiplication of Positive Numbers
Signed-Operand Multiplication
Booth Algorithm
Integer Division
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Floating Point Numbers and Operations
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BASIC PROCESSING UNIT
Fundamental Concepts
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Execution of a Complete Instruction
Figure: Steps in Executing a Complete Instruction
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Multiple-Bus Organization
The resulting control sequences shown are quite long because only one
data item can be transferred over the bus in a clock cycle. To reduce the number of
steps needed, most commercial processors provide multiple internal paths that
enable several transfers to take place in parallel.
The below figure depicts a three-bus structure used to connect the registers
and the ALU of a processor. All general-purpose registers are combined into a
single block called the register file. In VLSI technology, the most efficient way to
implement a number of registers is in the form of an array of memory cells similar
to those used in the implementation of random-access memories (RAMs)
described in Chapter 5. The register file in Figure 9 is said to have three ports.
There are two outputs, allowing the contents of two different registers to be
accessed simultaneously and have their contents placed on buses A and B. The
third port allows the data on bus C to be loaded into a third register during the
same clock cycle.
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Hardwired Control
To execute instructions, the processor must have some means of generating
thecontrol signals needed in the proper sequence. Computer designers use a wide
variety of techniques to solve this problem. The approaches used fall into one of
two categories:hardwired control and micro programmed control. We discuss each
of these techniques in detail, starting with hardwired control in this section.
Consider the sequence of control signals given in below figure. Each step
in this sequence is completed in one clock period. A counter may be used to
keep track of thecontrol steps, as shown in below figure. Each state, or count, of
this counter corresponds to one control step. The required control signals are
determined by the following information:
1. Contents of the control step counter
2. Contents of the instruction register
3. Contents of the condition code flags
4. External input signals, such as MFC and interrupt requests
To gain insight into the structure of the control unit, we start with a
simplified view of the hardware involved. The decoder/encoder block in above
figure is a combinational circuit that generates the required control outputs,
depending on the state of all its inputs.
Multiprogrammed Control
ALU is the heart of any computing system, while Control unit is its brain.
The design of a control unit is not unique; it varies from designer to designer.
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Some of the commonly used control logic design methods are;
• Sequence Reg & Decoder method
• Hard-wired control method
• PLA control method
• Micro-program control method
The control signals required inside the processor can be
generated using a control stepcounter and a decoder/ encoder circuit.
Now we discuss an alternative scheme, called micro programmed
control, in which control signals are generated by a program similar
to machine language programs.
One important function of the control unit cannot be
implemented by the simple organization in below figure. This is the
situation that arises when the control unit is required to check the
status of the condition codes or external inputs to choose between
alternative courses of action. In the case of hardwired control, this
situation is handled by including an appropriate logic function, in the
encoder circuitry. In micro programmed control, an alternative
approach is to use conditional branch microinstructions. In addition
to the branch address, these microinstructions specify which of the
external inputs, condition codes, or, possibly, bits of the instruction
register should be checked as a condition for branching to take
place.
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