CONTENTS

 Introduction

 Principle

 Basic Gates

 The OR Gate

 The AND Gate

 The NOT Gate

 The NOR Gate

 The NAND Gate

 The EX-OR Gate

 The EX-NOR Gate

 Conclusion

 Bibliography
INTRODUCTION.
GATE:-
A Gate is defined as a digital circuit which follows some logical
relationship between the input and output voltages. It is a digital circuit
which either allows a signal to pass through or stop it. The logic gates are
building blocks at digital electronics. They are used in digital electronics to
change one voltage into another according to some logic statements relating
to them.
TRUTH TABLE:-
A logic gate may have one or more than one inputs, but it has
only one output. The relationship between the possible values of input and
output voltages are expressed in the form of a table called truth table. Truth
table of a logic gate is a table that shows all the inputs and outputs that are
possible for the logic gates.
BOOLEAN ALGEBRA:-
The algebra which is based on binary nature of the logic gates.
BOOLEAN EXPRESSION:-
They are the logical statement which are followed by logical
gates.
PRINCIPLE.
Any Boolean algebraic operation can be associated with the input
and output, which represents the statement of Boolean algebra. Although
these circuits may be complex, they may all be constructed from these basic
devices like a P-N junction diode, a resistance and a N-P-N transistor. We
have three different types of logic gates and they are the AND gate, the OR
gate and the NOT gate.

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 1 0
High Low
Positive Negative
On Off
Close Open
Conducting Non-conducting
Right Wrong
True False
Yes No
BASIC GATES.
THE OR GATE:-
It is a device that combines A and B to give Y as a result. The OR
gate has two or more inputs and one output. In Boolean algebra, addition
symbol (+), is referred as the OR.

The Boolean expression: A+B=Y

This indicates that Y equals to A or B.

THE AND GATE:-

It is a device that combines A with B to give Y as the result. The AND
gate has two or more inputs and one output. In Boolean algebra,
multiplication sign is referred as the AND.

The Boolean expression: A. B=Y or A X B=Y

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This indicates that Y equals to A and B.

THE NOT GATE:-

It is a device that inverts the inputs. The NOT has one input and has
one output. In Boolean algebra, bar symbol is referred as NOT.

The Boolean expression: A’=Y

This indicates that Y is not equal to A.

THE OR GATE.
Aim:
To design and stimulate the OR gate circuit.
Components:
Two ideal p-n junction diode (D1 and D2).
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Theory and Construction:
An OR gate can be realized by the electronic circuit, making use of
two diodes D1 and D2.

Here the negative terminal of the battery is grounded and corresponds to

the 0 level, and the positive terminal of the battery corresponds to level 1.
The output Y is voltage at C with respect to earth.

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The following conclusions can be drawn from the above circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb does not
glow, hence Y=0.
(ii) If switch A is kept closed and B is kept open (A=1, B=0), then bulb
glows, hence Y=1.
(iii) If switch A is kept open and B is kept closed (A=0, B=1), then bulb
glows, hence Y=1.
(iv) If switch A and B both are kept closed (A=1, B=1), then bulb glows,
hence Y=1.
TRUTH TABLE
Input A Input B Output
0 0 0
0 1 1
1 0 1
1 1 1

The AND Gate.

Aim:
To design and stimulate the AND gate circuit.

Components:
 Two ideal p-n junction diode (D1 and D2)
 A resistance R
Theory and Construction:
An AND gate can be realized by the electronic circuit, making use
of two diodes D1 and D2. The resistance R is connected to the positive
terminal of a 5V battery permanently.

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Here the negative terminal of the battery is grounded and corresponds to
the 0 level, and the positive terminal of the battery corresponds to the level
1.
The output Y is the voltage at C with respect to earth.

The following conclusions can be easily drawn from the working of this
circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb does not
glow, hence Y=0.
(ii) If the switch A is kept closed and B is kept open (A=1, B=0), then
bulb does not glow, hence Y=0.
(iii) If the switch A is kept open and B is kept closed (A=0, B=1), then
bulb does not glow, hence Y=0.
(iv) If both switch A and B are kept closed (A=1, B=1), then bulb glows,
hence Y=0.

TRUTH TABLE
Input A Input B Output
0 0 0
0 1 0
1 0 0
1 1 1

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The NOT Gate.
Aim:
To design and stimulate the NOT gate circuit.
Components:
An ideal n-p-n transistor.
Theory and Construction:
A NOT gate cannot be realized by using diodes. However, an
electronic circuit of NOT gate can be realized by making use a n-p-n
transistor.

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The base of the transistor is connected to the input A through a resistance
Rb and the emitter is earthed. The collector is connected to 5V battery.
The output Y is voltage at C with respect to earth.

The following interference can be easily drawn from the working

of circuit:
(i) If the switch A is kept open (A=0) then bulb glows, hence Y=1.
(ii) If the switch A is kept closed (A=1) then bulb does not glow, hence
Y=0.
TRUTH TABLE
Input A Input B
0 1
1 0

The NOR Gate.

Aim:
To design and stimulate the NOR gate circuit.
Components:
 Two ideal p-n junction diode (D1 and D2).
 An ideal n-p-n transistor.
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 Theory and Construction:
If we connect the output Y of OR gate to the input of a NOT
gate, then the gate obtained is the NOR gate. The output Y is voltage at C
with respect to earth.

In Boolean expression, the NOR gate is expressed as: Y=(A+B)’

And is being read as “A or B negated”.

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The following inference can be easily drawn from the working of electrical
circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb glows,
hence Y=1.
(ii) If the switch A is kept closed and B is kept open (A=1, B=0), then
the bulb does not glow, hence Y=0.
(iii) If the switch A is kept open and B is kept closed (A=0, B=1), then
the bulb does not glow, hence Y =0.
(iv) If the switch A and B are kept closed (A=1, B=1), then the bulb does
not glow, hence Y=0.
TRUTH TABLE
Input A Input B Output
0 0 1
0 1 0
1 0 0
1 1 0

The NAND Gate.

Aim:
To design and stimulate the NAND gate circuit.
Components:
 Two ideal p-n junction diode (D1 and D2)
 A resistance R
 An ideal n-p-n transistor
Theory and Construction:
If we connect the output Y of the AND gate to the input of a NOT
gate then the gate obtained is the NAND gate. The output Y is voltage at C
with respect to earth.

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In Boolean expression, the NAND gate is expressed as: Y=(A.B)’
And is being read as “A and B negated”.

The following inference can be easily drawn from the working of circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb glows,
hence Y=1.
(ii) If the switch A is kept open and B is kept closed (A=0, B=1), then
bulb glows, hence Y=1.
(iii) If the switch A is kept closed and B is kept open (A=1, B=0), then
bulb glows, hence Y =1.
(iv) If the switch A and B are kept closed (A=1, B=1), then bulb does not
glow, hence Y=0.

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 TRUTH TABLE
Input A Input B Output

0 0 1
0 1 1
1 0 1
1 1 0

The EX-OR Gate.

Aim:
To design and stimulate the EX-OR gate circuit.
Components:
 Two AND gates
 An OR gate
 Two NOT gate
Theory and Construction:
The operation EX-OR checks for the exclusivity in the value of the
two signals A and B. It means if A and B are not identical, the output Y=1, and
if both are identical, then output Y=0. This operation is also called exclusive
OR gate, designed EX-OR.

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 In Boolean expression, the EX-OR gate is expressed as:
Y=A’. B+ A. B’=A (+) B

The following inference can be easily drawn from the working of electrical
circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb does not
glow, hence Y=0.
(ii) If the switch A is kept open and B is kept closed (A=0, B=1), then
bulb glows, hence Y=1.
(iii) If the switch A is kept closed and B is kept open (A=1, B=0), then
bulb glows, hence Y=1.
(iv) If the switch A and B are kept closed (A=1, B=1), then bulb does not
glow, hence Y=0.

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 TRUTH TABLE
Input A Input B Output
0 0 0
0 1 1
1 0 1
1 1 0

The EX-NOR Gate.

Aim:
To design and stimulate the EX-NOR Gate circuit.
Components:
 Two AND gates
 And OR gate
 Three NOT gates
Theory and Components:
The operation EX-NOR checks for the exclusively in the value of
the two signals A and B. It means if A and B are not identical, the output Y=0,
and if both are identical, then the output Y=1. This operation is called
exclusive NOR gate, designed EX-NOR.

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In Boolean expression, the EX-NOR gate is expressed as:
Y=A. B + (A. B)’= (A (+) B)’

The following inference can be easily drawn from the working of electrical
circuit:
(i) If the switch A and B are kept open (A=0, B=0), then bulb glows,
hence Y=1.
(ii) If the switch A is kept open and B is kept closed (A=0, B=1), then
bulb does not glow, hence Y=0.
(iii) If the switch A is kept closed and B is kept open (A=1, B=0), then
bulb does not glow, hence Y=0.
(iv) If the switch A and B are kept closed (A=1, B=1), then bulb glows,
hence Y=1.
TRUTH TABLE
Input A Input B Output
0 0 1
0 1 0
1 0 0
1 1 1

NAND Gate.
The truth table and symbol of the NAND gate is as shown below.
The two inputs are A and B.

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 Inputs Output
A B X = (A. B)’
0 0 1
0 1 1
1 0 1
1 1 0

NAND Gate as NOT Gate.

NAND Gate as OR Gate.

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NAND Gate as AND Gate.

NOR Gate.
The truth table and symbol of the NOR gate is as shown below.

Inputs Output
A B Z
0 0 1
0 1 0
1 0 0
1 1 0

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NOR Gate as NOT Gate.

NOR Gate as OR Gate.

NOR Gate as AND Gate.

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 The above diagram makes it clear that the combination of NAND and NOR
gates can result into any of the basic gates (AND, OR and NOT Gates).
Hence, NAND and NOR Gates are called as Universal Gates.
Boolean Operations and Expressions.
Boolean Addition
-The OR Operation

Boolean Multiplication

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-The AND Operation

Laws and Rules of Boolean Algebra

-Commutative Law
Commutative law of Addition: A+B=B+A
Commutative Law of Multiplication: AB=BA
-Associative Law
Associative Law of Addition: A+(B+C) =(A+B) +C
Associative Law of Multiplication: A(BC) =(AB)C
-Distributive Law
A (B + C) = AB + AC

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The 12 Rules of Boolean Algebra

A+0=A
A +1 = 1
A. 0 = 0
A. 1 = A
A+A=A
A + A’ = 1
A. A = A
A. A’ = 0
(A’)’ = A
A + AB = A
A (A + B) = A
(A + B) (A + C) = A + BC

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DE Morgan’s Theorem

Boolean Analysis of Logic Circuits

Boolean expressions are written by starting at the left most gate,
working towards the final output, and writing the expression for each gate.

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Constructing a Truth Table for a Logic Circuit:
A (B + CD)
INPUTS OUTPUT
A B C D A (B + CD)
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

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Simplification Using Boolean Algebra

Standard Forms of Boolean Expression

 Sum-of-products (SOP) form.
Boolean function expressed as sum of AND terms is said to be a SOP form.
The product terms called as min-terms.
-e.g. AB + ABC, ABC + CDE +BCD etc.
-Domain of the Boolean expression = the set of variables contained in the
expression.
-e.g. For AB + ABC, the domain is A, B and C
-All the variables in the domain appear in each product term
-e.g. ABCD + ABCD + ABCD is in standard form
-If a variable is missing from any term, then its negative must be added to
that term.
-SOP is formed by considering all the min-terms, whose output is HIGH
(1).

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 -While writing min-terms for SOP, input with value 1 is considered as the
variable itself and input with value 0 is considered as complement of the
input.

Example of a SOP circuit.

-e.g. Conversion to standard SOP form:

ABC = ABC (D + D) = ABCD + ABCD
AB = AB (C + C) = ABC + ABC
AB = ABC + ABC = ABC (D + D) +ABC (D + D) = ABCD + ABCD +ABCD + ABCD
ABC + AB + ABCD = ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD

 Product-of-sum (POS) form.

Boolean function expressed as product of OR terms is said to be a POS
form.
The sum terms are called as max-terms.
-e.g. (A +B) (A + B + C), (A’ + B + C) C (A’ + B) etc.

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 -In POS standard form, every variable in the domain must appear in each
sum term of the expression.
-POS is formed by considering all the max-terms, whose output is LOW
(0).
-While writing max-terms for POS, input with value 1 is considered as the
complement and input with value 0 is considered as the variable itself.

Example of POS circuit.

e.g. Conversion to standard POS form:

(A’ + B + C) (A + C’)
= (A’ + B + C’) (A + C’ + BB’)
= (A’ + B + C’) (A + C’ + B) (A + C’ + B’)
= (A + B + C’) (A + B + C’) (A + B’ + C’)

Multiple Input Gates.

 Gates can have multiple inputs and more than one output.

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Digital Components.
 Every computer is built using collections of gates that are all
connected by way of wires acting as signal gateway.
Digital Circuits and Their Relationship to Boolean Algebra
 More complex Boolean expressions can be represented as
combinations of AND, OR, and NOT gates, resulting in a logic diagram
that describes the entire expressions.

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 Integrated Circuits.
 Gates are not sold individually; they are sold in units called integrated
circuits (ICs).
 A chip (a small silicon semiconductor crystal) is a small electronic
device consisting of the necessary electronic components (transistors,
resistors, and capacitors) to implement various gases.
 The first ICs were called SSI chips and contained up to 100 electronic
components per chip.
 We now have ULSI (Ultra Large-Scale Integration) with more than 1
million electronic components per chip.

Combinational Circuits.
 Digital logic chips are combined to give us useful circuits. These logic
circuits can be categorized as either combinational or sequential logic.
 The key concept in recognizing a combinational circuit is that an
output is always based on the given inputs.

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  The output of a combinational circuit is a function of its inputs, and the
output is uniquely determined by the values of the inputs at any given
moment.
 A given combinational circuit may have several outputs, if so, each
output represents a different Boolean function.

Examples of Typical Combinational Circuits

Parity Generator and Parity Checker.

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 A parity generator is a circuit that creates the necessary parity bit to
add to a word.
 A parity checker checks to make sure proper parity (odd or even) is
present in the word.
 Typically, parity generators and parity checkers are constructed using
XOR function. Assuming we are using odd parity, the truth table for a
parity generator for a 3- bit word is given in Table below.
 The parity checker outputs 1 if an error is detected and 0 otherwise.
X Y Z Parity Bit
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
X Y Z P ERROR
DETECTED?
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

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 Bit shifting, moving the bits of a word or byte one position to the left
or right is a useful operation.
 When the bits of an unsigned integer are shifted to the left by one
position, it has the same effect as multiplying that integer by 2.
 The left most or right most bit is lost after a left or right shift
(respectively).
 Left shifting the nibble, 1101, change it to 1010, and right shifting it
produces 0110.

 When the control line S is low, each bit of the input (labelled I0 to I3) is
shift left by one position into the outputs (labelled O0 to O3).
 When the control line S is high, each bit of the input (labelled I0 to I3) is
shift right occurs.

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 Sequential Circuits.
 The major weakness of combinational circuits is that there is no
concept of storage – they are memoryless.
 If we change an input value, this has a direct and immediate impact on
the value of the output.

Basic Concepts
 A sequential circuit defines its output as a function of both its current
inputs and its previous inputs. Therefore, the output depends on past
inputs.
 We typically refer to this storage element as a flip-flop.
 Combinational circuits are generalizations of gates; sequential circuits
are generalizations of flip-flops.
Clocks.
 A sequential circuit uses past inputs to determine present outputs
indicates we must have event occurring.
 A clock is a circuit that emits a series of pulses with a precise pulse
width and a precise interval between consecutive pulses.
 This interval is called the clock cycle time. Clock speed is generally
measured in megahertz (MHz), or millions of pulse per second.
 A clock is used by a sequential circuit to decide when to update the
state of the circuit.
 Most sequential circuits are edge- triggered (as opposed to being
level-triggered). It means they are allowed to change their state on
either the rising or falling edge of the clock signal.

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Flip-Flops.
 Many people use the terms latch and interchangeably. Technically, a
latch is level triggered, where as a flip-flop is edge triggered.
 In order to “remember” a past state, sequential circuits rely on a
concept called feedback. This simply means the output of a circuit is
fed back as an input to the same circuit.

FIGU

 A more useful feedback circuit is composed of two NOR gates

resulting inthe most basic memory unit call an SR flip-fop. SR stands
for "set/reset."

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 Q(t) means the value of the output at time t. Q(t+1) is the value
of Qafter the next clock pulse.
 When both S and R are 1 , the SR flip-flop is unstable.

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 The SR flip-flop actually has three inputs: S, R, and its current output,
Q.

 A JK flip-flop simply modify the SR flip-flop to ensure that the illegal

state(both S and R are 1) never arises.
 The inputs to an SR flip-flop will never both be 1.
 We will never have an unstable circuit.

 A D flip-flop is a true representation of physical computer memory.

 An output value of 1 means the circuit is currently "storing" a value of

1.

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Examples of Sequential Circuits
 The registers must all accept their new input values and change
theirstorage elements at the same time.

 If we begin counting in binary: 0000, 0001, 0010, 0011, 1111, we

cansee that as the numbers increase, the low-order bit is
complemented each time.
 When J and K are both equal to 1, the flip-flop complements the
presentstate
 The circuit counts only when the clock pulses and this count enable
line is set to 1.

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 The memory depicted holds four 3-bit words (4 X3 memory)
 A read or write operation always reads or writes a complete word
 The input In 0, In 1, In2 are lines used to store, or write, a 3-bit
word to memory.
 The lines S0 and S1 are the address lines used to select which word
in memory is being referenced (Notice that S0 and S1 are the input
lines toa 2-to- 4 decoder that is responsible for selecting the correct
memory word.)

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 The output lines (Out, Out 1, and Out2) are used when reading
words from memory .
 The write enable control line indicates whether we are reading or
writing.
 In practice, the input lines and output lines are the same lines.
• To summarize our discussion of this memory circuit, here are the
stepsnecessary to write a word to memory:
1) An address is asserted on S0 and S1.
2) WE (write enable) is set to high.
3) The decoder using S0 and S1 enables only one AND gate, selecting
a given word in memory.
4) The line selected in Step 3 combined with the clock and WE
select only one Word.
5) The write gate enabled in Step 4 drives the clock for the
Selected word.
6) When clock pulses, the word on the input lines is
Loaded into the D flip-flops.

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Designing Circuits
 Digital logic design requires someone not only familiar with digital
logic, but also well versed in digital analysis (analysing the
relationship between inputs and outputs), digital synthesis (starting
with a truth table and determining the logic diagram to implement
the given logic function), and the use of CAD(computer aided
design) software.
 A circuit designer faces many problems, including: 0 finding efficient
Boolean functions, 0 using the smallest number of gates,0 using an
inexpensive combination of gates, 0 organizing the gates of a circuit
board to use the smallest surface area and minimal power
requirements, and 0 attempting to do all of this using a standard
set of modules for implementation.
 Digital systems designers must also be mindful of the physical
behaviours of circuits to include minute propagation delays that
occur between the time when a circuit's inputs are energized and
when the output is accurate and stable.
 A circuit designer can implement any given algorithm in hardware
(recall the Principle of Equivalence of Hardware and Software from
chapter 1).
 When we need to implement a simple, specialized algorithm and
its execution speed must be as fast as possible; a hardware
solution is often preferred
 This is the idea behind embedded systems, which are small
special- purpose computers that we find in many everyday
things. Your microwave oven and your car most likely contain
embedded systems.
 Programming these embedded systems required design software
that can read input variables and send output signals to perform
such tasks as turning a light on or off, emitting a beep, sounding an
alarm, or opening a door.

 Embedded systems require special programming that demands an

understanding of the operation of digital circuits, the basics of which
youhave learned in this chapter.
39 | P a g e
Chapter Summary:
 Computers are implementations of Boolean logic.
 Any Boolean functions can be represented as truth tables
 Truth tables provide us with a means to express the characteristics
of Boolean functions as well as logic circuits.
 There is a one-to-one correspondence between a Boolean
function and its digital representation.
 From a chip designer's point of view, the two most important
factors are speed and cost: minimizing the circuits helps to both
lower the cost and increase performance.
 Computer circuits consist of combinational logic circuits and
sequential logic circuits.
 Combinational circuits produce outputs (almost) immediately
when their inputs change.
 Sequential circuits require clocks to control their changes of state.
 Combinational logic devices, such as adders, decoders, and
multiplexers, produce outputs that are based strictly on the
current inputs.
 The AND, OR, and NOT gates are the building blocks for
combinationallogic circuits, although universal gates, such as
NAND and NOR, could also be used.
 Sequential logic devices, such as registers, counters, and memory,
produce outputs based on the combination of current inputs and
the current state of the circuits. These circuits are built using SR,
D,and JK flip-flops.

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Focus on Karnaugh Maps:
Introduction.
 Minimizing circuits helps reduce the number of components in the
actualphysical implementation.
 Reducing Boolean expressions can be done using Boolean
identities; however, using identities can be very difficult because
no rules are given on how or when to use the identities.
 In this appendix, we introduce a systematic approach for reducing
Boolean expression.
 Description of Knaps and Terminology
• Karnaugh maps, or K maps, are graphical way to represent
Boolean functions.
• For example, if there are two input values, × and y,
thereare four min terms.

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K map Simplification for Two Variables
• The rules of K map simplification are :
1) Groupings can contain only 1s; no 0s.
2) Only 1s in adjacent cells can be grouped; diagonal grouping
is not allowed.
3) The number of 1s in a group must be a power of 2.
4) The groups must be made as large as possible while still following
allrules.
5) Al 1s must belong a group, even if it is a group of one.
6) Overlapping groups are allowed.
7) Wrap around is allowed.
8) Use the fewest number of groups possible.

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K map simplification for three variables,

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 K map simplification for four variables :

Example 7.
 The last terms are different. F1 and F2, however, are equivalent.
 If we follow the rules, K map minimization results in a minimized
function(and thus a minimal circuit), but these minimized functions
need not be unique in representation

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.

Don't Care Conditions

• There are certain situations where a function may not be
completely specified, meaning there may be some inputs that are
undefined for the function.
• Real circuits don't always need to have an output defined for
every possible input.
• if a circuit is designed so that a particular set of inputs can
never happen, we call this set of inputs a don't care
condition.
•They are very helpful to us in K map circuit simplification. Because
they are input values that should not matter (and should never
occur), we canlet them have values of either 0 or 1, depending on
which helps us the most.
Don't care values are typically indicated with an
"x" in the appropriate cell.

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Summary:
 Using Boolean identities for reduction is awkward and can be
verydifficult.
 K maps provide a precise of steps to follow to find the minimal
representation of a function, and thus the minimal circuit that
functionrepresents.
 The rules of K map simplification are:
1) Groupings can contain only 1s; no 0s
2) Only 1s in adjacent cells can be grouped; diagonal grouping is not
allowed.
3) The number of 1s in a group must be a power of 2.
4) The groups must be made as large as possible while still
following allrules.
5) All 1s must belong a group, even if it is a group of one.
6) Overlapping groups are allowed.
7) Wrap around is allowed.
8) Use the fewest number of groups possible.

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Implementations:
Since the 1990s, most logic gates are made of CMOS transistors (i.e.
NMOS and PMOS transistors are used). Often millions of logic gates are
packaged in a single integrated circuit.
There are several logic families with different characteristics (power
consumption, speed, cost, size) such as: RDL (resistor- diode logic), RTL
(resistor-transistor logic), DTL (diode-transistor logic), TTL (transistor-
transistor logic) and CMOS (complementary metal oxide semiconductor).
There are also sub-variants, e.g. standard CMOS logic vs. advanced types
using still CMOS technology, but with some optimizations for avoiding loss
of speed due to slower PMOS transistors.
Many early electromechanical digital computers, such as the Harvard Mark
1, were built from relay logic gates, using electro-mechanical relays.
It is also possible to make logic gates out of pneumatic devices, such as the
Sorteberg relayor mechanical logic gates, including on a molecular scale.
Logic gates have been made out of DNA (see DNA nanotechnology) and
used to create a computer called MAYA (see MAYA II).
Additionally, logic gates can be made from quantum mechanical effects
(though quantum computing usually diverges from Boolean design). It is
also possible to make photonic logic gates using non-linear optical effects.

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Conclusion:

Logic gates are used to develop many IC circuits or microchips in today’s

modern world.

NAND gate and NOR gate are known as universal gates because we can
construct all the three basic gates using NAND & NOR gates.

Every time we press a key on our computer, microwave oven, cell phone,
car clicker, garage door opener etc. we have inputted a ‘decimal number'
that logic gate converts to 'binary number'.

The fact is, man lives in a decimal world, while computers in a binary
world.

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 Bibliography: -
This project would be nearly incomplete if had not used the informationgiven
in the following websites:

www.wikipedia.com ,www.physicsworld.com, www.libguides.wustl.edu,

www.aelieve.com, www.iop.com, www.scribd.com etc.

My special thanks to the uploader of information on these websites.

If considered, I have used everything that

GOOGLE shows me….

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