L4938ED

L4938EPD

Advanced voltage regulator

Features
■ Enable and sense inputs (EN, SI) protected
against negative transients down to -5 V
■ Reset threshold adjustable from 3.8 V to 4.7 V
■ Extremely low quiescent current, 65 µA (less
than 90 µA) in standby mode
■ Operating DC supply voltage range 5 V - 28 V SO-20 PowerSO-20

■ Operating transient supply voltage up to 40 V

■ High precision standby output voltage 5 V ± 1%
with 100 mA current capability Description
■ Output 2 voltage 5 V ± 2% with 400 mA current
capability (ADJ wired to VOUT2) The L4938ED and L4938EPD are monolithic
integrated dual voltage regulators with two very
■ Output 2 voltage adjustable by external voltage low dropout outputs and additional functions such
divider as power-on reset and input voltage sense. They
■ Output 2 disable function for standby mode are designed for supplying microcomputer
controlled systems especially in automotive
applications.

Table 1. Device summary

Order codes
Package
Tube Tape and reel

SO-20 L4938ED L4938ED013TR

PowerSO-20 L4938EPD L4938EPD13TR

March 2010 Doc ID 17243 Rev 1 1/20

[Link] 1
Contents L4938ED, L4938EPD

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Standby regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 Output 2 voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.6 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.7 Transient sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.8 Input protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2 SO-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3 PowerSO-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. OUT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. OUT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. OUT1, OUT2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Enable input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. SO-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. PowerSO-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Doc ID 17243 Rev 1 3/20

List of figures L4938ED, L4938EPD

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4. OUT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Reset generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Input protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Input characteristics of SI, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. SO-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. PowerSO-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view)

PR 1 20 SI
GND 1 20 GND
CT 2 19 VS1
N.C. 2 19 N.C.
EN 3 18 VS2
VS2 3 18 OUT2
GND 4 17 GND
VS1 4 17 ADJ
GND 5 16 GND
SI 5 16 OUT1

GND 6 15 GND
PR 6 15 SO

GND 7 14 GND
CT 7 14 RESET

RES 8 13 N.C. EN 8 13 N.C.

SO 9 12 OUT2 N.C. 9 12 N.C.

OUT1 10 11 ADJ GND 10 11 GND

SO-20 PowerSO-20

Doc ID 17243 Rev 1 5/20

Block diagram and pin description L4938ED, L4938EPD

Table 2. Pin definitions and functions

PIn number
Name Function
SO-20 PowerSO-20

18 3 VS2 Supply voltage (400 mA regulator)

19 4 VS1 Supply voltage (100 mA regulator, reset, sense)
20 5 SI Sense input
1 6 PR Reset threshold programming
2 7 CT Reset delay capacitor
3 8 EN Enable (low activates the 400 mA regulator)
4, 5, 6, 7, 14, 15,
1, 10, 11, 20 GND Ground
16, 17
8 14 RES Reset output
9 15 SO Sense output
10 16 OUT1 100 mA regulator output
11 17 ADJ Feedback of 400 mA regulator
12 18 OUT2 400 mA regulator output
13 2, 9, 19 NC Not connected

6/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in this section for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality documents.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

VINDC DC operating supply voltage 28 V

VINTR Transient operating supply voltage (T < 400 ms) -14 to 40 V
IO Output current internally limited
VSI (1)
Sense input voltage (voltage forced) -20 to 20 V
ISI Sense input current (current forced)(1) ±1 mA
VEN Enable input voltage (voltage forced)(1) -20 to 20 V
IEN Sense input current (current forced)(1) ±1 mA
VRES, VSO Output voltages -0.3 to 20 V
IRES, ISO Output currents (output low) 5 mA
PO Power dissipation at Tamb = 80 °C(2) 875 mW
Tstg Storage temperature -65 to 150 °C
TJ Operating junction temperature -40 to 150 °C
Thermal shutdown junction temperature output 2 will
TJSD 165 °C
shutdown typically at TJ 10 K lower than output 1
1. Current forced means voltage unlimited but current limited to the specified value voltage forced
means voltage limited to the specified values while the current is not limited
2. Typical value soldered on a PC board with 8 cm2 copper ground plane (35 mm thick).

Note: The circuit is ESD protected according to MIL-STD-883C.

Doc ID 17243 Rev 1 7/20

Electrical specifications L4938ED, L4938EPD

2.2 Thermal data

Table 4. Thermal data
Symbol Parameter SO-20 PowerSO-20 Unit

Rthj-amb Thermal resistance junction to ambient 50 - °C/W

Rthj-case Thermal resistance junction to case - <2 °C/W

Note: Typical value soldered on a PC board with 8 cm2 copper ground plane (35 mm thick).

2.3 Electrical characteristics

VS = 14 V; Tj = -40 to 150 °C, unless otherwise specified.

Table 5. OUT1
Symbol Parameter Test condition Min. Typ. Max. Unit

VS = 6 to 28 V;
4.9 5 5.1 V
IO1 = 400 µA to 100 mA
VO1 Supply output voltage
TJ ≤ 125°C;
4.8 5 5.2 V
IO1 = 50 to 400 µA
IOUT1 = 10 mA 0.1 0.2 V
VDP1 Drop output voltage 1
IOUT1 = 100 mA; VS = 4.8 V 0.2 0.4 V
IOUT1 = 1 to 100 mA (after
VOL01 Load regulation 1 25 mV
regulation setting)
VLIM1 Current limit 1 VOUT1 = 0.8 to 4.5 V 100 200 400 mA
IEN ≥ 2.4 V (output 2 disabled)
Quiescent current in 65 90 µA
IQSB IO1 = 0.1 mA; VSI > 1.3 V
standby mode
TJ < 85 °C; RPR = 0 75 µA

Table 6. OUT2
Symbol Parameter Test condition Min. Typ. Max. Unit

Output voltage 2 ADJ Enable = low; VS = 6 to 28 V;

VO2 4.9 5.1 V
connected to OUT2 IO2 = 5 to 400 mA
IOUT2 = 100 mA 0.2 0.3 V
VDP2 Drop output voltage 2
IOUT2 = 400 mA; VS = 4.8 V 0.3 0.6 V
IOUT1 = 5 to 400 mA
VOL02 Load regulation 2 50 mV
(after regulation setting)
RADJ Adjust input resistance 60 100 150 mA
ILIM2 Current limit 2 V02 = 0.8 to 4.5 V 450 650 1300 mA
IOUT1 = 100 mA;
IQ Quiescent current 20 mA
IOUT2 = 400 mA

8/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Electrical specifications

Table 7. OUT1, OUT2

Symbol Parameter Test condition Min. Typ. Max. Unit

VS = 6 to 28 V; IO1 = 1 mA,
VOLi 1,2 Line regulation IO2 = 5 mA, 20 mV
(after regulation setting)

Table 8. Enable input

Symbol Parameter Test condition Min. Typ. Max. Unit

Enable input low voltage

VENL -20 1 V
(output 2 active)
VENH Enable input high voltage 1.4 20 V
VENhyst Enable hysteresis 20 30 60 mV
IEN LOW Enable input current low VEN = 0 -20 -8 -3 µA
VEN = 1.1 to 7 V;
-1 0 1 µA
TJ < 130 °C;
IEN HIGH Enable input current high
VEN = 1.1 to 7 V;
-10 0 10 µA
TJ = 130 to 150 °C;

Table 9. Reset circuit

Symbol Parameter Test condition Min. Typ. Max. Unit

VO1- VO1-
RPR = ∞ 4.5 V
VRT Reset threshold voltage(1) 0.3 0.2
RPR = 0 3.65 3.8 3.95 V
VRTH Reset threshold hysteresis RPR = ∞ 30 60 120 mV
tRD min Reset pulse delay CRES = 47 nF; t r ≤ 30 µs(2) 40 60 100 ms
tRD nom Reset pulse delay CRES = 47 nF(3) 60 100 140 ms
tRR Reset reaction time CRES = 47 nF 10 50 150 µs
Pull down capability of the
ICT VOUT1 < VRT 3 6 15 mA
discharge circuit
ICT Charge current VOUT1 > VRT -1.3 -1 0.7 µA
RRES = 10 KΩ to VOUT1
VRESL Reset output low voltage 0.4 V
VOUT1 ≥ 1.5 V
Reset output high leakage
VRESH VRES = 5 V 1 µA
current
1. The reset threshold can be programmed continuously from typ 3.8 V to 4.7 V by changing a value of an
external resistor from pin PR to GND.
2. This is a minimum reset time according to the hysteresis of the comparator. Delay time starts with VOUT1
exceeding VRT.
3. This is the nominal reset time depending on the discharging limit of CT (saturation voltage) and the upper
threshold of the timer comparator. Delay time starts with VOUT1 exceeding VRT.

Doc ID 17243 Rev 1 9/20

Electrical specifications L4938ED, L4938EPD

Table 10. Sense comparator

Symbol Parameter Test condition Min. Typ. Max. Unit

VSI Functional range -20 20 V

Falling edge; TJ < 130 °C 1.08 1.16 1.24 V
VSIT Sense threshold voltage Falling edge;
1.05 1.16 1.29 V
TJ < 130 to 150 °C
VSITH Sense threshold hysteresis 10 30 60 mV
VSI ≤ 1.05 V; RSO = 10 KΩ
VSOL Sense output low voltage 0.4 V
connected to 5 V; VS ≥ 5 V
ISOH Sense output leakage VSO = 5 V; VSI ≥ 1.5 V 1 µA
VSI = 1.1 to 7 V; TJ < 130 °C -1 0 1 µA
ISI HIGH Sense input current high VSI = 1.1 to 7 V;
-10 0 10 µA
TJ < 130 to 150 °C
ISI LOW Sense input current low VSI = 0 V -20 -8 -3 µA

10/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Application information

3 Application information

Figure 3. Application diagram

(See note 2)

(See note 1)

1. The leakage of CT must be less than 0.5 mA (2 V). If an external resistor between CT and VOUT1 is applied,
the leakage current may be increased. The external resistor should have more than 30 KΩ.
For stability: Cs ≥ 1 µF, C01 ≥ 10 µF, C02 ≥ 10 µF, ESR ≤ 5Ω (designed target).
2. For transients exceeding 20 V or -20 V external protection is required at the pins SI and EN as shown at
pin EN. The protection proposed provides proper function for transients in the range of ±200 V. If the zener
diode is omitted the external resistor should be raised to 200 KΩ to limit the current to 1 mA. Without the
zener diode, the function 20 V or -20 V can not be guaranteed.

3.1 Functional description

The L4938ED and L4938EPD are monolithic integrated dual voltage regulators, based on
the STM modulator voltage regulator approach. Several outstanding features and auxiliary
functions are implemented to meet the requirements of supplying microprocessor systems
in automotive applications. Nevertheless, it is suitable also in other applications where two
stabilized voltages are required. The modular approach of this device allows to get easy
also other features and functions when required.

3.2 Standby regulator

The standby regulator uses an isolated collector vertical PNP transistor as a regulating
element. With this structure very low dropout voltage at currents up to 100 mA is obtained.
The dropout operation of the standby regulator is maintained down to 3 V input supply
voltage. The output voltage is regulated up to the transient input supply voltage of 40 V. With
this feature no functional interruption due to overvoltage pulses is generated.

Doc ID 17243 Rev 1 11/20

Application information L4938ED, L4938EPD

In the standby mode when the output 2 is disabled, the current consumption of the device
(quiescent current) is less than 90 µA (14 V supply voltage).
To reduce the quiescent current peak in the undervoltage region and to improve the
transient response in this region, the dropout voltage is controlled. A second regulation path
keeps the output voltage without load below 5.5 V even at high temperatures.

3.3 Output 2 voltage

The output 2 regulator uses the same output structure as the standby regulator but rated for
the output current of 400 mA. The output voltage is internally fixed to 5 V if ADJ is
connected to VOUT2. The output 2 regulator can be switches OFF via the enable input.

Figure 4. OUT2

Connecting a resistor divider R1E, R2E to the ADJ, OUT2 pin the output voltage 2 can be
programmed to the value of

⎛ R 1E ( R 2E + R ADJ )⎞
V OUT2 = V OUT1 ⎜ 1 + ------------------------------------------------
-⎟
⎝ R 2E ⋅ R ADJ ⎠
with RADJ = 60 K to 150 K and VOUT1 = 4.95 to 5.05 V. For an exact calculation the
temperature coefficient (TC - 2000 pprm) of the internal resistor (RADJ) must be taken into
account. Pin ADJ in this mode should not have a capacitive burden because this would
reduce the phase margin of the regulator loop.

3.4 Reset circuit

The reset circuit supervises the standby output voltage. The reset output (RES) is defined
from VOUT ≥ 1 V. Even if VS is lacking, the reset generator is supplied by the output voltage
VOUT1.
The reset threshold of 4.7 V is defined with the internal reference voltage(a) and standby
output divider, when pin PR is left open. The reset threshold voltage can be programmed in
the range from 3.8 V to 4.7 V by connecting an external resistor from pin PR to GND.

12/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Application information

The value of the programming resistor RPR can be calculated with:

22K
R PR = ---------------------- – 92.9K
4.7K
------------ – 1
V RT

3.8V ≤ V RT ≤ 4.7V
The reset pulse delay time tRD, is defined with the charge time of an external capacitor CT:

C T ⋅ 0.6V
t RDmin = ------------------------
1μA

C T ⋅ 1.4V
t RDnom = ------------------------
1μA
The reaction time of the reset circuit originates from the noise immunity. Standby output
voltage drops below the reset threshold only a bit longer than the reaction time results in a
shorter reset delay time. The nominal reset delay time is generated for standby output
voltage drops longer than approximately 50 µs. The minimum reset time is generated if reset
condition only occurs for a short time triggering a reset pulse but not completely discharging
CT. The reset can be related to output2 on request. If higher charge currents for the reset
capacitor are required a resistors from pin CT to OUT1, may be used to increase the current.
We recommended the use of 10 KΩ to 5 V as an output pull up.

3.5 Sense comparator

The sense comparator compares an input signal with an internal voltage reference of typical
1.23 V. The use of an external voltage divider makes this comparator very flexible in the
application. It can be used to supervise the input voltage either before or after the protection
diode and to give additional information to the microprocessor like low voltage warnings. We
recommended the use of 10 KΩ to 5 V as an output pull up.

3.6 Thermal protection

Both outputs are provided with an overtemperature shutdown regulation power dissipation
down to uncritical values. Output 2 shuts down approximately 10 K before output 1. Under
normal conditions shutdown of output 2 allows the chip to cool down again. Thus output 1 is
unaffected. The thermal shutdown reduces the output voltages until power dissipation and
the flow of thermal energy out of the chip balance.

3.7 Transient sensitivity

In proper operation (VOUT > 4.5 V) the reference is supplied by VOUT1 thus reducing
sensitivity to input transients.

a. The reference is alternatively supplied from VS or VOUT1. If one supply is present, the reference is operating.

Doc ID 17243 Rev 1 13/20

Application information L4938ED, L4938EPD

Figure 5. Reset generator

Figure 6. Waveforms

14/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Application information

3.8 Input protection

The Inputs Enable (EN) and Sense In (SI) are protected against negative transients.
Figure 7 is showing the simplified schematic

Figure 7. Input protection

Figure 8. Input characteristics of SI, EN

Doc ID 17243 Rev 1 15/20

Package and packing information L4938ED, L4938EPD

4 Package and packing information

4.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: [Link].
ECOPACK® is an ST trademark.

4.2 SO-20 package information

Table 11. SO-20 mechanical data
mm
Dim.
Min. Typ. Max.

A 2.35 2.65

A1 0.1 0.3

B 0.33 0.51

C 0.23 0.32

D 12.6 13

E 7.4 7.6

e 1.27

H 10 10.65

h 0.25 0.75

L 0.4 1.27

K 0° 8°

16/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Package and packing information

Figure 9. SO-20 package dimensions

4.3 PowerSO-20 package information

Table 12. PowerSO-20 mechanical data
mm
Dim.
Min. Typ. Max.

A 3.6
a1 0.1 0.3
a2 3.3
a3 0 0.1
b 0.4 0.53
c 0.23 0.32
D(1) 15.8 16
D1 9.4 9.8
E 13.9 14.5
e 1.27
e3 11.43
E1 (1) 10.9 11.1
E2 2.9
E3 5.8 6.2

Doc ID 17243 Rev 1 17/20

Package and packing information L4938ED, L4938EPD

Table 12. PowerSO-20 mechanical data (continued)

mm
Dim.
Min. Typ. Max.

G 0 0.1
H 15.5 15.9
h 1.1
L 0.8 1.1
N 10°
S 8°
T 10
1. "D and F" do not include mold flash or protrusions.
- Mold flash or protrusions shall not exceed 0.15 mm (0.006").
- Critical dimensions: "E", "G" and "a3"

Figure 10. PowerSO-20 package dimensions

N N R

a2 A
c
a1
b e DETAIL B
DETAIL A E

e3
H DETAIL A
lead

D
a3 slug

DETAIL B

20 11 0.35
Gage Plane
-C-

S SEATING PLANE
L
G C
BOTTOM VIEW (COPLANARITY)
E2 E1

E3

1 1 0

PSO20MEC
D1
h x 45˚
0056635 I

18/20 Doc ID 17243 Rev 1

L4938ED, L4938EPD Revision history

5 Revision history

Table 13. Document revision history

Date Revision Changes

10-Mar-2010 1 Initial release.

Doc ID 17243 Rev 1 19/20

 L4938ED, L4938EPD

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2010 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
[Link]

20/20 Doc ID 17243 Rev 1