ISLAMIC UNIVERSITY OF
TECHNOLOGY (IUT) ORGANISATION OF
ISLAMIC COOPERATION (OIC)
DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING
NAME: BALBONE DJENABOU
STUDENT ID: 210021265
COURSE NO. : EEE 4102
COURSE TITLE : Electrical Circuit I (Software) Lab
EXPERIMENT NO. : 02 (A)
EXPERIMENT NAME : VERIFICATION OF KCL Objective:
This experiment is intended to verify Kirchhoff’s Current Law (KCL) with the help of series
parallel circuits using Capture CIS and Pspice A/D programs of Orcad 9.2 software.
Theory:
The algebraic sum of currents entering any node equals the sum of the currents leaving
the node.
In the above figure, according to KCL:
I1+ I3= I2+I4
Circuit Diagram:
The following figure shows the circuit of Fig. 1 drawn using Capture CIS :
Fig-2
Report:
Case 1:
Fig-3
For node 1, current through R1, R2, R3, R4 is 8.322, 2.997, 2.391, 2.934 mA respectively.
Now, current entering node 1 is IR1= 8.322mA
Current exiting node 1 =IR2+IR3+IR4=(2.997+2.391+ 2.934)=8.322mA
As we can see, current entering node 1 is equal to current exiting node 1. Therefore the data
agrees with KCL.
For node 2, current through R3, R4, R5, R6 is 2.391, 2.934, 2.197, 3.129 mA respectively.
Now, current entering node 2 is IR3+IR4= (2.391+ 2.934)mA=5.325mA
Current exiting node 2 =IR4+IR5=(2.197+ 3.129)=5.325mA
As we can see, current entering node 2 is equal to current exiting node 2. Therefore the data
agrees with KCL.
Case 2:
Fig-4
For node 1, current through R1, R2, R3, R4 is 12.51, 2.997, 4.27, 5.24 mA respectively.
Now, current entering node 1 is IR1= 12.51mA
Current exiting node 1 =IR2+IR3+IR4=(2.997+ 4.27+ 5.24)=12.51mA
As we can see, current entering node 1 is equal to current exiting node 1. Therefore the data
agrees with KCL.
For node 2, current through R3, R4, R5, R6 is 4.27, 5.24, 3.923, 5.587 mA respectively.
Now, current entering node 2 is IR3+IR4= (4.27+ 5.24)mA=9.51mA
Current exiting node 2 =IR4+IR5=(3.923+ 5.587)=9.51mA
As we can see, current entering node 2 is equal to current exiting node 2. Therefore the data
agrees with KCL.
Discussion:
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EXPERIMENT NO. : 02 (B)
EXPERIMENT NAME : VERIFICATION OF KVL
Objective:
This experiment is intended to verify Kirchhoff’s Voltage Law (KVL) with the help of
series parallel circuits using Capture CIS and Pspice A/D programs of Orcad 9.2 software.
Theory:
Around any closed path (or loop) the algebraic sum of voltage rises equals the algebraic
sum of the voltage drops.
Or
Kirchhoff’s voltage law (KVL) states that the algebraic sum of all voltages around
a closed path (or loop) is zero.
In the above figure, according to KVL:
-V1+ V2+ V3- V4+ V5= 0
Rearranging the terms,
V2+ V3+ V5= V1+ V4
Which implies,
Sum of voltage drops = Sum of voltage rises Circuit
Diagram:
Fig-5
The following figure shows the circuit of Fig-5 drawn using Capture CIS:
Fig-6
Data:
Source
voltage Voltage across(v)
No of
observa
tion R1 R2 R3 R4
1 5Vdc 3.646x270x0.001= 3.646x220x0.001
6.837x470x0.001 0.984 =0.802 3.191x560x0.001
= =
3.213 1.786
2 5Vdc 6.251x560x0.001 3.060x270x0.001= 3.060x220x0.001 3.191x470x0.001
=3.5 0.8262 = =1.5
0.673
Report:
For case 1,
For the loop consisting V1, R1, R4,
V1-VR1-VR4=(5-3.213-1.786)=0.001~0
For the loop consisting R4, R2, R3,
VR4-VR2-VR3=(1.786-0.984-0.802)=0
For the big loop consisting V1, R1, R2, R3
V1-VR1-VR2-VR3=(5-3.213-0.984-0.802)=0.001~0
For case 2,
For the loop consisting V1, R1, R4, V1-VR1-VR4=(5-3.5-
1.5)=0
For the loop consisting R4, R2, R3,
VR4-VR2-VR3=(1.5-0.8262-0.673)=0.0008~0
For the big loop consisting V1, R1, R2, R3
V1-VR1-VR2-VR3=(5-3.5-0.8262-0.673)=0.008~0
As we can see, our data agree with KVL for each loop in the circuit shown in Fig. 6.
Discussion:
EXPERIMENT NO. : 02 (C)
EXPERIMENT NAME : VERIFICATION OF TELLEGEN’S THEOREM
Objective:
This experiment is intended to verify Tellegen’s theorem with the help of series-parallel circuits
using Capture CIS and Pspice A/D programs of Orcad 9.2 software.
Theory:
The algebraic sum of instantaneous powers for all branches in an electrical network
is zero. Or
The algebraic sum of powers delivered by all the sources is equal to the algebraic sum
of powers absorbed by all the elements in an electrical circuit at a particular instant.
Suppose, a network consists of ‘n’ number of branches. I1, I2, … … Inare the instantaneous
currents flowing through each branch and V1, V2, … … Vnare the instantaneous voltages
across each branch. If these currents and voltages follow the Kirchhoff’s Current Law (KCL)
and Kirchhoff’s Voltage Law (KVL) respectively, then according to Tellegen’s theorem:
Here, VKis the instantaneous voltage across the kth branch and IKis the instantaneous current
flowing through this branch. Report:
Case 1:
Fig-7
R1,R2,R3,R4,R5,R6 is absorbing power in the Fig-7 circuit.
So Total absorbed power is
=PR1+PR2+PR3+PR4+PR5+PR6
=(69.26+5.028+1.544+1.894+2.268+3.230)
=83.22mW
V1 is supplying power in this circuit. So Total supplied power,
PV1=83.22mW
As we can see, The algebraic sum of powers delivered by all the sources is equal to the
algebraic sum of powers absorbed by all the elements thus verifying Tellegen’s theorem. Case
2:
Fig-8
R1,R2,R3,R4 is absorbing power in the Fig-8 circuit.
So Total absorbed power is
=PR1+PR2+PR3+PR4
=(21.97+3,59+2.925+5.701)
=34.18mW
V1 is supplying power in this circuit. So Total supplied power,
PV1=34.18mW
As we can see, The algebraic sum of powers delivered by all the sources is equal to the
algebraic sum of powers absorbed by all the elements thus verifying Tellegen’s theorem.
Discussion: sdsdhvjdnv
EXPERIMENT NO. : 02 (D)
EXPERIMENT NAME : SOLVING MESH-CURRENT EQUATIONS USING
MATLAB SOFTWARE
Objective:
To study how to determine mesh currents by solving mesh-current equations using
MATLAB software. Same concept can be used for solving node-voltage equations.
Circuit Diagram:
Fig-9
The mesh-current equations for the above circuit can be written as;
9i1 − 2i2 − 2i3 = 4
−2i1 + 10i2 − 4i3 − i4 − i5 = 6
−2i1 − 4i2 + 9i3 = −6
−i2 + 8i4 − 3i5 = 0 −i2
− 3i4 + 4i5 = −6
In Matrix equation form;
The mesh current vector ‘i’ can be calculated as;
i = A −1
∗B
MATLAB Code in Command Window:
Output in Command Window:
Assignments:
i)The following circuit has been constructed and solved in Capture CIS and PSpice A/D.
Fig-10 Node
voltage
V1=25.53V
V2=22.05V
V3=14.84V
V4=15.06V
In Node 1, current entering is =(3.477+0.523)A=4A = current exiting node 1
In Node 2, current entering is =3.477A=(2.756+0.7206)A = current exiting node 2
In Node 3, current entering is =(720.6+21.49)mA=742.1mA = current exiting node 3
In Node 4, current entering is =523.4mA=21.49+501.9mA = current exiting node 4
Thus it Verifies Kirchhoff’s Current Law (KCL)
To verify KCL, let us take
[Link] consisting I1, R1,R5
VI1-VR1-VR5=25.53-3.477x1-2.756x8=0
[Link] consisting R5,R3,R2
VR5-VR3-VR2=2.756-0.7206x10-0.7421x20=0
[Link] consisting I1,R4,R6,R7
VI1-VR4-VR6-VR7=25.53-0.5234x20-0.5019x30=0
Thus it Verifies Kirchhoff’s voltage Law (KVL)
To verify Tellegen’s theorem, we have to add the total absorbed power by all the resistors. Here,
total power absorbed is
=(12.09+11.01+5.193+5.479+60.77+0.004619+7.557)W
=102.1 W
On the other hand, power supplied by the current source I1 is=102.1W
As the value of absorbed and supplied power is equal, we can conclude that it verifies
Tellegen’s theorem.
ii)The following circuit has been constructed and solved in Capture CIS and PSpice A/D
Fig-11
Node voltage
V1=10V
V2=20V
V3=20V
In Node 1, current entering is =(2.5+2.5)A=5A = current exiting node 1
In Node 2, current entering is =5A~5A+10pA = current exiting node 2
In Node 3, current entering is =2.5A~2.5A+10pA = current exiting node 3
Thus it Verifies Kirchhoff’s Current Law (KCL)
To verify KCL, let us take
[Link] consisting I1, R1,R2
VI1-VR1-VR2=20-2.5x4-5x2=0
[Link] consisting I1,R3,R4
VI1-VR3-VR4=20-10pAx2-2.5x8=0
[Link] consisting V1,R4,R1
VR4-VR1-V1=2.5x8-2.5x4-10=0
Thus it Verifies Kirchhoff’s voltage Law (KVL)
To verify Tellegen’s theorem, we have to add the total absorbed power by all the resistors. Here,
total power absorbed is
=(50+50+25+200.0e-24)W
=125W
On the other hand, power supplied by the current and voltage source I1 is
=PV1+PI1
=(25+100)W
=125W
As the value of absorbed and supplied power is equal, we can conclude that it verifies
Tellegen’s theorem.
iii)
Fig-12
The mesh-current equations for the above circuit can be written as;
-40I1+80I2-30I3-10I4=0
-80I1-10I2+90I4=10
-30I2+50I3-20I5=-12
-20I3+80I5=-10
170I1-40I2-80I4=24
In matrix equation form:
-40 80 -30 -10 0 I1 0
-80 -10 0 90 0 -30 50 0 -20 I2 10
0 0 -20 0 80 I3 -
=
0 -40 0 -80 0 I4 12
170 I5 -10
The mesh current vector ‘I’ can be calculated as:
24
I=𝐴 −1 * 𝐵
MATLAB Code in Command Window:
>> A=[-40 80 -30 -10 0; -80 -10 0 90 0; 0 -30 50 0 -20; 0 0 -20 0 80;
170 -40 0 -80 0]
B=[0;10; -12; -10; 24]
A_inv=inv(A) i=A_inv*B
i
Output in Command Window:
i =
0.4423
0.2219 -
0.1743 0.5289
-0.1686
So the currents in Fig-12 are
I1= 0.4423
I2= 0.2219
I3= -0.1743
I4= 0.5289
I5= -0.1686
