Addressing Modes in Computer Organization

and Architecture
Definition: Addressing modes are the ways in which a CPU instruction specifies the location of its
operands. In other words, an addressing mode defines how to compute the effective address of the data
used by an instruction 1 . It tells the processor whether the operand is in a register, in memory (and
where), or is an immediate constant.

Importance and Purpose: Addressing modes are crucial because they provide flexibility and efficiency
in instruction execution. For example, they allow instructions to work with constants, registers, or
various memory locations, enabling operations on arrays, records or pointers. Good use of addressing
modes simplifies loops, branches, and program relocation. By offering multiple ways to access
operands, they enable advanced programming techniques (like indexed array access and pointer
manipulation) and reduce programming complexity 2 . In summary, addressing modes:
- Enable flexibility: Support access to complex data structures (arrays, records, pointers) 3 .
- Facilitate control flow: Make loops, branches, and jumps more efficient 4 .
- Improve efficiency: Reduce instruction size (by using short offsets or registers) and allow position-
independent code (program relocation) 4 .
- Simplify programming: Provide multiple ways to reference data, easing the compiler’s or
programmer’s task 5 .

Immediate Addressing Mode

• Definition: The operand value is encoded directly in the instruction as a constant 6 . In
immediate mode, no memory lookup is needed for the operand – it is part of the instruction
itself.
• Syntax/Example: Commonly denoted with a # or similar. For example, MOV R1, #10 (move
the constant 10 into register R1) or LOAD R1, =5 .
• Explanation: The CPU takes the immediate value from the instruction and uses it as the
operand. This is very fast because the value is already present; there is no extra memory access
6 . Immediate mode is often used to initialize registers or use fixed constants.

• Advantages:
• Speed: Fastest mode since no memory access is required 6 .
• Simplicity: Handy for loading constants or performing arithmetic with known values.
• Disadvantages:
• Limited range: The constant’s size is limited by the instruction field (e.g. 16 bits in some
architectures) 6 .
• Immutability: The value is fixed at compile-time (cannot be changed at run-time).

Register Addressing Mode

• Definition: The operand resides in a CPU register. The instruction specifies which register holds
the data 7 .
• Syntax/Example: e.g., ADD R1, R2 (add the contents of register R2 into register R1), or MOV
R1, R2 .

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 • Explanation: Since both source and destination operands are in registers, the CPU performs the
operation without accessing memory 7 . Register addressing is essentially direct use of
registers.
• Advantages:
• Fast execution: No memory access delay; register-to-register operations are quickest 7 .
• Efficient: Simple hardware (no extra address calculation).
• Disadvantages:
• Limited registers: The number of CPU registers is finite, so not all data can stay in registers 7 .
• Scope: Only useful when operands already reside in registers.

Direct (Absolute) Addressing Mode

• Definition: The instruction contains the memory address of the operand. In other words, the
address (or offset) of the data is given explicitly in the instruction 8 .
• Syntax/Example: e.g., LOAD R1, 1000 (load into R1 the data at memory address 1000). Some
assembly uses syntax like MOV AL, [0x1000] to denote an absolute address.
• Explanation: The CPU reads the address from the instruction and directly accesses that memory
location to fetch the operand 9 . This is straightforward but requires a memory access.
• Advantages:
• Simplicity: Easy to understand and code; the exact address is known.
• No extra registers: Doesn’t require index or base registers to compute the address.
• Disadvantages:
• Memory access: Slower because it requires reading memory 9 .
• Instruction size: The address must fit in the instruction, which may require large instructions on
limited bit-width architectures.
• Poor relocation: Harder to relocate code, since addresses are absolute.

Indirect Addressing Mode

• Definition: The instruction specifies a memory location that holds the effective address of the
operand 10 . In other words, the address field points to a pointer in memory.
• Syntax/Example: e.g., LOAD R1, (1000) – first fetch the address from memory at 1000, then
load R1 from that fetched address. Some syntax: MOV A, @R0 .
• Explanation: Execution involves two memory reads. First, the CPU reads the pointer (effective
address) from the location given in the instruction. Then it uses that effective address to fetch
the actual operand from memory. This adds a level of indirection 10 .
• Advantages:
• Flexibility: Allows dynamic addressing and pointer-based data structures. The effective address
can be changed by updating memory.
• Disadvantages:
• Performance cost: Two memory references are required (one to get the effective address, one to
get the data) 10 , making it relatively slow.
• Complexity: Harder to implement (requires extra memory access and address computation).

Register Indirect Addressing Mode

• Definition: A register holds the effective address of the operand 11 . The instruction names a
register that contains the memory address of the data.
• Syntax/Example: e.g., LOAD R1, (R2) or in some syntax MOV A, @R0 , meaning “use the
contents of R2 as the address to load from.”

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 • Explanation: The CPU reads the register to get the address of the operand, then accesses
memory at that address 11 . This is a common way to implement pointers: a register holds the
address of data in memory.
• Advantages:
• Pointer use: Supports pointer-based data structures (e.g. linked lists) using registers.
• Single memory access: Only one memory reference (since the address is already in a register) 11 .
• Disadvantages:
• Memory access needed: Slower than register mode because it still requires fetching from memory.
• Register overhead: Ties up a register to hold the address.

Indexed Addressing Mode

• Definition: The effective address is calculated by adding a constant displacement to the
contents of an index register 12 . Often used for accessing array elements.
• Syntax/Example: e.g., LOAD R1, (R2 + #4) or MOV AX, [SI+05] means “load R1 from
the address = R2 + 4.”
• Explanation: The CPU computes the memory address by adding a base (in a register) and an
offset. This is ideal for walking through arrays or tables: the index register holds a base address
or array start, and the offset picks an element 12 .
• Advantages:
• Array access: Convenient for indexed data structures; the hardware adds index and offset.
• Code reuse: The same instruction can access multiple elements by changing the index or offset.
• Disadvantages:
• Extra computation: Requires an ALU addition each time (adds a tiny overhead).
• Offset limits: The offset field may be limited in size (e.g. 8 or 16 bits).
• Hardware complexity: Slightly more complex control logic to handle indexing.

Base (Displacement) Addressing Mode

• Definition: The effective address is formed by adding a fixed displacement (offset) to the
contents of a base register 13 . This is also called base+offset or displacement addressing.
• Syntax/Example: e.g., LOAD R1, 8(R2) means load from address = contents of R2 plus 8.
• Explanation: Common for accessing fields in data structures or stack frames. For example, a
base register might point to the start of a structure or stack frame, and the offset picks a specific
field or local variable 13 . This allows large-range addressing while only encoding a small offset
in the instruction.
• Advantages:
• Structured data: Excellent for accessing fields of records or elements of arrays in a predictable
way.
• Position independence: By changing the base register (e.g. on function calls), the same instruction
can work on different memory blocks.
• Disadvantages:
• Offset range: Limited by the bit-width of the offset in the instruction.
• Register usage: Requires a dedicated base register to hold the reference address.

Relative Addressing Mode

• Definition: The effective address is obtained by adding a signed displacement to the program
counter (PC) 14 . This is often used for branch instructions.
• Syntax/Example: e.g., BEQ R1, R2, offset means “if R1=R2 then branch to PC+offset.”

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 • Explanation: In this mode, the target address is specified relative to the current instruction
location. The CPU adds the offset to the PC to get the branch target 14 . This is very common for
loops and conditional jumps because it makes code relocatable: only a small offset is needed
instead of a full address.
• Advantages:
• Relocatable code: Programs can be moved in memory without adjusting absolute addresses 15 .
• Compact encoding: Offsets can be short, saving instruction space.
• Disadvantages:
• Limited range: Offset size limits how far you can branch (e.g. ±2^15 in a 16-bit field).
• Branch only: Typically only used for control flow (branches/jumps), not for general data access.

Implied (Implicit) Addressing Mode

• Definition: The operand is implicitly specified by the opcode; no explicit operand field is needed
16 . Often the operand is a special register (like the accumulator) or a status bit.

• Syntax/Example: e.g., CLC (clear carry flag), or in an accumulator machine CLR might clear
the accumulator without naming it. There is no operand in the instruction.
• Explanation: The instruction implies which operand to use. For example, many accumulator-
based architectures assume one operand is the accumulator by default. This “zero-address” style
means the CPU knows implicitly which data is being manipulated 17 16 .
• Advantages:
• Compact code: No operand field reduces instruction size.
• Simplicity: Useful for operations that always use the same implicit operand (e.g. accumulator).
• Disadvantages:
• Limited flexibility: Only specific registers or flags can be used, not arbitrary data.
• Reduced orthogonality: Harder to generalize for all operations.

Auto-Increment and Auto-Decrement Addressing Modes

• Definition: A register holds the address of the operand, and the register is automatically
incremented (or decremented) before or after the access 18 19 .
• Syntax/Example:
• Auto-Increment: LOAD R1, (R2)+ or ADD R1, (R2)+ means use the address in R2, then
increment R2.
• Auto-Decrement: LOAD R1, -(R2) means decrement R2, then use it as address.
• Explanation: These modes are designed for stepping through memory sequentially. For
example, in a loop over an array, the index register can automatically advance after each access.
In a stack operation, auto-decrement and auto-increment naturally implement push/pop
semantics. After the memory operation, the CPU internally adds or subtracts a constant (usually
the size of the operand) to/from the register 18 19 .
• Advantages:
• Convenience: Simplifies code for iterating through arrays or stacks (e.g., while (*p++)
{ ... } ). The pointer register updates automatically.
• Efficiency: Fewer instructions are needed to adjust the index register.
• Disadvantages:
• Additional overhead: Internally requires an extra ALU operation (for the increment/decrement).
• Less common: Not all ISAs support auto-update modes, so it may reduce portability.

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Comparison of Addressing Modes

Operand
Location /
Mode Example Syntax Advantages Disadvantages
Address
Calculation

Limited size
Operand is a Fast (no memory
(literal field) 6 ;
Immediate literal in the MOV R1, #5 access) 6 ; useful
not changeable at
instruction for constants
runtime

Very limited
Fastest (no
Operand in registers 7 ; data
Register ADD R1, R2 memory access)
CPU register must be in
7 ; simple
register

Instruction Requires memory

Direct contains LOAD R1, Simple, fetch (slower) 9 ;
(Absolute) memory 1000 straightforward large instruction
address size

Instruction
points to Two memory
Indirect LOAD R1, Flexible (dynamic
memory cell accesses (slow)
(Memory) (1000) pointers)
holding 10 ; complex

address

Register Flexible pointer

Requires memory
Register contains LOAD R1, use; single
access; uses a
Indirect memory (R2) memory access
register
address 11

Base register LOAD R1, Efficient array Extra address

Indexed + offset (e.g. 8(R2) or MOV indexing; supports addition; limited
for arrays) AX, [SI+5] loops 12 offset range

Good for
Base register Offset limited;
Base LOAD R1, structures/stack
+ constant need a base
(Displacement) 20(R2) frames;
offset register
relocatable

PC + signed Position- Limited branch

BEQ
Relative (PC) offset independent range; only for
R1,R2,label
(branches) code; compact control flow 14

Operand
implied by Very compact; no Only specific
Implied CLC (clear carry
opcode (no operand fetch operands allowed;
(Implicit) flag)
explicit needed not general
operand)

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 Operand
Location /
Mode Example Syntax Advantages Disadvantages
Address
Calculation

Extra overhead
Register holds LOAD R1, Auto pointer
(ALU update); not
Auto-Inc/Dec address; then (R2)+ / LOAD update (easy
universally
±1 (or ±size) R1, -(R2) loops) 18
supported

Each addressing mode strikes a balance between instruction simplicity, flexibility, and execution
speed. By understanding and choosing the appropriate addressing mode, assembly and compiled code
can be made both efficient and expressive, which is essential knowledge for computer organization and
architecture exams.

Sources: Authoritative descriptions of addressing modes are given in computer architecture texts and
references 1 20 10 (see also assembly programming guides). All definitions and mode behaviors
above are drawn from standard CPU architecture references.

1 13 16 Addressing mode - Wikipedia

https://en.wikipedia.org/wiki/Addressing_mode

2 3 4 5 8 10 11 12 14 15 17 18 19 Addressing Modes | GeeksforGeeks

https://www.geeksforgeeks.org/addressing-modes/

6 7 www.labs.cs.uregina.ca
https://www.labs.cs.uregina.ca/201/SPIM-AddressingMode/lecture.php

9 20 Assembly Addressing Modes

https://www.tutorialspoint.com/assembly_programming/assembly_addressing_modes.htm