LTC3402

2A, 3MHz Micropower

Synchronous Boost Converter
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FEATURES DESCRIPTIO
■ Synchronous Rectification: Up to 97% Efficiency The LTC®3402 is a high efficiency, fixed frequency, step-
■ 2A Switch Current Rating up DC/DC converter that operates from an input voltage
■ Fixed Frequency Operation Up to 3MHz below 1V. The device includes a 0.16Ω N-channel MOSFET
■ Wide Input Range: 0.5V to 5V switch and a 0.18Ω P-channel synchronous rectifier.
■ Very Low Quiescent Current: 38μA (Burst Mode® Switching frequencies up to 3MHz are programmed with
Operation) an external timing resistor and the oscillator can be
■ 2.6V to 5.5V Adjustable Output Voltage synchronized to an external clock. An external Schottky
■ 0.85V (Typ) Start-Up Voltage diode is optional but will slightly improve efficiency.
■ No External Schottky Diode Required (VOUT < 4.3V)
■
Quiescent current is only 38μA in Burst Mode operation,
Synchronizable Switching Frequency
■
maximizing battery life in portable applications. Burst
Burst Mode Enable Control
Mode operation is user controlled and can be enabled by
■ Antiringing Control Reduces Switching Noise
■
driving the MODE/SYNC pin high. If the MODE/SYNC pin
PGOOD Output
has either a clock or is driven low, then fixed frequency
■ OPTI-LOOP® Compensation
switching is enabled.
■ Very Low Shutdown Current: < 1μA
■ Small 10-Pin MSOP Package Other features include a 1μA shutdown, antiringing con-
U trol, open-drain power good output, thermal shutdown
APPLICATIO S and current limit. The LTC3402 is available in the 10-lead
■
thermally enhanced MSOP package. Lower current appli-
Cellular Telephones
■
cations should use the 1A rated LTC3401 synchronous
Handheld Computers
boost converter. Applications that require VOUT < 2.6V
■ MP3 Players
■
should use the LTC3424.
2-Way Pagers , LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
■ GPS Receivers Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.
■ Battery Backup Supplies
■ CCFL Backlights

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TYPICAL APPLICATIO
All Ceramic Capacitor 2-Cell to 3.3V at 1A Step-Up Converter Efficiency
L1 100
2.2μH VOUT Burst Mode
VIN = 1.8V to 3V 90
3.3V OPERATION
1A 80
LTC3402 1MHz
3 4 R2 70 CONSTANT
VIN SW
EFFICIENCY (%)

909k FREQUENCY
60
10 7
SHDN VOUT
+2 C2
50
2 8
CELLS MODE/SYNC FB 44μF 40
(2 × 22μF)
6 9 30
PGOOD VC
C1 C3 R1 20
1 5 470pF 549k
10μF Rt GND 10
VIN = 2.4V WITH SCHOTTKY
Rt R5 C4 0
30.1k 82k 4.7pF 0.1 1 10 100 1000
IOUT (mA)
3402 TA02
C1: TAIYO YUDEN JMK212BJ106MG 3402 TA01
0 = FIXED FREQ
C2: TAIYO YUDEN JMK325BJ226MM
1 = Burst Mode OPERATION
L1: COILCRAFT: D03316P-222
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LTC3402
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ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO
(Note 1)
VIN, VOUT Voltages ...................................... – 0.5V to 6V ORDER PART
SW Voltage ................................................. – 0.5V to 6V TOP VIEW NUMBER
Rt 1 10 SHDN
VC, Rt Voltages ......................... – 0.5V to (VOUT + 0.3V) MODE 2 9 VC
PGOOD, SHDN, FB, MODE Voltages ........... – 0.5V to 6V VIN 3 8 FB LTC3402EMS
SW 4 7 VOUT
Operating Temperature Range (Note 2) .. – 40°C to 85°C GND 5 6 PGOOD

Storage Temperature Range ................. – 65°C to 125°C MS PACKAGE

10-LEAD PLASTIC MSOP MS PART MARKING
Lead Temperature (Soldering, 10 sec).................. 300°C
TJMAX = 125°C
θJA = 130°C/ W 1 LAYER BOARD LTSK
Order Options Tape and Reel: Add #TR θJA = 100°C/ W 4 LAYER BOARD
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: [Link]
Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Start-Up Voltage ILOAD = <1mA 0.85 1.0 V
Minimum Operating Voltage (Note 4) ● 0.5 V
Output Voltage Adjust Range ● 2.6 5.5 V
Feedback Voltage ● 1.22 1.25 1.28 V
Feedback Input Current VFB = 1.25V 1 50 nA
Quiescent Current—Burst Mode Operation VC = 0V, MODE/SYNC = 3.3V (Note 3) 38 65 μA
Quiescent Current—SHDN SHDN = 0V, Not Including Switch Leakage 0.1 1 μA
Quiescent Current—Active VC = 0V, MODE/SYNC = 0V, Rt = 300k (Note 3) 440 800 μA
NMOS Switch Leakage 0.1 5 μA
PMOS Switch Leakage 0.1 10 μA
NMOS Switch On Resistance 0.16 Ω
PMOS Switch On Resistance 0.18 Ω
NMOS Current Limit ● 2 2.5 A
NMOS Burst Current Limit 0.66 A
Maximum Duty Cycle Rt = 15k ● 80 85 %
Minimum Duty Cycle ● 0 %
Switching Frequency Rt = 15k ● 1.6 2 2.4 MHz
MODE/SYNC Input High 1.4 V
MODE/SYNC Input Low 0.4 V
MODE/SYNC Input Current VMODE/SYNC = 5.5V 0.01 1 μA
Error Amp Transconductance ΔI = – 5μA to 5μA, VC = VFB 85 μmhos
PGOOD Threshold Referenced to Feedback Voltage –6 –9 – 12 %

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 LTC3402
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
PGOOD Low Voltage IPGOOD = 1mA 0.1 0.2 V
VOUT = 1V, IPGOOD = 20μA 0.1 0.4 V
PGOOD Leakage VPGOOD = 5.5V 0.01 1 μA
SHDN Input High VIN = VSHDN 1 V
SHDN Input Low 0.4 V
SHDN Input Current VSHDN = 5.5V 0.01 1 μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings with statistical process controls.
may cause permanent damage to the device. Exposure to any Absolute Note 3: Current is measured into the VOUT pin since the supply current is
Maximum Rating condition for extended periods may affect device bootstrapped to the output pin and in the application will reflect to the
reliability and lifetime.. input supply by (VOUT/VIN) • I/Efficiency. The outputs are not switching.
Note 2: The LTC3402E is guaranteed to meet performance specifications Note 4: Once the output is started, the IC is not dependent upon the VIN
from 0°C to 70°C. Specifications over the –40°C to 85°C operating supply.
temperature range are assured by design, characterization and correlation

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TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C unless otherwise noted)
SW Pin and Inductor Current (IC)
in Discontinuous Mode. Ringing
Control Circuitry Eliminates High
Switching Waveform on SW Pin Frequency Ringing Transient Response 5mA to 50mA

IL
50mA/DIV
VOUT
0A 100mV/DIV

SW
1V/DIV SW
1V/DIV
50mA
IOUT
0V 5mA

50ns/DIV 3402 G01 200ns/DIV 3402 G02 COUT = 22μF 200μs/DIV 3402 G03

L = 3.3μH
fOSC = 1MHz

Transient Response 50mA to 500mA Burst Mode Operation Burst Mode Operation

VOUT VOUT
VOUT AC AC
200mV/DIV 100mV/DIV 100mV/DIV

SW
550mA 1V/DIV SW
1V/DIV
50mA

COUT = 22μF 200μs/DIV 3402 G04 VIN = 1.2V 5ms/DIV 3402 G05 VIN = 1.2V 200μs/DIV 3402 G06

L = 3.3μH VOUT = 3.3V VOUT = 3.3V

fOSC = 1MHz COUT = 100μF COUT = 100μF
IOUT = 250μA IOUT = 20mA
MODE/SYNC PIN = HIGH MODE/SYNC PIN = HIGH
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LTC3402
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TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C unless otherwise noted)

Converter Efficiency 1.2V to 3.3V Converter Efficiency 2.4V to 3.3V Converter Efficiency 3.6V to 5V
100 100 100
Burst Mode Burst Mode OPERATION
90 300kHz 90 90
OPERATION
Burst Mode
80 80 80
OPERATION
3MHz 3MHz
70 70 70
1MHz

EFFICIENCY (%)
EFFICIENCY (%)

1MHz 300kHz 1MHz

EFFICIENCY (%)
60 60 60 FIXED
FREQUENCY
50 50 50
40 40 40
30 30 30
20 20 20
10 10 10
VIN = 3.6V
0 0 0
0.1 1 10 100 1000 0.1 1 10 100 1000 0.1 1 10 100 1000
OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) LOAD CURRENT (mA)
3402 G07 3402 G08
3402 G10

Start-Up Voltage Efficiency Loss Without Schottky

vs IOUT vs Frequency Current Limit
500 14 3.4
TA = 25°C TA = 25°C
12 3.2
400
OUTPUT CURRENT (mA)

EFFICIENCY LOSS (%)

10 3.0

CURRENT (A)
300
8 2.8

200 6 2.6

4 2.4
100
2 2.2

0 0 2.0
0.8 0.9 1 1.1 1.2 1.3 1.4 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 –55 –15 25 65 105 125
VIN (V) FREQUENCY (MHz) TEMPERATURE (°C)
3402 G09 3402 G11 3402 G12

EA FB Voltage Oscillator Frequency Accuracy NMOS RDS(ON)

1.28 2.10 0.30
Rt = 15k VOUT = 3.3V

1.27
0.25
2.05
FREQUENCY (MHz)

RESISTANCE (Ω)

1.26
VOLTAGE (V)

0.20
1.25 2.00
0.15
1.24
1.95
0.10
1.23

1.22 1.90 0.05

–55 –15 25 65 105 125 –55 –15 25 65 105 125 –55 –15 25 65 105 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3402 G13 3402 G14 3402 G22

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 LTC3402
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TYPICAL PERFOR A CE CHARACTERISTICS (TA = 25°C unless otherwise noted)
PMOS RDS(ON) Start-Up Voltage Shutdown Threshold
0.30 1.1 1.10
VOUT = 3.3V
1.05

0.25 1.0 1.00

0.95
RESISTANCE (Ω)

VOLTAGE (V)

VOLTAGE (V)
0.20 0.9 0.90
0.85
0.15 0.8 0.80
0.75
0.10 0.7 0.70
0.65
0.05 0.6 0.60
–55 –15 25 65 105 125 –55 –15 25 65 105 125 –55 –15 25 65 105 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3402 G16 3402 G17 3402 G18

PGOOD Threshold Burst Mode Operation Current VOUT Turn-Off Voltage

–7.0 44 2.50
–7.5 2.45
42
–8.0 2.40
PERCENT FROM VFB (%)

–8.5 40 2.35
CURRENT (μA)

VOLTAGE (V)
–9.0 2.30
38
–9.5 2.25
36
–10.0 2.20
–10.5 34 2.15
–11.0 2.10
32
–11.5 2.05
–12.0 30 2.00
–55 –15 25 65 105 125 –55 –15 25 65 105 125 –55 –15 25 65 105 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3402 G19 3402 G20 3402 G21

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LTC3402
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PI FU CTIO S
Rt (Pin 1): Timing Resistor to Program the Oscillator IC to eliminate high frequency ringing due to the resonant
Frequency. tank of the inductor and SW node capacitance, therefore
reducing EMI radiation.
3 • 1010
fOSC = Hz GND (Pin 5): Signal and Power Ground for the IC.
Rt
PGOOD (Pin 6): Power Good Comparator Output. This
MODE/SYNC (Pin 2): Burst Mode Select and Oscillator open-drain output is low when VFB < – 9% from its
Synchronization. regulation voltage.
MODE/SYNC = High. Enable Burst Mode operation. The VOUT (Pin 7): Output of the Synchronous Rectifier and
inductor peak inductor current will be 1/3 the current Bootstrapped Power Source for the IC. A ceramic capaci-
limit value and return to zero current on each cycle. tor of at least 1μF is required and should be located as
During Burst Mode operation the operation is variable close to the VOUT and GND pins as possible (Pins 7 and 5).
frequency, providing a significant efficiency improve-
ment at light loads. It is recommended the Burst Mode FB (Pin 8): Feedback Pin. Connect resistor divider tap
operation only be entered once the part has started up. here. The output voltage can be adjusted from 2.6V to 5V.
The feedback reference voltage is typically 1.25V.
MODE/SYNC = Low. Disable Burst Mode operation and
maintain low noise, constant frequency operation. VC (Pin 9): Error Amp Output. A frequency compensation
network is connected to this pin to compensate the loop.
MODE/SYNC = External CLK. Synchronization of the See the section “Compensating the Feedback Loop” for
internal oscillator and Burst Mode operation disable. A guidelines.
clock pulse width of 100ns to 2μs is required to
synchronize. SHDN (Pin 10): Shutdown. Grounding this pin shuts down
the IC. Tie to >1V to enable (VIN or digital gate output). To
VIN (Pin 3): Input Supply Pin. operate with input voltages below 1V once the converter
SW (Pin 4): Switch Pin. Connect inductor and Schottky has started, a 1M resistor from SHDN to VIN and a 5M
diode here. For applications with output voltages over resistor from SHDN to VOUT will provide sufficient hyster-
4.3V, a Schottky diode is required to ensure that the SW esis. During shutdown, the output voltage will hold up to
pin voltage does not exceed its absolute maximum VIN minus a diode drop due to the body diode of the PMOS
rating. Minimize trace length to keep EMI and high synchronous switch. If the application requires a com-
ringing down. For discontinuous inductor current, a plete disconnect during shutdown, refer to the section
controlled impedance is placed from SW to VIN from the “Output Disconnect Circuits.”

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 LTC3402
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BLOCK DIAGRA

+ 1V TO
VOUT + 0.3V

VIN SW
3 4
ANTIRING
P VOUT VOUT
7
2.6V TO 5.5V

ANTICROSS
SHDN 10 SHUTDOWN
COND
+
N + 10mV
ISENSE
AMP – +
– IZERO
AMP

CURRENT +
GND LIMIT
5
–
2.8A TYP

+ 1.25V
– ERROR R1
AMP
CURRENT – FB
8
COMP
+
PWM
LOGIC
SLEEP + – VC
Σ 9

Burst Mode R2
CONTROL

Rt
1 OSC 2 MODE/SYNC

SLOPE COMP

POK 6
–
N
+
1.25V – 9%

3402 BD

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LTC3402
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APPLICATIO S I FOR ATIO
DETAILED DESCRIPTION the error amplifier output to provide a peak current control
command for the PWM. The slope compensation in the IC
The LTC3402 provides high efficiency, low noise power
is adaptive to the input and output voltage. Therefore, the
for applications such as portable instrumentation. The
converter provides the proper amount of slope compensa-
current mode architecture with adaptive slope compensa-
tion to ensure stability and not an excess causing a loss of
tion provides ease of loop compensation with excellent
phase margin in the converter.
transient load response. The low RDS(ON), low gate charge
synchronous switches provide the pulse width modula- Error Amp. The error amplifier is a transconductance
tion control at high efficiency. amplifier with gm = 0.1ms. A simple compensation net-
work is placed from the VC pin to ground.
The Schottky diode across the synchronous PMOS switch
provides a lower drop during the break-before-make time Current Limit. The current limit amplifier will shut the
(typically 20ns) of the NMOS to PMOS transition. The NMOS switch off once the current exceeds its threshold.
addition of the Schottky diode will improve efficiency (see The current amplifier delay to output is typically 50ns.
graph “Efficiency Loss Without Schottky vs Frequency”). Zero Current Amp. The zero current amplifier monitors the
While the IC’s quiescent current is a low 38μA, high inductor current to the output and shuts off the synchro-
efficiency is achieved at light loads when Burst Mode nous rectifier once the current is below 50mA, preventing
operation is entered. negative inductor current.
Low Voltage Start-Up Antiringing Control. The anitringing control will place an
impedance across the inductor to damp the ringing on the
The LTC3402 is designed to start up at input voltages of
SW pin during discontinuous mode operation. The LCSW
typically 0.85V. The device can start up under some load,
ringing (L = inductor, CSW = capacitance on the switch pin)
(see graph Start-Up vs Input Voltage). Once the output
is low energy, but can cause EMI radiation.
voltage exceeds a threshold of 2.3V, then the IC powers
itself from VOUT instead of VIN. At this point, the internal Burst Mode Operation
circuitry has no dependency on the input voltage, eliminat-
ing the requirement for a large input capacitor. The input Burst Mode operation is when the IC delivers energy to the
voltage can drop below 0.5V without affecting the opera- output until it is regulated and then goes into a sleep mode
tion, but the limiting factor for the application becomes the where the outputs are off and the IC is consuming only
availability of the power source to supply sufficient energy 38μA. In this mode, the output ripple has a variable
to the output at the low voltages. frequency component with load current and the steady
state ripple will be typically below 3%.
Low Noise Fixed Frequency Operation During the period where the device is delivering energy to
Oscillator. The frequency of operation is set through a the output, the peak current will be equal to 1/6 the current
resistor from the Rt pin to ground where f = 3 • 1010/Rt. An limit value and the inductor current will terminate at zero
internally trimmed timing capacitor resides inside the IC. current for each cycle. In this mode the maximum output
The oscillator can be synchronized with an external clock current is given by:
inserted on the MODE/SYNC pin. When synchronizing the
VIN
oscillator, the free running frequency must be set to I OUT(MAXBURST) ≈ Amps
approximately 30% lower than the desired synchronized 6 • VOUT
frequency. Keeping the sync pulse width below 2μs will Burst Mode operation is user controlled by driving the
ensure that Burst Mode operation is disabled. MODE/SYNC pin high to enable and low to disable. It is
Current Sensing. Lossless current sensing converts the recommended that Burst Mode operation be entered after
peak current signal to a voltage to sum in with the internal the part has started up.
slope compensation. This summed signal is compared to
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 LTC3402
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APPLICATIO S I FOR ATIO
COMPONENT SELECTION Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEBSITE
Inductor Selection Coilcraft (847) 639-6400 (847) 639-1469 [Link]

The high frequency operation of the LTC3402 allows the Coiltronics (516) 241-7876 (516) 241-9339 [Link]

use of small surface mount inductors. The minimum Murata (814) 237-1431 (814) 238-0490 [Link]
(800) 831-9172
inductance value is proportional to the operating fre-
Sumida
quency and is limited by the following constraints: USA: (847) 956-0666 (847) 956-0702 [Link]
Japan: 81-3-3607-5111 81-3-3607-5144 sumida
3 VIN(MIN) • VOUT(MAX) – VIN(MIN)
L > μH and L > H
f f • Ripple • VOUT(MAX)
Output Capacitor Selection
where
The output voltage ripple has several components. The
f = Operating Frequency (Hz) bulk value of the capacitor is set to reduce the ripple due
Ripple = Allowable Inductor Current Ripple (A) to charge into the capacitor each cycle. The max ripple due
VIN(MIN) = Minimum Input Voltage (V) to charge is given by:
VOUT(MAX) = Maximum Output Voltage (V) IP • VIN
VRBULK = V
The inductor current ripple is typically set to 20% to 40% COUT • VOUT • f
of the maximum inductor current.
where
IP = Peak Inductor Current
Rt SHDN
MODE
VIN
VC
FB
The ESR can be a significant factor for ripple in most
SW VOUT power converters. The ripple due to capacitor ESR is
GND POK
simply given by:
VRCESR = IP • RESR V

VOUT
where
RESR = Capacitor Series Resistance
3402 F01

Low ESR capacitors should be used to minimize output

Figure 1. Recommended Component Placement. Traces voltage ripple. For surface mount applications, AVX TPS
Carrying High Current Are Direct. Trace Area FB and VC Pins series tantalum capacitors and Sanyo POSCAP or Taiyo-
Are Kept Low. Lead Length to Battery Should be Kept Short
Yuden ceramic X5R or X7R type capacitors are recom-
mended. For through-hole applications Sanyo OS-CON
For high efficiency, choose an inductor with a high fre-
capacitors offer low ESR in a small package size. See Table
quency core material, such as ferrite, to reduce core
2 for a list of component suppliers. In some layouts it may
losses. The inductor should have low ESR (equivalent
be required to place a 1μF low ESR capacitor as close to the
series resistance) to reduce the I2R losses and must be
VOUT and GND pins as possible.
able to handle the peak inductor current without saturat-
ing. Molded chokes or chip inductors usually do not have
Table 2. Capacitor Vendor Information
enough core to support the peak inductor currents in the
SUPPLIER PHONE FAX WEBSITE
1A to 2A region. To minimize radiated noise, use a toroid,
AVX (803) 448-9411 (803) 448-1943 [Link]
pot core or shielded bobbin inductor. See Table 1 for
suggested components and Table 1 for a list of component Sanyo (619) 661-6322 (619) 661-1055 [Link]

suppliers. Taiyo Yuden (408) 573-4150 (408) 573-4159 [Link]

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LTC3402
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APPLICATIO S I FOR ATIO
Input Capacitor Selection applications where physical size is the main criterion then
running the converter in this mode is acceptable. In
The input filter capacitor reduces peak currents drawn from
applications where it is preferred not to enter this mode,
the input source and reduces input switching noise. Since
then the maximum operating frequency is given by:
the IC can operate at voltages below 0.5V once the output
is regulated, then demand on the input capacitor is much
VOUT – VIN
less and in most applications a 4.7μF is recommended. fMAX _ NOSKIP = Hz
VOUT • tON(MIN)
Output Diode
where tON(MIN) = minimum on time = 120ns.
For applications with output voltages over 4.3V, a Schottky
100
diode is required to ensure that the SW pin voltage does Burst Mode
90
not exceed its absolute maximum rating. The Schottky OPERATION
80
diode across the synchronous PMOS switch provides a 3MHz
70
lower drop during the break-before-make time (typically

EFFICIENCY (%)
300kHz 1MHz
60
20ns) of the NMOS to PMOS transition. The Schottky 50
diode improves peak efficiency (see graph “Efficiency 40
Loss Without Schottky vs Frequency). Use of a Schottky 30
diode such as a MBR0520L, 1N5817 or equivalent. Since 20
slow recovery times will compromise efficiency, do not 10
use ordinary rectifier diodes. 0
0.1 1 10 100 1000
OUTPUT CURRENT (mA)
Operating Frequency Selection 3402 G08

There are several considerations in selecting the operating Figure 2. Converter Efficiency 2.4V to 3.3V
frequency of the converter. The first is determining the
sensitive frequency bands that cannot tolerate any spec-
Reducing Output Capacitance with a Load Feed
tral noise. For example, in products incorporating RF Forward Signal
communications, the 455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired. In many applications the output filter capacitance can be
Some communications have sensitivity to 1.1MHz. In this reduced for the desired transient response by having the
case, a 2MHz converter frequency may be employed. device commanding the change in load current, (i.e.
system microcontroller), inform the power converter of
The second consideration is the physical size of the
the changes as they occur. Specifically, a “load feed
converter. As the operating frequency goes up, the induc- forward” signal coupled into the VC pin gives the inner
tor and filter caps go down in value and size. The trade off
current loop a head start in providing the change in output
is in efficiency since the switching losses due to gate
current. The transconductance of the LTC3402 converter
charge are going up proportional with frequency. For at the VC pin with respect to the inductor current is typically
example in Figure 2, for a 2.4V to 3.3V converter, the
170mA/100mV, so the amount of signal injected is pro-
efficiency at 100mA is 5% less at 2MHz compared to
portional to the anticipated change of inductor current
300kHz. with load. The outer voltage loop performs the remainder
Another operating frequency consideration is whether the of the correction, but because of the load feed forward
application can allow “pulse skipping.” In this mode, the signal, the range over which it must slew is greatly
minimum on time of the converter cannot support the duty reduced. This results in an improved transient response.
cycle, so the converter ripple will go up and there will be A logic level feed forward signal, VFF, is coupled through
a low frequency component of the output ripple. In many components C5 and R6. The amount of feed forward
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APPLICATIO S I FOR ATIO
signal is attenuated with resistor R6 and is given by the The output filter zero is given by:
following relationship: 1
fFILTERZERO = Hz
⎛ V • R5 • VIN • 1.5⎞ 2 • π • RESR • COUT
R6 ≈ ⎜ FF ⎟ – R5
⎝ VOUT • ΔIOUT ⎠ where RESR is the capacitor equivalent series resistance.
where ΔIOUT = load current change. A troublesome feature of the boost regulator topology is
the right half plane zero (RHP) and is given by:
VIN VOUT 2
VIN RO
3
LTC3402
4
fRHPZ = Hz
VIN SW 2
10
2πLVO
7
SHDN VOUT
2
MODE/SYNC FB
8 At heavy loads this gain increase with phase lag can occur
6 9
at a relatively low frequency. The loop gain is typically
PGOOD VC
rolled off before the RHP zero frequency.
1 5 C3
Rt GND
The typical error amp compensation is shown in Figure 4.
R5 The equations for the loop dynamics are as follows:
C5
1
LOAD FEED R6
3.3nF
fPOLE1 ≈ Hz
FORWARD
SIGNAL
VFF
3402 F03
2 • π • 20 • 106 • CC1
which is extremelyclose to DC
Figure 3
1
f ZERO1 = Hz
Closing the Feedback Loop 2 • π • RZ • CC1
The LTC3402 used current mode control with internal 1
fPOLE2 ≈ Hz
adaptive slope compensation. Current mode control elimi- 2 • π • RZ • CC2
nates the 2nd order filter due to the inductor and output
capacitor exhibited in voltage mode controllers, and sim- Refer to AN76 for more closed-loop examples.
plifies it to a single-pole filter response. The product of the
modulator control to output DC gain plus the error amp
open-loop gain equals the DC gain of the system. VOUT
+ 1.25V
GDC = GCONTROLOUTPUT • GEA ERROR
FB
R1
AMP
– 8
2 • VIN
GCONTROL = , GEA ≈ 2000 VC R2

IOUT 9
CC1 CC2
The output filter pole is given by: RZ

IOUT 3402 F04

fFILTERPOLE = Hz
π • VOUT • COUT Figure 4
where COUT is the output filter capacitor.

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11
LTC3402
UU
OUTPUT DISCO ECT CIRCUITS

Single Cell Output Disconnect

ZETEX
VIN = 0.9V TO 1.5V FMMT717
VOUT

LTC3402
3 4
VIN SW RB*
10 7
SHDN VOUT
2 8 C5
MODE/SYNC FB
1μF
6 9
PGOOD VC
1 5
Rt GND

3402 TA03

(VOUT – VINMIN – 0.7V) • 100

*SET RB TO FORCE BETA OF ≤100; RB =
IOUTMAX

0 = FIXED FREQUENCY
1 = Burst Mode OPERATION

Dual Cell Output Disconnect Allowing Full Load Start-Up

VIN = 1.8V TO 3V IRLML6401

VOUT

R7 LTC3402
3 4 RG
1M VIN SW
1M
10 7
SHDN VOUT
2 8 C5
MODE/SYNC FB 1μF
6 9
PGOOD VC
2N2222
1 5
Rt GND

3402 TA04

0 = FIXED FREQUENCY
1 = Burst Mode OPERATION

3402fb

12
 LTC3402
U
TYPICAL APPLICATIO S

Single Cell to 3V at 500mA, All Ceramic Capacitor, 3MHz Step-Up Converter Efficiency

90
L1 R4 Burst Mode
2.2μH 5.1M D1 80 OPERATION
VIN = 0.9V TO 1.5V VOUT
3V 70
500mA
3MHz FIXED
R3 LTC3402 60

EFFICIENCY (%)
3 4 R2 FREQUENCY
1M VIN SW
866k 50
10 7
SHDN VOUT 40
+1 2 8
MODE/SYNC FB C2 30
CELL 10μF
6 9 20
PGOOD VC
C3
C1 1 5 470pF 10
C4 R1
3.3μF Rt GND
20pF 619k 0
Rt R5 0.1 1 10 100 1000
10k 39k OUTPUT CURRENT (mA)
3402 TA05b

C1: TAIYO YUDEN JMK212BJ335MG 3404 TA05a

0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK325BJ106MM
1 = Burst Mode OPERATION D1: ON SEMICONDUCTOR MBRM120T3
L1: COILCRAFT DO1608-222

Li-Ion to 5V at 300mA, 1MHz Step-Up Converter Efficiency

L1 100
10μH D1* Burst Mode OPERATION
VIN = 2.5V TO 4.2V VOUT
90
5V
600mA 80
R3 LTC3402
3 4 R2 70
1M VIN SW 1MHz
EFFICIENCY (%)

1.65M 60 FIXED
10 7 FREQUENCY
SHDN VOUT 50
2 8 C2*
Li-Ion MODE/SYNC FB 40
22μF
6 9 30
PGOOD VC
C1 C3 20
4.7μF 1 5 470pF
Rt GND C4 R1 10
4.7pF 549k VIN = 3.6V
Rt R5 0
30.1k 82k 0.1 1 10 100 1000
LOAD CURRENT (mA)
3402 G10
*LOCATE COMPONENTS AS CLOSE TO 3402 TA07a
0 = FIXED FREQUENCY IC AS POSSIBLE
1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ475MG
C2: TAIYO YUDEN JMK325BJ226MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDH53-100

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13
LTC3402
U
TYPICAL APPLICATIO S

High Efficiency, Compact CCFL Supply with Remote Dimming

C3
27pF
1kV

6 5
T1

1 10 2 3 4

R1 CCFL
VIN = 2.5V TO 4.2V 300Ω C2
Q1 0.22μF Q2

L1
33μF R4
D1 D4 20k DIMMING
INPUT
0V TO 2.5V

R5 LTC3402
3 4
Li-Ion 1M VIN SW
10 7
SHDN VOUT
D2 D3
2 8
MODE/SYNC FB
R2
6 9 10k
PGOOD VC
C1 C5
10μF 1 5 1μF R3
Rt GND
1k
Rt C4
150k 0.1μF
3402 TA06

C1: TAIYO YUDEN JMK212BJ106MG L1: SUMIDA CD-54-330MC CCFL BACKLIGHT APPLICATION CIRCUITS
C2: PANASONIC ECH-U Q1, Q2: ZETEX FMMT-617 CONTAINED IN THIS DATA SHEET ARE
D1: ZETEX ZHCS-1000 T1: SUMIDA C1Q122 COVERED BY U.S. PATENT NUMBER 5408162
D2 TO D4: 1N4148 AND OTHER PATENTS PENDING

3402fb

14
 LTC3402
U
PACKAGE DESCRIPTION

MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)

0.889 ± 0.127
(.035 ± .005)

5.23
(.206) 3.20 – 3.45
MIN (.126 – .136)

3.00 ± 0.102
(.118 ± .004) 0.497 ± 0.076
0.305 ± 0.038 0.50
(.0120 ± .0015) (.0197) (NOTE 3) (.0196 ± .003)
10 9 8 7 6
TYP BSC REF
RECOMMENDED SOLDER PAD LAYOUT

4.90 ± 0.152 3.00 ± 0.102

DETAIL “A” (.193 ± .006) (.118 ± .004)
0.254 (NOTE 4)
(.010)
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006) 1.10 0.86
(.043) (.034)
DETAIL “A” REF
MAX
0.18
(.007)
SEATING
PLANE 0.17 – 0.27 0.127 ± 0.076
(.007 – .011) (.005 ± .003)
0.50
TYP MSOP (MS) 0603
NOTE: (.0197)
1. DIMENSIONS IN MILLIMETER/(INCH) BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3402fb

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3402
U
TYPICAL APPLICATIO
Triple Output Converter

D2 D3 D4 D5
8V
2mA

0.1μF 0.1μF 0.1μF 4.7μF

VIN =1.8V TO 3V L1 2.2μH D1 VOUT

3.3V
500mA
R3
LTC3402
1M 3 4 R2
VIN SW
909k
10 7
SHDN VOUT
+ 2
2 8 C2
MODE/SYNC FB
CELLS 22μF
6 9
PGOOD VC
C1 C3 R1
4.7μF 1 5 470pF 549k
Rt GND
R5 C4
Rt 82k 4.7pF
30.1k

3402 TA08
0 = FIXED FREQ 0.1μF
1 = Burst Mode OPERATION
D6
C1: TAIYO YUDEN JMK212BJ475MG 4.7μF
C2: TAIYO YUDEN JMK325BJ226MM D7
D1: ON SEMICONDUCTOR MBRM120T3 –2.5V
D2 TO D7: ZETEX FMND7000 DUAL DIODE 1mA
L1: SUMIDA CD43-2R2M

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3402fb

LT 0607 REV B • PRINTED IN USA

Linear Technology Corporation
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