Thermal Oxidation – Basic concepts
• SiO2 and the Si/SiO2 interface are
the principal reasons for silicon’s
dominance in the IC industry.
• SiO2:
‒Easily selectively etched
using lithography.
‒Masks most common
impurities (B, P, As, Sb).
‒Excellent insulator (ρ > 1016
Ωcm, Eg > 9 eV).
‒High breakdown field (107
Vcm-1)
‒Excellent junction
passivation.
‒Stable bulk electrical
properties.
‒Stable and reproducible
interface with Si.
1
Basic process for the oxidation
Oxidation process takes place at the Si/SiO2 interface.
Silicon oxidation therefore occurs by the inward
diffusion of the oxidant, rather than the outward
diffusion of silicon.
Oxidation involves a volume expansion
because of the room needed for the oxygen
atoms. The oxide would like to expand by
30% in all 3-D to accommodate the oxygen
atoms. Because the silicon substrate prevents
expansion in two directions, the only option is
for the oxide to expand upward. The volume is
thus accommodated by a 2.2 times upward
expansion of the oxide compared to the
volume of the Si oxidized.
2
Cross-section pictures
Oxide
Silicon
• SiO2 is amorphous even though it
• Oxidation involves a volume grows on a crystalline substrate.
expansion (~ 2.2X).
• Especially in 2D and 3D structures,
stress effects play a dominant role.
3
Oxidation system
• Oxidation systems are conceptually very simple.
• In practice today, vertical furnaces, RTO systems and fast ramp furnaces all find use.
4
Horizontal tube furnace
5
Vertical tube furnace
• Small footprint
• Good for the increase of the wafer size
• Excellent temp. uniformity
6
Rapid thermal oxidation
Temp.
RTP (Single Wafer)
Furnace (Batch)
Time
• Single wafer type (low
throughput)
• Small thermal budget
• Needs accurate temp.
measurement and
control
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Oxide Thickness Characterization (I)
Color chart
• Color Chart
- Compare SiO2 wafer with the reference
color chart
- Periodic repetition of color with
thickness
- No information for thin oxides
- Not accurate measurement method
8
Oxide Thickness Characterization (II)
• Nanospec®
- Uses monochromatic light and measures the reflected light interference
- Reliably works for film thickness over 10nm
- Needs refractive index
φ
n0
xo β n1
n2
Substrate
9
Oxide Thickness Characterization (III)
• Ellipsometer
- Polarization change occurs when the
light is reflected from or transmitted
through a medium
- Polarization changes are a function of
optical properties (thickness and
refractive index)
[Link]
10
Oxide Thickness Characterization (IV)
• High Resolution TEM
- Most accurate measurement technique
- Destructive method (not useful for in-line monitoring)
- Needs sophisticated sample preparation and high cost
Ref) Mark Bohr, “Intel’s 90
nm Process Starting High
Volume Manufacturing,”Intel
Developer Forum, Sep. 16,
2003
11
C-V Measurements
• C-V measurement : the most powerful
tool to characterize SiO2 and the Si/SiO2
interface.
• Electric field lines pass through the
“perfect” insulator and Si/SiO2 interface,
into the substrate where they control
charge carriers.
• Accumulation, depletion and inversion
result.
12
C-V measurements
• HF curve - inversion layer carriers cannot be generated fast enough to follow the AC signal
so Cinv is Cox + CD.
• LF curve - inversion layer carriers follow the AC signal so Cinv is just Cox.
• Deep depletion - “DC” voltage is applied fast enough that inversion layer carriers cannot
follow it, so CD must expand to balance the charge on the gate.
• C-V measurements can be used to extract quantitative values for:
1. tox - oxide thickness
2. NA - the substrate doping profile
3. Qf, Qit, Qm, and Qot - oxide & interface charges.
• See text for more details on these measurements.
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Oxide Charges
Interface-state charge Qit
originated from structural defect related to the oxidation process, metallic impurities, or
bond breaking processes.
located at the Si/SiO2 interface with energy states in the silicon forbidden bandgap
and which can exchange charges with silicon in a short time.
Because interface-state levels are distributed across the silicon bandgap,
Dit ( interface-state density ) is defined as
1 dQit 2
Dit = ( # of charges / cm ⋅ eV )
q dE
2
Order of 1010/ cm ⋅ eV.
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Oxide Charges
Interface-state charge Qit (Continued)
C-V and G-V are typically used to determine the Qit.
A low temperature hydrogen anneal ( post-metallization anneal ) is effective in
reducing Qit.
⇒ usually in forming gas (H2-N2) in the temperature range of 350 ~ 500°C
Oxide trapped charge Qot
positively (hole) or negatively (electron) trapped charge in the bulk oxide
associated with defects in the SiO2, and may result from X-ray radiation or hot electron
injection.
can be annealed out ( not perfectly )
range from 109 ~1013 /cm2
Trapping and detrapping processes cause hysteresis in C-V curve.
15
Oxide Charges
Fixed oxide charge Qf
Originated from nonstoichiometric region (strained region) of SiO2 near the Si/SiO2
interface (SiOx where 1 < x < 2 )
Immobile under an applied electric field. ( cannot be charged or discharged )
For electrical measurement, Qf is considered as a charge sheet at the Si/SiO2
interface. ( typically measured by ∆VFB in C-V curve. )
Ranged from 1010/cm2 ~ 1012/cm2 depending on oxidation and annealing conditions as
well as silicon wafer orientation.
1) orientation dependence : Qf (100) < Qf (111), relating to the number of available
bonds per unit area of silicon surface.
2) the last high temperature thermal treatment determines Qf
( Usually, higher temperature produces lower value of Qf )
a. fast cooling from high temperature oxidation
⇒ rapid cooling prevents oxidation at low temperature
b. when low temperature oxidation is inevitable (e.g. very thin gate oxide
formation ), in-situ subsequent high temperature annealing in an inert gas
ambient is to be added.
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Oxide Charges
Mobile ionic charge QM
attributed to alkali ions such as sodium, potassium, …. and heavy metals
range from 1010 ~1012 /cm2
related to the processing environment, i.e. cleanliness of the oxidation process
including such components of the process as :
a) the furnace tube,
b) processing chemicals,
c) oxidizing ambient,
d) gate electrode material,
e) wafer handing, and so on.
For most recent device application, all sum of these oxide charges should be
kept to the low 1010 cm-2 regime.
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Thermal Oxidation of Silicon
Because a silicon surface has a high affinity for oxygen, an oxide layer rapidly forms
when silicon is exposed to an oxidizing ambient .
There are two basic chemical reactions in describing the thermal oxidation of silicon ;
Dry oxidation : Si (solid) + O2 → SiO2 (solid) …………… (1)
Wet oxidation : Si (solid) + 2H2O (steam, or water vapor)
→ SiO2 (solid) + 2H2 …………… (2)
O2 or H2O
Oxidation proceeds by the diffusion of
the oxidizing species through the
dox (oxide
oxide to the Si-SiO2 interface, where
thickness )
the oxidation reaction occurs. 0.44 × dox
Original
surface Silicon
Volume ratio =
oxide thinkness under the original silicon surface
× 100 % = 44%
total thickness of oxide
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Deal & Groove Model
The oxidizing species are transported with flux ;
F1 : from the bulk of the gas to the gas/oxide interface
F2 : diffusion across the existing oxide toward the silicon
F3 : reaction with silicon at oxide/silicon interface
At steady state : F1 = F2 = F3
F1 = hG (CG − C S ) …………… (3)
where hG is the gas-phase mass-transfer coefficient.
F1 is linearly approximated by assuming that the flux of oxidant
is proportional to the difference between the CG and CS.
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To relate the equilibrium oxidant concentration
in the oxide to that in the gas phase,
Henry’s law is involved.
CO : equilibrium concentration in the oxide
CO = H ⋅ p S ……… (4) at the outer surface
C* : equilibrium bulk concentration in the
C * = H ⋅ pG ……… (5) oxide
pS : partial pressure in the gas adjacent to
For the ideal gas, the oxide surface
pG : partial pressure in the bulk of the gas
pG H : Henry’s law constant.
CG = ……… (6)
kT hG : the gas-phase mass-transfer
pS ……… (7) coefficient
CS =
kT
From Eq. (4) ~ (7), we can rewrite Eq. (3) as
F1 = h(C * −CO ) ……… (8)
hG
where, h=
HkT
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Diffusion of oxidant across the oxide :
D : the diffusion coefficient
(C − Ci )
F2 = − D dC = D O ……… (9) dox : the oxide thickness
dx d ox Ks : the rate constant of interface
reaction for silicon oxidation
Following the steady-state assumption, F2
must be the same at any point within the
oxide, resulting in
(CO − Ci )
F2 = D .
d ox
The flux corresponding to the Si/SiO2 interface reaction is
F3 = k s Ci ……… (10)
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At steady state, F1 = F2 = F3.
Thus,
C*
Ci = ……… (11)
k kd
1 + s + s ox
h D
k s d ox
[1 + ]⋅C *
CO = D ……… (12)
k kd
1 + s + s ox
h D
When D is small or dox is large, Ci → 0, CO → C*.
( oxidant supply to the Si/SiO2 interface is not enough. )
⇒ diffusion-controlled ( or diffusion-limited )
C*
When D is large or dox is small, Ci = CO →
( an abundant supply of oxidant is k
1+ s
provided at the Si/SiO2 ) h
⇒ reaction-controlled ( or reaction-limited )
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Oxidation rate :
dd ox ksC *
N1 = F3 = k s Ci = ……… (13)
dt k kd
1 + s + s ox
h D
N1 :the number of oxidant
Initial condition : when t = 0, dox = di. molecules incorporated into a
( assuming that an oxide may initially unit volume of the oxide layer.
be present )
From Eq. (13), the famous “linear-parabolic relationship” is derived.
2
d ox + A ⋅ d ox = B (t + τ ) ……… (14)
Where, 1 1
A = 2 D( + ) ……… (14a)
ks h
2 DC * “τ” represents a time shift to
B= ……… (14b)
N1 account for the presence of
the initial oxide layer di .
d i2 + Ad i
τ= ……… (14c)
B 23
From Eq. (14),
1
A t +τ 2
d ox /( ) = 1 + 2 − 1 ……… (15)
2 A / 4B
For long time oxidation ( t >>τ ),
2
d ox ≅ B ⋅t ……… (16)
For short time oxidation ( t+τ << A2/4B ),
B
d ox = (t + τ ) ……… (17)
A
B : parabolic rate constant
B ks h C *
=(
: linear rate constant ⋅ )
A ks + h N1
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Even though D of water < D of oxygen in oxide,
B for wet oxidation is substantially large than for dry oxidation.
⇒ because C* for wet oxidation is three orders of magnitude greater than for dry
oxidation.
C* can be calculated by Eq. (14b) if we measure B.
( C* for O2 : 5.2 × 1016 cm-3 at 1000°C,
for H2O : 3.0 × 1019 cm-3 at 1000°C )
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SiO2 Growth Kinetics Models
A. Deal Grove Model
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