Altium Designer 18

Essentials

Essentials Exercises

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Table of Contents
Exercise 1: Design Environment 13
1.1 Purpose ...................................................................................................... 13
1.2 Opening Files ............................................................................................. 13
1.3 Documents & Panels ................................................................................. 14
1.3.1 Document Bar ................................................................................................................ 14
1.3.2 Panel Access ................................................................................................................. 15
1.3.3 Panel Display Modes ..................................................................................................... 15
1.3.3.1 Docked Mode ..................................................................................................................... 16
1.3.3.2 Pop-up Mode ..................................................................................................................... 16
1.3.3.3 Floating Mode .................................................................................................................... 17
1.3.4 Grouping Panels ............................................................................................................ 18
1.3.4.1 Tabbed Panel Grouping ..................................................................................................... 18
1.3.4.2 Fractal Panel Grouping ...................................................................................................... 18
1.3.5 Closing Panels ............................................................................................................... 19
1.3.6 Maximizing/Restore Panels ........................................................................................... 19
1.3.7 Desktop Layouts ............................................................................................................ 20
1.4 Toolbars ..................................................................................................... 20
1.4.1 Active Bar ...................................................................................................................... 20
1.4.2 Classic Toolbars ............................................................................................................ 21
1.5 Menu Operations ....................................................................................... 21
1.5.1 Right-Click Context Menu .............................................................................................. 21
1.5.2 Shortcut Keys ................................................................................................................ 22
1.6 Status Bar and Command Status ............................................................. 22
1.7 Undo and Redo .......................................................................................... 22

Exercise 2: It Starts with a Project 24

2.1 Purpose ...................................................................................................... 24
2.2 Create a New Project ................................................................................. 24
2.2.1 Project Wizard ............................................................................................................... 24
2.2.2 Adding New Documents ................................................................................................ 25
2.2.3 Project Options .............................................................................................................. 26
2.3 Package a Project for Easy Transfer........................................................ 27

Exercise 3: Schematic Preferences 28

3.1 Purpose ...................................................................................................... 28
3.2 Preparation................................................................................................. 28
3.3 Setting Preferences ................................................................................... 28
3.4 Graphical Editing ....................................................................................... 31
3.4.1 Always Drag .................................................................................................................. 31
3.4.2 Convert Special Strings ................................................................................................. 32
3.5 Grids ........................................................................................................... 33
3.6 Schematic Defaults ................................................................................... 34

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 3.6.1 Default Primitives ........................................................................................................... 34

Exercise 4: Navigating Schematics 36

4.1 Purpose ...................................................................................................... 36
4.2 Preparation................................................................................................. 36
4.3 Basic Schematic Preference Settings...................................................... 36
4.3.1 Setting the Default Template & Sheet Size ................................................................... 36
4.3.2 Project Insight ................................................................................................................ 38
4.3.3 Connectivity Insight ....................................................................................................... 40
4.3.4 Schematic Navigator ..................................................................................................... 44
4.4 Navigation within the Schematic Workspace.......................................... 46
4.4.1 Basic Navigation using the Mouse ................................................................................ 46
4.4.2 Basic Navigation using the Keyboard ............................................................................ 46
4.4.3 View Menu Hotkey Sequences ..................................................................................... 46
4.4.4 Jump Menu Hotkey Sequences .................................................................................... 47
4.4.5 Search with the Search Field ........................................................................................ 47

Exercise 5: Schematic Capture 49

5.1 Purpose ...................................................................................................... 49
5.2 Preparation................................................................................................. 49
5.3 Create A New Project ................................................................................ 49
5.3.1 Adding New Documents ................................................................................................ 50
5.3.2 Adding an Integrated Library ......................................................................................... 51
5.4 Component Placement .............................................................................. 52
5.4.1 Setting the grid .............................................................................................................. 52
5.4.2 Processor Interface Schematic Component Placement:............................................... 53
5.4.3 CAN_Interface Schematic Component Placement: ...................................................... 56
5.4.4 Relay_I/O Schematic Component Placement: .............................................................. 59
5.5 Adding an Existing Schematic to Your Design ....................................... 61

Exercise 6: Making the Connection 62

6.1 Purpose ...................................................................................................... 62
6.2 Preparation................................................................................................. 62
6.3 Wiring the Schematic ................................................................................ 62
6.3.1 Shortcuts ....................................................................................................................... 62
6.3.2 Processor_Interface Schematic .................................................................................... 62
6.3.2.1 Wire Connections ............................................................................................................... 62
6.3.2.2 Smart Paste Wires ............................................................................................................. 64
6.3.2.3 Power Ports ....................................................................................................................... 64
6.3.2.4 Net Labels .......................................................................................................................... 65
6.3.2.5 Ports................................................................................................................................... 65
6.3.3 CAN_Interface Schematic ............................................................................................. 66
6.3.3.1 Net Labels .......................................................................................................................... 66
6.3.3.2 Smart Paste Ports .............................................................................................................. 67
6.3.4 Digital_IO Schematic ..................................................................................................... 68
6.3.4.1 Auto-Generated Wires ....................................................................................................... 68

Exercise 7: Schematic Updating 69

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 7.1 Purpose ...................................................................................................... 69
7.2 Align............................................................................................................ 69
7.2.1 Align Right ..................................................................................................................... 69
7.3 Formatting Net Labels ............................................................................... 69
7.3.1 Selecting All Net Labels................................................................................................. 69
7.3.2 Apply Formatting to Net Labels ..................................................................................... 70
7.4 Locking Components Designators .......................................................... 71
7.4.1 Selecting only 100nF 50V Capacitors ........................................................................... 71
7.4.2 Lock the 100nF 50V Capacitors Designators ................................................................ 72
7.5 Net Color Highlighting............................................................................... 72
7.6 Schematic Annotation ............................................................................... 74

Exercise 8: Schematic Graphics 76

8.1 Purpose ...................................................................................................... 76
8.2 Preparation................................................................................................. 76
8.3 CAN Interface Schematic .......................................................................... 76
8.3.1 Text String ..................................................................................................................... 76
8.3.2 Round Rectangle ........................................................................................................... 77
8.4 Number Schematic Sheets ....................................................................... 81
8.5 Smart PDF .................................................................................................. 83

Exercise 9: Compiling in Altium Designer 85

9.1 Purpose ...................................................................................................... 85
9.2 Preparation................................................................................................. 85
9.3 Project Options .......................................................................................... 85
9.3.1 Error Reporting Tab ....................................................................................................... 85
9.3.2 Connection Matrix Tab .................................................................................................. 86
9.3.3 Options Tab ................................................................................................................... 86
9.4 Running the Compiler ............................................................................... 87
9.4.1 Correcting Errors and Warnings .................................................................................... 87

Exercise 10: Adding Hierarchy 92

10.1 Purpose .................................................................................................... 92
10.2 Preparation............................................................................................... 92
10.3 Create Top-Level Schematic................................................................... 92
10.4 Sheet Symbols ......................................................................................... 92
10.4.1 Creating a Sheet Symbol from Scratch ....................................................................... 92
10.4.2 Adding Sheet Entries ................................................................................................... 93
10.4.2.1 Use the Smart Paste to convert ports to sheet entries: .................................................... 93
10.4.3 Creating a Sheet Symbol from Existing Sheet ............................................................ 96
10.5 Connecting the Sheet Symbols .............................................................. 97
10.5.1 Wiring the Sheet Symbols ........................................................................................... 97
10.5.2 Wiring the Relay Bus ................................................................................................... 97

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 10.5.3 Labeling the Bus and Bus Slices ................................................................................. 98
10.6 Creating a Schematic Sheet from Sheet Symbol .................................. 99
10.6.1 Create Sheet from Sheet Symbol ................................................................................ 99
10.6.2 Completing the Newly Created Schematic Sheet ....................................................... 99

Exercise 11: Transfer to PCB 102

11.1 Purpose .................................................................................................. 102
11.2 Preparation............................................................................................. 102
11.3 Before the Transfer................................................................................ 102
11.3.1 Footprint Validation.................................................................................................... 102
11.3.1.1 Connect to the Content Vault ......................................................................................... 103

11.4 Transferring the Design ........................................................................ 105

11.4.1 The Initial Transfer..................................................................................................... 105
11.4.2 Cross Select Mode .................................................................................................... 105
11.4.3 Assigning Directives .................................................................................................. 106

Exercise 12: Updating the PCB 109

12.1 Purpose .................................................................................................. 109
12.2 Preparation............................................................................................. 109
12.3 Component Links .................................................................................. 109

Exercise 13: PCB Introduction 111

13.1 Purpose .................................................................................................. 111
13.2 Preparation............................................................................................. 111
13.3 Moving PCB View .................................................................................. 111
13.4 View Commands .................................................................................... 111
13.5 General ................................................................................................... 112
13.6 Board Insight Display ............................................................................ 115
13.7 Display .................................................................................................... 117
13.8 Board Insight Mode ............................................................................... 119
13.9 DRC Violations Display ......................................................................... 120
13.10 Interactive Routing .............................................................................. 121

Exercise 14: PCB Navigation 123

14.1 Purpose .................................................................................................. 123
14.2 Preparation............................................................................................. 123
14.3 View Commands .................................................................................... 123
14.4 Jump Command .................................................................................... 124
14.5 Cross Probe Mode ................................................................................. 125
14.6 Cross Select Mode ................................................................................ 125
14.7 Layout Mode .......................................................................................... 125
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 14.8 PCB Layers ............................................................................................ 126
14.9 Single Layer Mode ................................................................................. 128
14.10 View Configurations ............................................................................ 129

Exercise 15: PCB Layers 132

15.1 Purpose .................................................................................................. 132
15.2 Preparation............................................................................................. 132
15.3 Adding a new PCB ................................................................................. 132
15.4 Layer Stack Manager ............................................................................. 133
15.4.1 Modify Default Layer Stack ....................................................................................... 133
15.5 Layer Stack Table .................................................................................. 134

Exercise 16: Shaping the PCB 137

16.1 Purpose .................................................................................................. 137
16.2 Preparation............................................................................................. 137
16.3 Board Planning Mode ............................................................................ 137
16.4 Define Board Shape from Selected Objects ........................................ 141
16.4.1 Circle.......................................................................................................................... 141
16.4.2 Rectangle .................................................................................................................. 143
16.5 Defining Board Shape from DXF/DWG ................................................ 145

Exercise 17: PCB Grids 148

17.1 Purpose .................................................................................................. 148
17.2 Preparation............................................................................................. 148
17.3 Predefined Default Grids .......................................................... 148
17.4 Grid Manager ......................................................................................... 149
17.4.1 Global Board Snap Grid ............................................................................................ 149
17.4.2 Custom Cartesian Grid .............................................................................................. 151
17.4.3 Custom Polar Grid ..................................................................................................... 154

Exercise 18: PCB Rules and Panels 156

18.1 Purpose .................................................................................................. 156
18.2 Preparation............................................................................................. 156
18.3 Basic Design Rule ................................................................................. 156
18.3.1 PCB Rules and Constraints Editor ............................................................................ 156
18.3.2 Rule Priorities ............................................................................................................ 157
18.4 Design Rule Using Net Clases .............................................................. 158
18.5 Design Rule Using Custom Queries .................................................... 159
18.5.1 Create Queries Using Find Similar Objects............................................................... 159
18.5.2 Verifying Applied Design Rules in the PCB ............................................................... 162
18.6 Design Rule Wizard ............................................................................... 162

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Exercise 19: PCB Placement 165
19.1 Purpose .................................................................................................. 165
19.2 Preparation............................................................................................. 165
19.3 Placement of Components Within Rooms .......................................... 165
19.3.1 Placing within an Area ............................................................................................... 166
19.3.2 Placing Individual Components ................................................................................. 167
19.3.3 Cross Select Mode .................................................................................................... 169
19.3.4 Position Remaining Components .............................................................................. 173

Exercise 20: PCB Routing 175

20.1 Purpose .................................................................................................. 175
20.2 Preparation............................................................................................. 175
20.3 PCB Routing .......................................................................................... 175
20.3.1 Setting Preferences ................................................................................................... 175
20.3.2 Quick Routing for Simple Nets .................................................................................. 175
20.3.3 Interactive Routing Nets ............................................................................................ 175
20.3.4 Vias ............................................................................................................................ 178
20.3.4.1 Setting Via Sizes ............................................................................................................ 178
20.3.4.2 Adding Vias .................................................................................................................... 178
20.3.5 Multi-Trace Routing ................................................................................................... 179
20.3.6 Adjusting Tracks ........................................................................................................ 180
20.3.7 Track Glossing ........................................................................................................... 180
20.3.8 Active Route .............................................................................................................. 181

Exercise 21: PCB Global Editing 183

21.1 Purpose .................................................................................................. 183
21.2 Preparation............................................................................................. 183
21.3 Properties Panel .................................................................................... 183
21.3.1 Modify PCB Traces.................................................................................................... 183
21.4 Filter Panel ............................................................................................. 185
21.4.1 Object Checkboxes ................................................................................................... 185
21.4.2 Query Selection ......................................................................................................... 187
21.5 Find Similar Objects .............................................................................. 189
21.5.1 PCB Find Similar Objects Dialog ............................................................................... 189
21.5.1.1 Selecting Vias ................................................................................................................ 189
21.5.1.2 Changing Via Size.......................................................................................................... 190

21.6 List Panel................................................................................................ 191

21.6.1 Selecting Components .............................................................................................. 191
21.6.2 Modifying Properties .................................................................................................. 193

Exercise 22: Polygons and Power Planes 194

22.1 Purpose .................................................................................................. 194
22.2 Preparation............................................................................................. 194
22.3 Placing a Polygon Pour......................................................................... 194
22.4 Polygon Properties ................................................................................ 196

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 22.5 Polygon Pour Manager.......................................................................... 198
22.6 Flooding a Layer .................................................................................... 199
22.7 Editing Polygons ................................................................................... 200
22.7.1 Editing an Edge ......................................................................................................... 200
22.7.2 Adding a Vertex ......................................................................................................... 201
22.7.3 Deleting a Vertex ....................................................................................................... 202
22.8 Controlling the Connection Style - Polygon ........................................ 202
22.9 Power Plane ........................................................................................... 204
22.9.1 Controlling the Connection Style – Power Plane ...................................................... 204

Exercise 23: DRCs on PCBs 206

23.1 Purpose .................................................................................................. 206
23.2 Preparation............................................................................................. 206
23.3 Design Rule Check ................................................................................ 206
23.4 PCB Rules and Violations Panel .......................................................... 207
23.5 Resolving Violations ............................................................................. 209

Exercise 24: PCB Fabrication Files 213

24.1 Purpose .................................................................................................. 213
24.2 Preparation............................................................................................. 213
24.3 Bill of Materials ...................................................................................... 213
24.4 Output Job File ...................................................................................... 214
24.4.1 Creating a New Output Job File ................................................................................ 214
24.4.2 Defining Outputs ........................................................................................................ 215
24.4.2.1 Documentation Outputs ................................................................................................. 215
24.4.2.2 Assembly Outputs .......................................................................................................... 215
24.4.2.3 Fabrication Outputs ........................................................................................................ 215
24.4.2.4 Report Outputs ............................................................................................................... 216
24.4.2.5 Validation Outputs .......................................................................................................... 216
24.4.3 Defining Containers ................................................................................................... 216
24.4.3.1 PDF Container ............................................................................................................... 216
24.4.3.2 Folder Container ............................................................................................................ 217
24.4.4 Generating the Outputs ............................................................................................. 217
24.4.4.1 Generating the PDF ....................................................................................................... 217
24.4.4.2 Generating the Folder Structure ..................................................................................... 218

Exercise 25: Draftsman 220

25.1 Purpose .................................................................................................. 220
25.2 Preparation............................................................................................. 220
25.3 Creating a Draftsman Document .......................................................... 220
25.3.1 Creating Draftsman From a Template ....................................................................... 220
25.3.2 Creating Draftsman Without a Template ................................................................... 221
25.4 Page Configuration................................................................................ 221
25.5 Assembly View ...................................................................................... 222

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 25.6 Fabrication View .................................................................................... 223
25.7 Additional Views and Dimensions ....................................................... 224
25.8 Tables ..................................................................................................... 226

Exercise 26: Schematic Symbol Creation 227

26.1 Purpose .................................................................................................. 227
26.2 Create a Crystal Symbol ....................................................................... 227
26.2.1 Creating a Schematic Library .................................................................................... 227
26.2.2 Symbol Properties ..................................................................................................... 227
26.2.3 Defining the Pins ....................................................................................................... 229
26.2.4 Adding Symbol Body ................................................................................................. 230
26.3 Using the Symbol .................................................................................. 232
26.3.1 Installing the Library .................................................................................................. 232
26.3.2 Adding Symbol to Schematic .................................................................................... 233
26.4 Revising the Symbol ............................................................................. 233
26.4.1 Making a Change to the Symbol ............................................................................... 233
26.4.2 Updating the Schematic ............................................................................................ 233

Exercise 27: Footprint Creation 234

27.1 Purpose .................................................................................................. 234
27.2 Creating a PCB Library ......................................................................... 234
27.3 Footprint Creation ................................................................................. 235
27.3.1 Setting the Grid .......................................................................................................... 235
27.3.2 Adding Pads .............................................................................................................. 235
27.3.3 Setting Component Origin ......................................................................................... 237
27.3.4 Adding Top Overlay Outline ...................................................................................... 237
27.3.5 Add Pin 1 Marker ....................................................................................................... 239
27.3.6 3D Crystal Body......................................................................................................... 240
27.4 Use the Footprint ................................................................................... 241
27.4.1 Installing the Footprint Library ................................................................................... 241
27.4.2 Adding Crystal Footprint to PCB Document .............................................................. 242

Component Creation 243

27.5 Purpose .................................................................................................. 243
27.6 Linking Footprint to the Symbol........................................................... 243
27.7 Using Linked Component ..................................................................... 245

Exercise 28: Integrated Library Project 248

28.1 Purpose .................................................................................................. 248
28.2 Preparation............................................................................................. 248
28.3 Create Integrated Library Project ......................................................... 248
28.4 Using the New Library ........................................................................... 254
Getting help.................................................................................................... 255
Local support for your region ................................................................................................ 255

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 Visit www.altium.com ............................................................................................................ 255
Visit http://www.altium.com/documentation .......................................................................... 255
Visit http://live.altium.com/ .................................................................................................... 255

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Exercise 1: Design Environment

1.1 Purpose
In this exercise, you will learn to use some general GUI and navigation functions. You
will have mastered the basic operations of the Altium Designer Environment after the
completion of this exercise. This will be the foundation for future studies.

Altium Designer is a unified design environment. When you run Altium Designer for the first time,
it will become readily apparent through your first steps of working in the software that all EDA
tools are included in a single application. This includes schematic design, simulation, signal
integrity analysis, PCB design tools, documentation/fabrication/assembly outputs, and library
creation.

1.2 Opening Files

1. Click File >> Open Project and browse to your installed example projects folder, which by
default is in C:\Users\Public\Public Documents\Altium\<AD
Version>\Examples\. Open the Bluetooth_Sentinel.PrjPcb from its Bluetooth
Sentinel sub-folder.
2. Locate the Projects panel on the left of the window (Figure 1) and double-click on the
schematic file Microcontroller_STM32F101.SchDoc. This will open the schematic
document within the active workspace and provide the working view of the schematic.
3. Double-click on the PCB file Bluetooth_Sentinel.PcbDoc. This will open the PCB
document within the active workspace and provide the working view of the PCB.

Figure 1: Altium Designer environment

4. Notice that there are now two tabs on the Document Bar at the top of the editor. Click on each
of these tabs and observe the workspace change to match the document you are focused on.
5. Hit the shortcut keys Ctrl+Tab or Ctrl+Shift+Tab to cycle between the documents.

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 6. If we open multiple documents to the point where the tabs fill up the entire bar, we can
configure its grouping method. Click the Preferences icon on the upper right corner of
Altium Designer. Expand System branch and open the View page. Within Documents Bar,
ensure to enable the “Group documents if need” checkbox and set it to “By document kind” as
shown in Figure 2.

Figure 2: Preferences for document grouping

7. Click OK to close the Preferences window.

If enabled, the documents will be grouped as needed. If there is adequate space within
your documents bar, the documents will not be grouped.

1.3 Documents & Panels

1.3.1 Document Bar
8. Right-click on a Document tab in the Document Bar (as shown in Figure 3 and select Tile All
in the resulting pop-up menu. All the currently open documents will be split into individual
windows and will be displayed horizontally within the main design window.

To resize the window, simply move the cursor to the divider of the two split windows.
When a bi-directional arrow appears, left-click and drag to resize the split windows.

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 Figure 3. Document Bar

9. While documents are tiled or split within the editing workspace, right-click on any document
tab in the Document Bar and select Merge All from the resulting pop-up. The workspace is
restored to a single document display.
10. Feel free to experiment with the other options in the right-click menu like Split Vertically and
Split Horizontally. For multi-monitor display, click on Open in New Window in the right-click
menu to open a new instance or simply drag a document tab to the secondary display.

1.3.2 Panel Access

11. Locate the Panels control button in the lower right corner as shown in Figure 4.
12. Select Libraries from the popup to open the Libraries panel.
13. The panels are also listed in the menu under View >> Panels.

Figure 4. Panel access

1.3.3 Panel Display Modes

Three different display modes are supported for panels - Docked, Pop-up and Floating.

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 1.3.3.1 Docked Mode
14. Right-click on the title bar of the Projects panel. Click on Allow Dock in the pop-up menu
(Figure 5) and ensure that it is enabled for both Horizontally and Vertically (shown in Figure
5).

Figure 5. Allowed docking mode settings.

15. Left-click on the title bar of Projects panel to move it. Drag it to the center of the window and
notice that while the panel is attached to the cursor, we have both horizontal and vertical
docking options (Figure 6). Hover the cursor above the left docking option and release the
left-click hold.

Figure 6: Docking options

1.3.3.2 Pop-up Mode

16. Locate the Libraries panel tab on the right of the window. Hover above its tab to open the
panel. This mode is what we refer to as Pop-up mode, and is often used to maximize screen’s
real estate especially when working on a small monitor.
17. To change the Libraries panel to a docked mode, click on the pin symbol . The pin symbol
will then change to indicating that it is in docked mode.
18. To revert it back to a pop-up mode, click on the pin symbol again. While in this mode, moving
the cursor away would hide then panel after a brief amount of time.
19. Note that the pop-up and hide delay is controlled in Preferences under the System
branch, in the View page (Figure 7).

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 Figure 7. Popup panel delay settings

1.3.3.3 Floating Mode

20. In the bottom right corner of Altium Designer click on Panels and select Storage Manager to
open the Storage Manager panel (Figure 8). By default, this is a floating panel and handy to
explain Floating Mode.

Figure 8. Opening the Storage Manager panel

21. A panel in this mode can be placed anywhere within or outside the Altium Designer
environment. Commonly, the Libraries panel is made to be floating and placed on another
monitor. Move this panel to the middle of the window.
22. To observe the transparency effect of this floating panel, invoke a command by going to
Place >> Wire. Move the command crosshair towards the panel and notice the change of its
transparency.
23. Note that the transparency settings can be controlled in Preferences under the System
branch, in the Transparency page Figure 9.
24. Close the Storage Manager panel by clicking on the close cross button.

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 Figure 9. Transparency setting for floating panels

1.3.4 Grouping Panels

Two modes of grouping panels are supported: Tabbed Grouping and Fractal Grouping.

1.3.4.1 Tabbed Panel Grouping

25. By default, the Projects, Navigator and SCH Filter panels are grouped together in one panel.
To open any one of them, click on the tabs at the bottom of the panel (Figure 10). This is what
we refer to as Tabbed Panel Grouping.

Figure 10: Tabbed panel grouping

1.3.4.2 Fractal Panel Grouping

26. Left-click on Projects tab of the panel group and drag it out to enter floating mode. Drag it
back into the original panel area and notice that as we hover above any of the 4 directional
icons, it will display a blue highlight (Figure 11). Release the click and notice that the panel
will be split into fractal segments.

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 Figure 11: Fractal panel grouping

To prevent a moving panel from automatically docking, grouping or snapping, hold the
CTRL key

1.3.5 Closing Panels

27. Close the panel by right-clicking in its title bar or on its tab, then choose Close from the
pop-up menu. Alternatively, click the close cross at the far right of a panel's caption bar
to close it.

If the panel is part of a group, clicking the Close entry closes all panels in the group. To
close a particular panel, right-click on its name in the title bar.

1.3.6 Maximizing/Restore Panels

28. When in floating mode, a panel can be maximized by right-clicking in its caption bar (or on its
tab, where available) and choosing the Maximize entry from the subsequent pop-up menu.
29. To restore a maximized panel back to its original size, simply right-click in its caption bar or
tab and choose the Restore command from the pop-up menu. Alternatively, double-click in
the title bar to toggle between maximized and restored state.

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1.3.7 Desktop Layouts
30. The panel arrangements are what we refer to as Desktop Layouts. It can be saved, loaded
and reset to default in Preferences, accessible from the upper right corner of Altium
Designer. Open the System branch and open the View page as shown in Figure 12. Within
the Desktop pane, desktop layouts can be saved, loaded or reset to default.
31. Click on Reset. Then, click OK. Close both the SCHList and Storage Manager panels.

Figure 12. Desktop Layouts.

1.4 Toolbars
Like menus and panels, both the Active Bar and Classic Toolbars are context sensitive, so only
commands that are relevant to the document of focus are displayed.

1.4.1 Active Bar

32. Make the schematics the current document of focus. At the top of the document the Active
Bar appear, as shown in Figure 13.
33. Move the cursor to any of the icons in the Active Bar. Wait a second for a hint to appear
describing the function of the tool.

Figure 13: Active Bar in Schematic Editor

34. Open the PCB document. Observe the icons as shown in Figure 14 in the Active Bar and note
the changes.

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 Figure 14: Active Bar in PCB Editor

35. Return to the schematic document.

1.4.2 Classic Toolbars

In addition to the Active Bar, classic toolbars are also available.
36. To open a classic toolbar, go to View >> Toolbars and select Schematic Standard to enable
it.
37. Notice that the toolbar will then be added underneath the menu list on the top of the window
(Figure 15). To disable it, simply return to View >> Toolbars and uncheck on Schematic
Standard

Figure 15: Classic Toolbar

1.5 Menu Operations

1.5.1 Right-Click Context Menu
38. Right-click any free space in the schematic editor and observe the context changes to the
menu as shown on the left side of Figure 16.
39. Within the schematic editor right-click on any components and observe the content in the
context menu as shown on the right side of Figure 16.

Figure 16: Right-click context menu

40. Right-click different areas of the panel and observe the context changes to the menu

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 41. Right-click a toolbar or menu bar and observe the context changes to the menu.

1.5.2 Shortcut Keys

42. Both the menus and menu entries have underlined letters.
a) With the schematic in focus, access the File Menu by pressing the F key directly. The File
menu opens at the location of your cursor.
b) From the popup, press the S key to access the Save command.

1.6 Status Bar and Command Status

43. Click the View menu and locate the Status Bar and Command Status entries (Figure 17).

Figure 17: Activation status for Status Bar and Command Status

44. Ensure that both entries are enabled with a check next to their name. To enable, click the
menu item to toggle.
45. Move the cursor in the schematic editor area and notice the X and Y values changing.
46. Go to Place >> Wire. The active command is displayed in command status area. Hit Escape
or right-click to exit from the command.

Figure 18: Status Bar and Command Status information while in the Place » Wire command.

1.7 Undo and Redo

47. Select a component and hit Delete to delete a component in the schematic.
48. Click Undo and Redo icons on the top left corner (Figure 19.

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 Figure 19: Undo and redo icons

49. As an alternative, use the shortcut key Ctrl+Z or Alt+Backspace for Undo. For redo, the
shortcut key is Ctrl+Y or Ctrl+Backspace.

Feel free to experiment with your panels, opening them, closing them, docking,
undocking, creating tabbed and fractal groups. You can always revert to defaults so
give them a try and become comfortable with their controls.

50. Open the Projects panel. Right click on the project and click on Close Project (Figure 20).
Click Save None and click OK.

Figure 20: Close project

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Exercise 2: It Starts with a Project

2.1 Purpose
In this exercise, you will learn to create a new project, add new and existing files to the
project and save the project. You will then package the project for archiving or to
transfer to external parties.

A project file contains references to its design documents such as schematic and PCB
documents. It also stores project-specific options and parameters defined. In this exercise, we will
be creating a new PCB project.

2.2 Create a New Project

2.2.1 Project Wizard
51. Close all open projects in the Project panel.
52. Go to File >> New >> Project >> Project... to launch the Project wizard (Figure 21).

Figure 21: Project wizard

53. Select PCB Project as Project Type.

54. Try clicking on the templates listed in the Project Templates pane. Notice that as a project
template is selected, a preview of its PCB document is displayed on the right. After viewing
some of the templates, select the <Default> project template to create a blank project.
55. Enter a project name of MyFirstProject.
56. Be sure that the Create Project Folder checkbox is enabled
57. Click on the Browse Location button and navigate to your Desktop.

Projects can be directly saved to a Version Control repository if VCS is chosen under
Project Kind. Use the default of Regular for this exercise.

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 58. Click the OK button to create the new project. Go to your Desktop to confirm that a
MyFirstProject folder has been created on your desktop.
59. In Altium Designer, notice there is a project called MyFirstProject.PrjPcb in the
Projects panel, as shown in Figure 22.

Figure 22: Project panel with new project

2.2.2 Adding New Documents

60. Right-click on MyFirstProject.PrjPcb in the Projects panel.
a) Select Add New to Project and choose Schematic from the pop-up to add a new
schematic to the project. The default name for the schematic is Sheet1.SchDoc.
b) Repeat this operation to add a second schematic. The default name for the second
schematic is Sheet2.SchDoc.

Figure 23: Adding new Schematics to the Project

61. Go to File >> Save All. A dialog box will open, prompting you to save the new files you
created. Save the files in the default desktop folder MyFirstProject that you created
earlier:
• 1st schematic as Hello
• 2nd schematic as World
62. The Projects panel should now look like the one in Figure 24.

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 Figure 24: Project panel with new file names

63. We will navigate to the desktop project folder directly by right-clicking on

MyFirstProject.PrjPcb in the Projects panel and clicking on Explore.

Figure 25: Navigate to file explorer from Projects panel

Add existing files to a project by right-clicking on the project name in the Projects panel
and clicking on Add Existing to Project. Files located outside the project’s directory
structure are displayed in the Projects panel with a linked icon .

2.2.3 Project Options

64. Go to Project >> Project Options
a) Select the Options tab.
b) Disable the option Allow Sheet Entries to Name Nets. This option is recommended to
be turned off to avoid violations of multiple net names caused by the nets being named
differently in the top-level schematic and in the lower-level schematic.
c) Click OK. Go to File >> Save All.

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2.3 Package a Project for Easy Transfer
65. We can use the Project Packager to generate an archive of the project and its documents:
a) Go to Project >> Project Packager.
b) Use the default settings and click next to progress through Project Packager (Figure 26).
c) Click Finish when all the settings are defined.

Figure 26: Project Packager

66. In the Projects panel, right-click on MyFirstProject.PrjPcb and click Explore to see the
MyFirstProject.zip file added to the project folder (Figure 27). The name and location of
the ZIP file were defined in the Zip File Options page of the Project Packager. The default ZIP
name includes the project name with the date and time stamps.

Figure 27: Navigate to packaged project

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Exercise 3: Schematic Preferences

3.1 Purpose
In this exercise, you will learn about schematic specific preferences and how to
customize them. These preferences will ensure document clarity and standardization.

3.2 Preparation
1. Close all open projects in the Projects panel.
2. Go to File >> Open Project and browse to the installed example projects folder. Open
Examples\Bluetooth Sentinel\Bluetooth_Sentinel.PrjPcb.

The default path to your installed examples is C:\Users\Public\Public

Documents\Altium\<AD Version>\Examples\

3.3 Setting Preferences

3. Go to Preferences in the upper right corner of Altium Designer.
4. Expand the Schematic branch and open the General page. Verify that Components Cut
Wires is enabled as shown in Figure 28.
5. Open the Graphical Editing page. Verify that Display Strings as Rotated is unchecked.

6.
Figure 28: General and Graphical Editing settings

7. Click OK to save and close Preferences.

8. In the Projects Panel, double-click on Microcontroller_STM32F101.SchDoc to open it.

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9.
Figure 29: Projects panel

10. Open the Libraries Panel from the Panels button. In this panel, set the drop-down to select
the Miscellaneous Devices.IntLib as shown in Figure 30.

Figure 30: Library selection

11. Type cap in the keyword search to reduce the list to capacitors and select Cap Semi from the
library as shown in Figure 31.

Figure 31: Select Cap Semi from Miscellaneous Devices.IntLib

12. Click the Place Cap Semi button and then rotate the capacitor using Spacebar. Left-click to
place the capacitor on existing wires as shown in Figure 32.

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 Figure 32: Place Cap Semi on wire

13. Notice that the capacitor will be dropped on the wire which will automatically be cut into two
segments, which are terminate at the components’ pins.
14. Open the schematic Oscillator_16MHz.SchDoc.
15. Observe how the wires are currently displayed on the left of component X1 in Figure 33. For
document clarity, it is usually recommended for cross-overs to be displayed. This can be
enabled in Preferences.

Figure 33. Schematic connections for U2

16. Click Preferences, in the upper right corner of Altium Designer. Expand the Schematic
branch and open the General page. Enable Display Cross-Overs and click OK.
17. Notice in Figure 34 how the cross-overs will then be displayed in the schematics.

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 Figure 34: Display Cross-Overs

3.4 Graphical Editing

3.4.1 Always Drag
18. Make the schematic file Microcontroller_STM32F101.SchDoc the active document.
19. Click Preferences, in the upper right corner of Altium Designer. Expand the Schematic
branch and open the Graphical Editing page. Enable Always Drag and click OK.
20. Left-click on U2B. While holding, move the cursor to drag the component around. Notice the
behavior of the connections where the wires will remain connected to the components.
21. Hit Escape to abort the drag.
22. To move the component without maintaining connections, hold the Ctrl key, left-click and hold
on U2B. The component should now move independently of the previously connected tracks.
23. Go to Edit >> Undo or hit Ctrl+Z to undo any changes if necessary.

While dragging a component, ensure to check the connections that it is about to create.
Before releasing the left mouse button, the indicator will show if there is a netlist
modification or not.

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3.4.2 Convert Special Strings
25. Ensure Microcontroller_STM32F101.SchDoc schematic is the active document.
26. Navigate to the title block at the bottom right of the schematic sheet and notice the placed text
strings. These strings are pointing to parameters which currently do not have values yet.
Hence, the parameter names are shown, instead of their values.
27. To modify the document’s parameter list (Figure 35),
a) Open the Properties panel and open the Parameters tab.
b) Try changing the Title parameter value to Test. Notice the change on the title block.
c) Change the Title parameter value back to Microcontroller STM32F101.

28.
Figure 35: Document Parameter

29. Other parameters like =ProjectTitle and =ProjectOrganization are not in the
document’s parameters list yet.
30. However, instead of adding the parameters as document parameters, we will define them as
Project Parameters. Note the document parameters are local and unique per document while
project parameters are global and common for all project documents. To modify the project
parameter list (Figure 36),
a) Go to Project >> Project Options. Open the Parameters tab.
b) Click Add. Type ProjectTitle as the parameter name and Training Project as its
value. Click OK.
c) Click Add. Type ProjectOrganization as the parameter name and Altium
Student as its value. Click OK.
d) The newly created parameters will then be listed. Click OK.

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 31.
Figure 36: Project options

32. Notice that the schematic should now show the newly created parameters’ values. Open
Bluetooth.SchDoc and notice that it will also share the same value for the project
parameters.

33.
Figure 37: Project parameters

Style and special strings of the title block are defined and can only be modified within
the Schematic Template file *.SchDot.

3.5 Grids
34. Click Preferences and expand Schematics branch and open the Grids page.
35. Under Imperial Grid Presets, click Altium Presets and select Course (3 settings) as shown
in Figure 38.
36. Click on the color box beside Grid Color if you wish to change the color of the grid.
37. Click OK to save and close the dialog.

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 Figure 38: Grid settings

38. In the schematics, toggle the snap grid through your new presets by hitting the G key. You
can see the grid change between 50mil, 100mil, and 200mil on the Status Bar (Figure 39).

Figure 39. Grid information

3.6 Schematic Defaults

3.6.1 Default Primitives
Currently, when placing a wire, it will be a blue, small-width wire. In this section, we will change
the default settings for wires so that it defaults to green, large-width wire when placed.
39. Click Preferences and expand the Schematic branch and open the Defaults page.
40. In the Primitives List, select Wire as shown in Figure 40. Change the default wire width to
Large and color to Green.

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41.
Figure 40: Default primitives - wire

42. Click OK to save and close the preferences dialog.

43. Open a schematic document. Go to Place >> Wire. Try placing some wires on the schematic.
Notice that the wires placed will now be default to green, large wires. Hit Esc to end
command.
44. Click Preferences, expand the Schematic branch and open the Defaults page. To reset
all primitive defaults, click Reset All.
45. Note that we can hit F1 while in a Preferences page or any general menu to open the
corresponding online documentation regarding the active window or menu.
46. Open the Projects panel and close all files without saving.

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Exercise 4: Navigating Schematics

4.1 Purpose
Practice some basic operations in the schematic editor such as preference settings,
mouse actions, frequently used shortcut keys, hotkey sequences, and search and jump
actions

4.2 Preparation
1. If not already open, click File » Open Project and browse to your installed example projects
folder. Select Examples\Bluetooth Sentinel\Bluetooth_Sentinel.PrjPcb.

The default path to your installed examples is C:\Users\Public\Public

Documents\Altium\<AD Version>\Examples\

4.3 Basic Schematic Preference Settings

Schematic Preferences are system specific settings which help you control the behavior and
display of the Schematic Editor to suit your working style and needs better. Let's take a look at
some basic preferences you may want to change.

4.3.1 Setting the Default Template & Sheet Size

2. Select Setup System Preferences, in the upper right corner of the interface. Open the
Schematic branch and highlight the General page as shown in Figure 41. From within a
focused schematic document, you can also gain access to the command Tools » Schematic
Preferences.

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 Figure 41. Schematic Preferences - General Page.

3. Navigate to Sheet Size in the bottom right, and a drop-down menu will appear as highlighted
in Figure 41. You can set the default schematic size in this menu. The default setting is A4 or
A – depending on the region you are working. Cancel the dialog.
4. Use the File » New » Schematic command to add a schematic sheet to the project. The
Sheet Size setting according to your region is used to add a schematic sheet.
5. Reopen Setup System Preferences and click Template and a drop-down menu will
appear. You can set the default template file for new schematics in this menu. By default, No
Default Template File is defined.
6. Change the setting to a template of your choice and OK the dialog.
7. Add a second schematic sheet using the File » New » Schematic command and compare
the two newly added sheets. Now the chosen template is used to add a schematic sheet.
8. Close both schematic sheets by selecting them and using the RMB » Close command.

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4.3.2 Project Insight
9. To view the connectivity insight, the project needs to be compiled. Use Project » Compile
PCB Project Bluetooth_Sentinel.PrjPcb to compile the project.
10. In the Setup System Preferences open the System branch and look at the Design Insight
page. Check Enable Project Insight and click OK.

Figure 42. System Preferences – Design Insight Page.

11. Open several schematics of the project and in the Projects panel hover the mouse cursor
over the Bluetooth_Sentinel.PrjPcb project icon as shown in Figure 43. Hover your
mouse over the project icon (not the project name) for a second, and a thumbnail view of
the document within the project will appear at the cursor position.

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 Figure 43. Project Insight.

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4.3.3 Connectivity Insight
12. In the preferences within the Design Insight page, enable the checkbox for Enable
Connectivity Insight and in the Document Tree for Mouse Hover, as shown in Figure 44,
then click OK.

Figure 44. Connectivity Insight, enabling mouse hover viewing.

13. Open Bluetooth_Sentinel.SchDoc and Host_Controller.SchDoc.

14. Make Bluetooth_Sentinel.SchDoc the focused document.
15. Hover the mouse over the Processor sheet symbol block as shown in Figure 45. A large
thumbnail of the Host_Controller.SchDoc will appear next to the cursor.

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 Figure 45. Hover over Sheet Symbol to view the schematic thumbnail.

16. Next, move the cursor to hover over the Harness as shown in Figure 46.

Figure 46. Hover over Bus to view connectivity.

17. A large thumbnail will appear next to the cursor, as shown in Figure 47, which shows the
connections in the design.

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 Figure 47. Connectivity Insight with Bluetooth_Sentinel.SchDoc.

18. Slowly move your cursor down to Host_Controller.SchDoc at the bottom of the
thumbnail, as shown in Figure 48, to change the thumbnail view to the lower level schematic.

The schematic preview will be blank and only show a name and icon if the
corresponding schematic is not currently opened.

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 Figure 48. Connectivity Insight with Host_Controller.SchDoc.

19. Left-click Host_Controller.SchDoc from the pop-up to open it.

20. Open Setup System Preferences and click Set to Defaults in the lower left corner of the
dialog. OK the dialog

In the preferences within the Navigation page, in the section Highlight Methods, you
find a slider that allows you to control the mask level for the objects. The mask level is
used for navigation, cross-probing and exploring differences.

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4.3.4 Schematic Navigator
21. Use the Navigator panel to browse nets, components, or pins across the entire design.
22. Open the Navigator panel by clicking Panels button and select Navigator located on the
bottom right side of the status bar (Figure 49).

Figure 49. Opening the Navigator panel.

23. The Navigator panel will open in the Workspace docked to the left by default (Figure 50).
24. Click on a document name to see nets and components just for that page.
25. Click on the Flattened Hierarchy to see the nets and components for all pages in the project.
26. Click on a component R9 to jump to that element.

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 Figure 50. The Navigator panel docked.

If no components or nets display inside the Navigator panel, compile the project by
selecting Project » Compile PCB Project Bluetooth_Sentinel.PcbDoc.

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4.4 Navigation within the Schematic Workspace
4.4.1 Basic Navigation using the Mouse
27. Make the schematic file Microcontroller_STM32F101.SchDoc the focused document
by left-clicking on its document tab or in the schematic.
a) From the View menu, select Fit All Objects
b) In the schematic, right-click and hold until the panning hand cursor appears .
c) Drag the schematic around while holding the right mouse button down.
d) Release the right mouse button to end.
28. To change the zoom click & hold mouse wheel, then slide mouse forward/back
29. To Zoom in or out click and hold Ctrl + roll mouse wheel
30. Up/Down: roll mouse wheel (scrolling)
31. Left/Right: click and hold Shift + roll mouse wheel

4.4.2 Basic Navigation using the Keyboard

32. Maintain the focus on the Schematic Workspace and observe the behavior of the following
Shortcut Keys:
33. To Zoom out press PAGE DOWN
34. To Zoom in press PAGE UP
35. To Fit All Objects press CTRL+PAGE DOWN
36. To pan and re-center your workspace based on your cursor position press HOME
37. To move in a direction by one Grid Step press the ARROW KEYS
38. To move in a direction by 10 Grid Steps press SHIFT+ARROW KEYS

4.4.3 View Menu Hotkey Sequences

39. Maintain focus on the Schematic Workspace and try the following Hotkey Sequences:

Follow the underlined letters within menus and sub-menus to learn hotkey sequences.

• To View » Fit Document press the V » D keys in succession

• To View » Fit All Objects press the V » F keys in succession
• To View » Area press the V » A keys in succession
• To View » Around Point press the V » P keys in succession
• To View » Selected Objects press the V » E keys in succession

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4.4.4 Jump Menu Hotkey Sequences
40. Maintain the focus on the Schematic Workspace and observe the behavior of the following
jump commands. The Edit » Jump menu is commonly used, so the status of this sub-menu
has been elevated to a popup menu with its hotkey J.
41. To Jump » Origin, press the J » O keys in succession
42. To Jump » Location, press the J » L keys in succession. Then enter the X, Y coordinates
within the Jump to Location dialog (Figure 51) and click OK to move the cursor to the defined
coordinate location. Zooming and panning will occur when necessary if the target location is
outside the visible area.

Figure 51. Jump to Location (JL).

43. Maintain the focus on the Schematic Workspace with the document
Microcontroller_STM32F101.SchDoc open.
a) To Jump » Component, press the J » C keys in succession.
b) Enter U2 into the resulting Component Designator dialog.
c) Press OK and the cursor will jump to the component U2.
In this example U2 is a component with two parts, to have the option to jump to the next
part of U2 a dialog Find Text – Jump opens.
d) Zoom and pan will occur only if necessary to reach the location of the component in the
event it is currently outside the visible area.

4.4.5 Search with the Search Field

44. Make the schematic file Bluetooth_Sentinel.SchDoc the focused document by
left-clicking on its document tab or in the schematic.
45. Open the Projects panel by clicking Panels button and select Projects located on the bottom
right side of the status bar.
46. Enter Designator R10 in the search field at the top of the Projects panel as seen in Figure 52.
47. You will notice that the search result will highlight all field that matches the input of the search
field. Locate the component R10 by opening the Components folder and its subdirectory.

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 Figure 52. Project panel for a component search.

48. Close all documents and projects without to save, Window » Close All.

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Exercise 5: Schematic Capture

5.1 Purpose
You will learn how to add and manipulate components in the schematic capture editor.

In this exercise, you will start a project called WCTopping.PrjPcb and place components on
three schematics in this design. This is a daughter board providing expansion of a typical
controller board via a 40-pin connector.

5.2 Preparation
1. Ensure that you have extracted the AD18 Essentials Exercises ZIP file to your
Desktop. Find the folder “AD18 Essentials Exercises\Schematic Capture”. This
folder contains files you will use and can reference while you complete this module.
2. Close all existing projects you may have open.

5.3 Create A New Project

1. Select the menus: File » New » Project » Project… to launch the Project Wizard. The dialog
shown in Figure 53 will appear.

Figure 53. Create a New Project.

2. Select PCB Project in the top left pane with the Project Template <Default>
3. Enter a project name of WCTopping.
4. Click on the Browse Location button and navigate to your Desktop. Be sure that the Create
Project Folder checkbox is enabled.
5. Select Regular for the Project Kind.
6. Click the OK button to create the new project. Go to your desktop to confirm that a
WCTopping folder has been created.

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 7. Return to Altium Designer and notice that in the Projects panel there is a project called
WCTopping.PrjPCB as shown in Figure 54.

Figure 54. Project panel with WCTopping project added after using the wizard.

5.3.1 Adding New Documents

8. Right-click the project and select Add New to Project - Schematic from the pop-up menu.
This will add a new schematic to project. The default name is Sheet1.SchDoc (Figure 55).
9. Repeat this operation and add three additional schematic files.

Figure 55. Adding new Schematics to the Project.

10. Select menu File » Save All, a dialog box will pop up prompting you to save the new files you
created in the default desktop folder WCTopping you created earlier:
• 1st schematic as Processor_Interface.SchDoc
• 2nd schematic as Digital_IO.SchDoc
• 3rd schematic as Relay_IO.SchDoc
• 4th schematic as CAN_Interface.SchDoc

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 11. The Projects panel should now look like the one in Figure 56. Double check this by navigating
to the desktop project folder. To do this, right-click on the project name and select the
Explore menu.

Figure 56. Renaming Project Files.

5.3.2 Adding an Integrated Library

The schematic library can be a local library or a library of components contained in an Integrated
Library stored on a server. For this exercise, we will use the Integrated Library located in the
folder AD18 Essentials Exercises\Schematic Capture.
12. Open the Libraries panel by clicking on the Panels button in the bottom right corner of the
editor and selecting the Libraries menu if it is not already checked.
a) The Libraries panel should open with the Miscellaneous Devices.IntLib selected
as shown in Figure 57. If not, select the drop-down menu from the top of the libraries
panel and then select the required library.
b) Note that the panel is divided into several panes. The topmost displays a list of library
components for the selected library and the subsequent panes have information related
to the selected component, e.g., symbol and footprint previews, models linked to the
component.

Figure 57. Libraries panel with Miscellaneous Devices.IntLib Selected.

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 13. Click the Libraries… button in the top left corner of the panel. The Available Libraries Dialog
will open as shown in Figure 58.

Figure 58.Installed Libraries currently available.

14. Click the Installed tab.

15. Click on the Install button and select Install From File…
16. Navigate to the training folder AD18 Essentials Exercises\Schematic Capture and
select WCT.IntLib, click the Open button.
17. The WCT.IntLib library should now appear in the Available Libraries dialog along with the
previously installed libraries.
18. Click Close to close the Available Libraries dialog.

5.4 Component Placement

5.4.1 Setting the grid
19. Start by clicking on the Processor_Interface.SchDoc schematic.
a) Open the Properties panel
b) In the pane General (Figure 59), set the value to 200mil, and press Enter to apply the
new value.

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 Figure 59. Set the snap grid to 200.

5.4.2 Processor Interface Schematic Component Placement:

Figure 60. Processor_Interface Schematic Placement.

20. Select the Miscellaneous Connectors.IntLib from the drop-down list of libraries in the
Libraries panel (Figure 61).

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 Figure 61. Select the Miscellaneous Connectors Library.

21. Scroll down the list to find the 40-pin I/O Connector (Header 20x2).
22. Click Place Header 20x2. Notice the name of the selected component is featured in the
command button (Figure 62).

Figure 62. Select the Miscellaneous Connectors Library.

23. Before placing the connector on the schematic, press the TAB key:
a) In the Properties panel that opens, any changes to the default properties will be applied to
subsequently placed objects
b) Change the reference designator to J1 (Figure 63).
c) To apply the changes press Enter, continue with the placement.

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 Figure 63. Component Properties dialog.

24. While in placement mode with a connector attached to the mouse pointer, experiment with
commands to orient the component.
a) Spacebar to rotate counterclockwise 90°
b) Shift+Spacebar to rotate clockwise 90°
c) X to flip along the X-axis
d) Y to flip along the Y-axis

If a placed component should be rotated, select the component and press Spacebar
(counterclockwise 90°) or Shift+Spacebar (clockwise 90°).
If a component being dragged should be rotated, press Ctrl+Spacebar to rotate the
component.

25. Continue placing multiple times, up to at least J4. The reference designators will increment
automatically.
You will remain in placement mode and be able to place multiple components until you
right-click or press ESC
26. Delete all the connectors on the schematic except for J4. This will give you the opportunity to
experiment with the Smart Drag Selection feature:
a) Drag the selection window from left-to-right – you will select all objects that fall
completely within the bounds of the selection area. This behavior is the same as using
the Edit » Select » Inside Area command.
b) Drag the selection window from right-to-left – you will select all objects that fall
completely inside the selection area and are touched by its boundary. This behavior is the
same as using the Edit » Select » Touching Rectangle command.
c) The green or Blue coloring is used to distinguish which mode of selection is being used
visually. Dragging left-to-right uses a blue rectangle while dragging right-to-left uses a
green rectangle.
27. Place two Cap100nF_50V_0603 capacitors from the WCT.IntLib library to the
Processor_Interface.SchDoc.
28. Save the schematic.

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5.4.3 CAN_Interface Schematic Component Placement:

Figure 64. CAN_Interface Schematic Placement.

29. Open the CAN_Interface.SchDoc.

30. Add the Altium Content Vault:
a) Sign in to AltiumLive by going to the License Management page and enter your
AltiumLive credentials as shown in Figure 65

Figure 65. Content Vault, flow for Sign In.

b) Select Setup System Preferences, in the upper right corner

i) Open the page Data Management - Server
ii) At the pane Servers control if the option Automatically connects Altium Content
Vault is active as shown in Figure 66.
iii) Close the preferences with OK.

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 Figure 66. DXP Preferences Data Management.

c) Make the CAN_Interface schematic the active document.

d) Click on the button Panels and open the Explorer panel.
e) Check if the Altium Content Vault is selected; if necessary refresh the information, as
shown in Figure 67.

Figure 67. Altium Content Vault with the Unified Components folder structure.

31. With the CAN_Interface schematic open search for MCP2515 by typing in the upper main
field of the Explorer panel and pressing Enter.
32. In the search results, right-click MCP2515-I/STRB4 and select Place (Figure 68).
33. Before clicking to place on the schematic, press Tab and change the reference designator to
UC1.

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 Figure 68. Altium Content Vault with searched and selected in preparation for placement.

34. Right-click once the component has been placed to return focus to the Explorer panel.
35. Search for MCP2551. Right-click and place MCP2551-I/SN to the right of UC1. During
placement, press TAB to set the reference designator to UC2.
36. Search in the Explorer panel for 21C000 (a 16MHz Crystal).
37. Place 21C00047-16.000MHz to the left of the MCP2551 component. Press TAB before
placing it and set the reference designator to X1.

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5.4.4 Relay_I/O Schematic Component Placement:

Figure 69. Relay_I/O Schematic Placement.

38. Open the Relay_I/O.SchDoc

39. Place the NTHD4508NT1 from WCT.IntLib
a) This is a multi-part component as indicated by the “” next to the component name in the
library, see Figure 70.

Figure 70. Multipart Symbol indicator.

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 b) Click the “” and expand the component to see that it has two parts. Select Part A.
c) Start placing. During placement, press TAB to change the designator to Q1 and place the
component, see Figure 71.
d) Placing Part A and remaining in placement mode will switch to Part B. Place that part
as well.

Figure 71. Multipart Symbol indicator.

40. Place U1 from the Explorer panel, selecting

a) Search for CD40109BPW.
b) Right-click and Place CMP-1527-00010-2.
41. Place the remaining components for the Relay_IO.SchDoc from the WCT.IntLib. Press
TAB to set the designators accordingly:
a) Res1K_0805 (2)
b) LED_Red0603 (2)
c) Diode 1N4148 (2)
d) Anderson-1Pin BLK_PCB_RHT (2)
e) Anderson-1Pin Red_PCB_RHT (2)

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5.5 Adding an Existing Schematic to Your Design
42. In Altium Designer, right-click the WCTopping.PrjPcb project in the Project panel and
select Add Existing to Project… (Figure 72).

Figure 72. Right-Click to Add Existing to Project.

43. In the Choose Documents to Add to Project dialog locate the schematic Power
Supply.SchDoc in the AD18 Essentials Exercises\Schematic Capture folder on
your desktop.
44. Click Open to add the file to your project.
45. Use the File » Save As command and browse to your WCTopping folder to save the
schematic with the same name at the location of the other project documents.
46. Save all documents using File » Save All.

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Exercise 6: Making the Connection

6.1 Purpose
In this exercise, you will complete the Processor_Interface CAN_Interface and
Digital_IO schematics by adding wires, net labels, power ports and ports to the design
for connecting the components.

6.2 Preparation
1. Close your current WCTopping.PrjPcB project.
2. Open the provided WCTopping.PrjPcb project from the “AD18 Essentials Exercises\
Making the Connection” folder.

6.3 Wiring the Schematic

6.3.1 Shortcuts
Place » Wire (shortcut P » W)
Place » Power Port (shortcut P » O)
Place » Port (shortcut P » R)
Place » Net Label (shortcut P » N)

6.3.2 Processor_Interface Schematic

6.3.2.1 Wire Connections
3. In your WCTopping.PrjPcb project, open Processor_Interface.SchDoc. It should
only contain 3 components without any connections. By the end of this section, this
schematic will be populated with wires, port, power port and net label connections as
shown in Figure 73.

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 Figure 73. Sample Processor_Interface wiring.

4. Connect Pin 1 and Pin 17 of the header (J4).

a) Use Place » Wire (shortcut P » W).
b) Move the cursor near the tip of the Pin 1 of J4. You will see a red cross appear, indicating
you are on the pin’s electrical hotspot (Figure 74).
c) Left-click when the hotspot is active to begin placing a wire segment.
d) Press Spacebar to flip the bending side of wire if needed.
e) A new segment will start with each left-click until another electrical hotspot is clicked on
(such as another pin) to complete the placement of this first wire.
5. During placement of a segment, right-click once to stop the current segment but remain in
placement mode.
6. Connect Pin 9, Pin 25 and Pin 39 using the method described in step 4.
7. Right-click twice (while there is no current wire being placed) to exit the command

Figure 74. Electrical Hotspot is active on a Pin.

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 Use Spacebar to change the angle of a wire corner during placement.
Use Shift+Spacebar to change the corner mode of a wire during placement.
Use Backspace to unwind an inadvertently placed segment during placement.
Use Right-click or Escape to end placement mode.

6.3.2.2 Smart Paste Wires

8. Place a wire stub on Pin 19 of the header.
9. Select the wire stub and copy it with Edit » Copy or CTRL+C.
10. Use Edit » Paste or CTRL+V to paste the wire stub on the remaining unconnected pins on
the left side of the connector.
11. Select Edit » Smart Paste to open the Smart Paste dialog
12. Smart Paste knows that a wire object has been copied. Copied objects are shown in the
left-most list box.
13. In this case, you will be pasting the Wires as Themselves so make sure Themselves is
selected in the Choose Paste Action list box.
14. Check the Enable Paste Array options. Create 20 rows of wires by setting Column to Count
1, the Rows to Count 20, with a row spacing of 100mil and pressing OK.
15. Place the 20 wire stubs attached to the pins of the header on the right side.

6.3.2.3 Power Ports

16. Use Place » Power Port or the Active Bar to place a power port.
17. Press Tab to access the properties as shown in Figure 75.

Figure 75. Changing Power Port Style.

18. Change the Net to GND and set the Style to Power Ground. Then, click OK.
19. Place two GND Power Ports below the header, using Figure 73 as a guide.
20. Using Figure 73 for reference: add wires from the GND Power Ports to your existing circuit.

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 21. Using Figure 73 for reference: repeat the above process to add, modify and connect the 3V3
and 5V Power Ports above the header. The power ports can be rotated by pressing
Spacebar while moving them.
22. Power ports may be placed directly on the pins of symbols. Place the GND and 3V3 Power
Ports directly on the capacitors in the upper right corner of the Process_Interface
schematic.
23. Using Figure 73 for reference: Draw the remaining wire. In the next steps, we describe how to
place Net Labels and Ports.

6.3.2.4 Net Labels

24. Right-click and select Place » Net Label or use the shortcuts P » N
25. With the place net label command active, press Tab to open the Properties panel, so that a
name can be entered.
26. Enter the name GPIO2, press Enter and place the net label on the wire leading to pin 3 of the
header.
27. Continue to place net labels as shown in Figure 73. Notice the numeric values automatically
incrementing.

6.3.2.5 Ports
28. Use the Place » Port command to place a port that will connect to another sheet in the
design.
29. Press the Tab key with the port active and change the name of the port to SDA1. Set the I/O
Type to Bidirectional as shown in Figure 76, and then click OK to dismiss the dialog.
30. Place the SDA1 Port near Pin 3 of the header. The port will require two left-clicks. The first
left-click defines the left side of the port, and the second left-click defines the right-side of the
port and its length.

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 Figure 76. Port Properties dialog.

31. Continue to place the ports as shown in Figure 73. SPI_MISO, INT1, INT2, and CAN_INT
should be set as Input for I/O Type, and the rest should be set as Output.

The negate overscores shown on ports CS and IOexpand_ CS can be

created by entering a backslash “\” character after the character to negate.

6.3.3 CAN_Interface Schematic

6.3.3.1 Net Labels
32. Open CAN_Interface.SchDoc from your Projects panel.
33. Place » Net Label and press Tab to set the name to CAN_RXD. Place the net label between
the two resistors attached to UC2-4 (Pin 4 of UC2).

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 Figure 77. CAN_RXD net label placement.

34. Place another instance of the CAN_RXD on the wire attached to UC1-2 to create a connection
without needing to place a wire.

Figure 78. CAN_RXD net label placement.

6.3.3.2 Smart Paste Ports

35. Select the SPI_SCLK, SPI_MOSI, and SPI_MOSIA net labels, choosing the first one then
holding Shift down to select the remaining.
36. Copy the net labels with CTRL+C.
37. Select the menu Edit » Smart Paste or use the shortcut keys CTRL+SHIFT+V.
38. Select Ports for the Paste As option
39. Making sure Enable Paste Array is not checked, that Sort Order is set to By Location,
Signal Names is set to Keep and Port Width is set to Set Width To Widest.
40. Press OK.
41. Place the ports on the SPI_SCLK, SPI_MOSI and SPI_MOSIA wires.
42. Ensure that the SPI_MOSIA Port is set to Output.

Figure 79. Finalized section of the CAN_Interface schematic.

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6.3.4 Digital_IO Schematic
6.3.4.1 Auto-Generated Wires
43. Open Digital_IO.SchDoc from your Projects panel.
44. Select the IOS1 header.
45. Drag the IOS1 header over to UI1 so that pins of the IOS1 header overlap Pins 21-28 of
UI1.

Figure 80. Overlapped UI1 and IOS1.

46. Drag the IOS1 away from Ul1 to create wire connections between the pins automatically.

If Always Drag is not enabled in Schematic Preferences, holding the CTRL key will be
required for automatically creating connections.

Figure 81. Auto-generated wires.

47. Repeat the above steps to generate wires for the IOS2 header so that it connects to Pins
GPB0-GPB7 of UI1.
48. Save the Processor_Interface, CAN_Interface, and Digital_IO schematics to
complete your work.

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Exercise 7: Schematic Updating

7.1 Purpose
In this exercise, we will perform modifications to multiple schematic objects such as
alignment, formatting and net color highlighting. These operations are what we refer to
as Global Editing. We will also look at schematic annotation of components in the
project preparation.

1. Close the current WCTopping.PrjPcb project.

2. Open the WCTopping.PrjPcb project from the AD18 Essentials
Exercises\Schematic Updating folder.

7.2 Align
7.2.1 Align Right
Alignment tools are used to ensure that objects are aligned with one another for document clarity.
3. Open the Processor_Interface.schdoc from the Project Panel.
4. Left-click and drag a rectangular selection from left to right around the ports on the left of the
schematic.
5. Go to Edit » Align » Align Right or use the Active Bar to align the ports using the rightmost
as a guide.
6. In the Projects panel, right-click on Source Documents and click on Open All to open all
project documents.

Use the Edit » Align » Align to Grid to align objects within inherited/imported designs
that were not captured on grid. This is to maintain proper connectivity between
electrical objects.

7.3 Formatting Net Labels

7.3.1 Selecting All Net Labels
In this section, we will modify all net labels in the project to ensure they have the same font, font
size, and color.
7. Open the Processor_Interface.SchDoc.
8. Right-click on one of the net labels such as GPIO2. In the right-click menu, click on Find
Similar Objects (also referred to as “FSO” for short). This will open the Find Similar Objects
window.
9. Set the query attributes, selection options and scoping option as defined in Figure 1.

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 Figure 1: Find Similar Object configuration to select all net labels throughout the project

10. Click OK. Notice that all the net labels in the schematic are selected.
11. Without clicking anywhere on the schematics, open Dig_IO.SchDoc. Notice that the net
labels in this schematic are selected as well. Return to Processor_Interface.SchDoc.

7.3.2 Apply Formatting to Net Labels

12. While the net labels remain selected, open the Properties panel if not already opened. On the
top right corner of the panel, click on the multi-document icon.
13. Change the text font to Verdana change the text size to 9.
14. Click on the color box within this panel and click on a dark green color. Then, click on I to
italicize the net labels. Please refer to Figure 2.

Figure 2: Net label formatting defined in Properties panel

15. The formatting defined in this panel will be applied on all the net labels selected in the project.
Hit Shift+C to clear the highlight and mask.

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7.4 Locking Components Designators
7.4.1 Selecting only 100nF 50V Capacitors
In the previous section, we selected all net labels by using a single query (Object Kind is Net
Label). In this section, we will use three queries to select components of a specific name.
16. Hit J then C to jump to a component. Type C5 and click OK.
17. Right click on C5 and click on Find Similar Objects.
18. In the Find Similar Objects window, set the three attribute queries as shown in Figure 3.

Figure 3: Three attribute queries to select only 100nF 50V Capacitors with unlocked designator.

19. Click OK. Notice that only 100nF 50V capacitors with unlocked designators are selected.
20. Without clicking anywhere on this schematic, open the Dig_IO.SchDoc. Similarly, only the
100nF 50V capacitors are selected and not the other components.

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 The total number of selected objects and the document count are displayed at the
bottom of the Properties panel. In this case, five components are selected, and their
common attributes are shown and can be modified through this Properties panel.

7.4.2 Lock the 100nF 50V Capacitors Designators

21. While the capacitors remain selected, open the Properties panel. On the top right corner of
the panel, click on the multi-document icon.
22. To lock the component designators, simply click on the padlock icon beside Designator in the
panel, as shown in Figure 4.

Figure 4: Lock the designators of the selected 100nF 50V capacitors

23. Note that once the component designators are locked, they will not be modified through either
the annotate schematics window or the Properties panel. They must be unlocked first by
clicking on the padlock icon again.
24. Hit Shift+C to clear the highlight and mask.

7.5 Net Color Highlighting

25. Open the Processor_Interface.SchDoc from the Projects Panel.
26. Select the color Red from View » Set Net Color » Red.

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 Figure 82. Set Net Colors menu.

27. Click on a wire connected to a 5V Power Port to highlight the entire net in red and then
right-click to exit command.

Figure 83. Processor_Interface.SchDoc with 5V net highlighted in red

28. Notice that power ports that are directly connected to a component will not have a red
highlight because there are no wires to highlight on. For example, the power port connected
to C5.

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 29. Drag the 5V power port away from C5 to create a wire between them. We will then see that
wire being highlighted in red, as shown in Figure 6.

Figure 6: Red highlight on wire connected to C5

30. All the wires connected to 5V in the other schematics such as in Dig_IO.SchDoc and
Power Supply.SchDoc are highlighted in red as well.

7.6 Schematic Annotation

31. Access the command Tools » Annotation » Annotate Schematics to open the Annotate
dialog. The window shown in Figure 7 will appear.

Figure 7: Annotate Dialog.

a) Set the Order of Processing using the pull-down menu. Set it to Across Then Down.
b) Click Reset All.
c) Click OK on the pop-up dialog that appears.
32. Notice that the capacitors which designators were locked earlier will not be reset, as shown in
the Proposed Change List. Next, while still in the Annotate window, perform the following:
a) Click the Update Changes List button
b) Click OK on the pop-up dialog that appears.

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 c) A preview of the proposed designator values displayed as shown in Figure 8

Figure 8: Proposed designator based on Annotate dialog settings.

d) These changes are only proposed so far. To commit this change to the design, press the
Accept Changes (Create ECO) button, and then Execute Changes within the resulting
Engineering Change Order. All undesignated parts should now have a unique designator.
e) Press the Close button to close the completed ECO, and then again press the Close
button to close the Annotate dialog.
33. View the schematics to confirm that they now have assigned designators. Right-click on the
project in Projects panel and click on close project. Click on Save All and click on OK.

If there are any “old” designators, they are referenced as a superscript in light gray next
to the newly named designators. Compiling will remove the superscript of the “old”
designators.

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Exercise 8: Schematic Graphics

8.1 Purpose
In this exercise you will add text and graphics to the schematics to provide
documentation and organization; you will also number schematic sheets and print them
using the Smart PDF Wizard.

8.2 Preparation
1. Close the current WCTopping.PrjPcb project.
2. Open the WCTopping.PrjPcb project from the AD18 Essentials
Exercises\Schematic Graphics folder.

8.3 CAN Interface Schematic

8.3.1 Text String
3. Open the CAN_Interface.SchDoc from the Projects panel.
4. Place a text string by selecting Place » Text String.
5. While in the middle of string placement, press the Tab key to enter the string’s properties.
6. Enter the text 3.3V Logic Levels, change the size of the font size to 16, as shown in
Figure 84, and press Enter to continue the text placement

Figure 84. Font dialog.

7. Place the string on top of UC2 as shown in Figure 2.

8. With the place string command still active place another text string.
9. Press Tab to enter the String’s properties.

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 10. Enter the text 5V Logic Levels.
11. Change the size of the font to 22.
12. Press the Enter to continue the text placement
13. Place the 5V Logic Levels string as shown in Figure 2.

Figure 85. Placing a text string.

14. Double-click on the 5V Logic Levels string to alter its properties after it has been placed.
15. In the Properties panel, at the pane Text Font Setting, decrease the size of the font size to 16
to match the other string.

8.3.2 Round Rectangle

16. Place a Round Rectangle by selecting Place » Drawing Tools » Round Rectangle or use
the Active Bar.
17. Left-click to place the top left corner of the round rectangle as shown in the following figure.
18. Move the mouse down and to the right.
19. Left-click again to place the lower right corner of the Round Rectangle.

Figure 86. Placing a Round Rectangle.

20. The round rectangle appears in front of the schematic objects. Select Edit » Move » Send to
Back as shown in Figure 87

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 Figure 87. Move » Send to Back menu.

21. With the Send to Back command active, left-click on the round rectangle with the crosshair
cursor to send it behind the other objects.
22. The result should look like as shown in Figure 88

Figure 88. Placing a Round Rectangle.

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 23. Using the same steps, place another Round Rectangle for the right part of the schematic.

Figure 89. Placing a second Round Rectangle.

24. With both round rectangles selected, open the Properties panel.
25. Select Smallest for the Border width.
26. Click on Fill Color field and set the fill color to light blue as shown in Figure 90.

Figure 90. Select light blue for Fill color

27. Click on Border Color field and set the border color to dark blue as shown in Figure 91.

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 Figure 91. select dark blue for border color.

28. Set the Corner Y radius to 200mil.

29. Set the Corner X radius to 200mil.
30. Press Enter to finalize the property changes.

Figure 92. CAN Interface with text and graphic placement.

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8.4 Number Schematic Sheets
32. Select Tools » Annotation » Number Schematic Sheets.

Figure 93. Sheet Annotation dialog.

33. Click Auto Sheet Number to assign numbers to the sheets in the order of the list you see in
the table

Figure 94. Sheet Annotation dialog with sheet numbering.

34. Select Processor_Interface.Schdoc.

35. Move Processor_Interface.Schdoc up to the top by pressing the Move Up button.
Only the order has changed. Left-click Auto Sheet Number to renumber everything.

Figure 95. Annotation dialog after Auto Sheet Numbering.

36. Click Update Sheet Count to fill in the SheetTotal column.

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 Figure 96. Annotation dialog after updating sheet count.

37. Click Auto Document Number drop-down as shown in Figure 97.

38. Add prefix DOC_.

Figure 97. Annotation dialog Auto Document Number options.

39. Click Auto Document Number.

Figure 98. Annotation dialog after updating Document Numbers.

40. Click OK to close the Sheet Numbering window and updating the schematic’s parameters
SheetNumber and SheetTotal.

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 Figure 99. Title block.

8.5 Smart PDF

41. Select File » Smart PDF to open the Smart PDF wizard.
42. Click Next to begin the wizard.
43. Select Current Project, enter the name of the output file and the location on where you want
to save the PDF.

Figure 100. Choose SmartPDF Export Target.

44. All project files will be selected by default on the next page. Press the Next button with all files
selected.
45. Click Next with the unchecked. The Bill of Materials (BOM)
generation is explored fully in a later exercise.
46. Leave the Additional PDF Settings options in the default settings.
47. Click Next to continue the wizard.

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 Figure 101. Smart PDF settings.

48. Because we have a flat design, structure settings are not relevant. Leave
unchecked and click next.
49. Ensure that is enabled and click Finish.
50. Review the pages of the PDF by expanding the different sections under the bookmarks tab.
51. Try selecting components, nets, and ports in the Bookmarks panel of the Smart PDF.

Figure 102. Smart PDF resulting output.

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Exercise 9: Compiling in Altium Designer

9.1 Purpose
In this exercise, you will learn about compiling the WCTopping PCB Project and
reviewing the reported messages after compiling.

Compiling is an important step that should not be overlooked. Running the compiler and
understanding the results of any warnings and errors is crucial to design integrity.

9.2 Preparation
1. Close your WCTopping PCB Project.
2. Open the WCTopping project from the AD18 Essentials Exercises\Compiling in
Altium Designer folder.

9.3 Project Options

Before compiling the project, you should first check the Error Reporting settings to be sure they
are defined properly for what you are designing.

9.3.1 Error Reporting Tab

3. Access the command Project » Project Options to open the Options for Project dialog box
as shown in Figure 103. Click on the Error Reporting tab.

Figure 103. Project Options Error Reporting Tab.

4. Scroll down to view the different categories of violation checks that the compiler performs.
5. Left-click on of the Report Mode icons and change to a different value. Left-click on the
Violation Type Description column entry and then holding Shift down to select multiple

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 entries. Then using the right mouse button, change the Report Mode of all selected to a
different value
6. Click on Set to Installation Defaults button in the bottom left corner to reset, confirm the
reset with YES.

9.3.2 Connection Matrix Tab

7. Click the Connection Matrix tab. You can set the reporting mode for the connections
between the different pin, port, and sheet entry types. Left-click on some of the boxes to
change the level of reporting.

Figure 104. Connection Matrix.

8. Click the Set to Installation Defaults button in the bottom left corner to reset the Connection
Matrix settings, confirm the reset with YES.

A good and often used modification for the default ERC matric setting is to set the
unconnected information to waring, to report all open Pins, Ports, and Entries

9.3.3 Options Tab

9. Open the Options tab as shown in Figure 105.

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 Figure 105. Options tab showing Netlist Options.

10. In the bottom left corner of this dialog, ensure that the Netlist Options checkboxes are all
disabled. These choices modify the net names based on your selection of checkboxes.

If you do not disable the features, the sheet entry generates different nets from both
schematic pages that would result in warning violations stating that there are multiple
net names even if the net labels are the same.

11. Click OK to accept the changes and dismiss the Project Options dialog.

9.4 Running the Compiler

12. Compile the WCTopping design using the menu Project » Compile PCB Project
WCTopping.PrjPcb or by right-clicking on the project in the Project Panel and selecting
Compile PCB Project WCTopping.PrjPcb.
13. After you compile, the Messages Panel will appear. If no window appears, the project has
either passed the Error Rule Check (ERC), or there are only Warnings and no Errors or
Fatal Errors.

If you cannot find Messages Panel, click the Panels panel button in the bottom right
corner and select Messages from the popup menu.

9.4.1 Correcting Errors and Warnings

14. Upon compilation, you should see many Errors and Warnings in the Messages Panel.
Double-clicking a warning or error message in the Messages Panel will navigate to the
location where the warning or error occurs. It will display the affected elements in the Details
section of the Messages Panel.
15. Sort the listings in the Message Panel to group the Warnings and Errors by clicking the Class
column header until the Errors are brought to the top of the list.
16. You should see seven “Net has only one pin” Errors in the Messages Panel as shown
in Figure 106.

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 17. Locate the pins associated with the first three “Net <GPIO##> has only one pin (Pin
J4-##)” by double-clicking on the Error and selecting each pin from the Compile Errors
panel to highlight them in the schematic.

Figure 106. Net <name> only has one pin Error in Messages Panel.

18. For suppressing warning and errors, assign a No ERC directive as follows:
a) Right-click on the first of the “Net <GPIO##> has only one pin (Pin J4-##)” error.
b) Select Place Specific No ERC for this Violation… from the menu as shown in Figure
107.

Figure 107. Place No ERC Directive directly from the Messages panel.

c) Place the directive to the end of the wire for that pin.
d) Continue to add Specific No ERC directives to the
2nd & 3rd warnings as shown in Figure 108.

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 Figure 108. Placed No ERC directives.

19. Compile the project once more using Project » Compile PCB Project WCTopping.PrjPcb.
a) Verify the list of messages no longer reports the “Net <GPIO##> has only one pin
(Pin J4-##)” errors.
20. For the remaining errors in the Messages Panel, the “Net RELAY1 contains floating
input pins (Pin U1-#)” error is resulting from a particular bus that either is mislabeled or
has no label at all.
a) Double-click the
“Net RELAY1 contains floating input pins Error (Pin U1-3)”
in the Messages Panel to zoom the associated net label on Relay_IO.SchDoc.
b) Zoom out to see that the RELAY1 wire is connected to a bus that does not have a
required net label.
c) Label the bus by executing Place » Net Label
Hover the net label on your cursor over the RELAY[1..2] port and press the Insert key.
This will cause the net label name to inherit the value RELAY[1..2]
d) Place the net label on the bus as shown in Figure 109.

Figure 109. Bus labeled with the needed Net label.

21. Re-run the compiler and notice that there are still some warnings in the Messages Panel in
regards to Multiple Input Ports.
22. Access the Project Options using the Project » Project Options file menu.
23. In the Connection Matrix tab:

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 a) Locate the Input Port to Input Port square and click it until it turns green (No Report).

Figure 110. Bus labeled with the needed Net label.

b) Click the OK button to exit the dialog.

24. Run the compiler again. The Multiple Input Ports warnings are now not listed anymore in the
Messages Panel.
25. Continuing on the remaining warnings NetWire <GPIO##> has multiple names warnings.
This violation occurs when a net in the design has been detected to have multiple names
associated with it.
a) Double-click the
“Nets Wire <GPIO##> have multiple names (Net Label …)”
in the Messages Panel to zoom the associated Net Label / Port on
Processor_Interface.SchDoc.
b) Check the affected elements in the Details section of the Messages Panel.
c) Verify that the connection is correct, that not by accident a short circuit was created.
d) Right-click on the first of the “Nets Wire <GPIO##> having multiple names (Net
Label …” warning.
e) Select Place Specific No ERC for this Violation… from the menu and place the no
ERC directive on the wire.
f) Repeat the steps a) to e) for the remaining warnings.
26. The next group of warnings Net <Net ##> has no driving source occurs when an input
of an IC is connected to a passive component. Open the Project Options using the Project »
Project Options file menu.

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 Figure 111. Input of an IC with no driving source.

a) In the Error Reporting tab find the Violations Associated with Nets section
b) Locate the Nets with no driving source error listings.
c) Set this to No Report in the Report Mode column.
d) Press the OK button to exit the dialog.
27. Re-Run the compiler to verify there are no more Nets with no driving source Warnings.
28. To resolve the last warnings finally open the Project Options using the Project » Project
Options file menu.
a) In the Connection Matrix tab; locate the IO Pin to Output Port square and click the square
until it is green.
b) Click the OK button to exit the dialog.
29. Re-run the compiler to verify there is no more an IO Pin to Output Port Warning. There should
not be any Errors or Warnings, indicating a clean compile.

Figure 112. Messages panel with all warnings corrected.

30. Save your work with File » Save All.

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Exercise 10: Adding Hierarchy

10.1 Purpose
In this exercise, the basics of hierarchical design will be explored.

The top-level schematic will be completed by populating it with sheet symbols corresponding to
each of the lower level schematics and creating lower level schematic sheets from newly created
sheet symbols.

10.2 Preparation
1. Close the current WCTopping.PrjPcb project.
2. Open the WCTopping.PrjPcb project located in the
AD18 Essentials Exercises\Adding Hierarchy folder.

10.3 Create Top-Level Schematic

3. Right-Click on WCTopping.PrjPcb in Project Panel and select Add New to Project »
Schematic
4. Save the new schematic using File » Save
Name the file Top_Level.SchDoc when prompted.

10.4 Sheet Symbols

Adding sheet symbols on the Top Level Schematic establishes the hierarchical order. The next
steps cover two methods of creating sheet symbols.

10.4.1 Creating a Sheet Symbol from Scratch

5. From the Place menu, select Place » Sheet Symbol.
a) With the sheet symbol on your cursor, press Tab to open the Properties Panel as shown
in Figure 113.
b) Set the Designator property to MID1.
c) Set Filename to Processor_Power.
d) Press Enter to continue the placement of the sheet symbol.

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 Figure 113. Sheet Symbol properties dialog.

6. Position the Sheet Symbol with two left-clicks:

a) Click once to define the upper left corner of the sheet symbol.
b) Click a second time to define the lower right corner.
c) Right-click to exit the command.

10.4.2 Adding Sheet Entries

10.4.2.1 Use the Smart Paste to convert ports to sheet entries:
7. Open the Processor_Interface.SchDoc from the Projects Panel.
8. Group select the ports in the Processor_Interface.SchDoc
a) Open the Properties Panel
b) At the pane Selection Filter, deactivate the selection filter for All objects and activate
only the Ports, as shown in Figure 114
c) Select the Ports with the command Edit » Select » Inside Area

d) Right-click the selection and select Copy.

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 The selection filter is a document related configuration. Keep in mind to activate the
All objects definition after you finished your current task.

Figure 114. Selection Filter.

9. Change focus back to the Top_Level.SchDoc by clicking on its document tab.

10. Run Edit » Smart Paste
a) Select Sheet Entries in the pane Choose Paste Action, Paste As list box as shown in
Figure 115.
b) Press the OK button

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 Figure 115. Smart Paste Dialog.

11. Click on the MID1 sheet symbol and place the sheet entries on the right side of the sheet
symbol.
12. Position the sheet entries and adjust the size of the sheet symbol using Figure 116 as a
guide.
a) Setting the grid to 100mil will help with placement, press G to change the grid
b) Change the value of Snap Distance if needed, (Properties Panel)

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 Figure 116. Sheet Symbol and Sheet Entry Placement.

10.4.3 Creating a Sheet Symbol from Existing Sheet

13. Right-click on the schematic sheet and select Sheet Actions » Create Sheet Symbol from
Sheet.
14. Select the IO Logic Block.SchDoc from the Choose Document to Place dialog and select
OK.

Figure 117. Choose Document to Place dialog.

15. With the Sheet Symbol still attached to your cursor, press Tab to bring up its properties
16. Enter MID2 in the Designator properties and press Enter.
17. Place the Sheet Symbol to the right of the MID1 Sheet Symbol and align the Sheet Entries
adjacent to the sheet entries in Sheet Symbol MID1 to reflect the following Figure 118

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 Activate the large 90° cursor (Preferences, section Schematic – Graphical Editing ).
With active Large Curser 90, it is easier to position the entries.

Figure 118. Sheet Symbol Alignment.

10.5 Connecting the Sheet Symbols

Now that the sheet symbols have been placed, you will wire the connections between the two
sheet symbols

10.5.1 Wiring the Sheet Symbols

18. Move the Processor_Power sheet symbol directly in contact with the IO Logic Block
sheet symbol so that the sheet entries line up.
19. Drag the Processor_Power sheet symbol back to its original position. Wires should appear
connecting the two blocks (this is dependent on your preferences; you may need to try again
while holding down the Ctrl key).

10.5.2 Wiring the Relay Bus

20. From the menu, select Place » Bus.
a) Start the Bus at the RELAY[1..2] sheet entry in the MID2 sheet symbol and extend half
way to the MID1 sheet symbol.
b) Proceed downwards so that there is a sufficient amount of bus wire available for wires to
extend from the RELAY1 and RELAY2 sheet entries of the MID1 sheet symbol and
left-click.
c) Right-click twice to exit the command.
21. Wire the RELAY1 and RELAY2 sheet entries of the MID1 sheet symbol to the bus using Place
» Wire, as shown in Figure 119.

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 Figure 119. Wired Sheet Symbols.

10.5.3 Labeling the Bus and Bus Slices

22. Label the Bus and Bus Slices using the Place » Net Label command
a) With the net label attached to your cursor, hover over the RELAY[1..2] sheet entry and
press Insert. The new net label inherits the RELAY[1..2] name. Alternatively, press
Tab and manually change the value.
b) Left-click to place the RELAY[1..2] net label on the Bus.
c) With a net label attached to your cursor, hover your cursor over the RELAY1 Sheet Entry
in the MID1 Sheet Symbol.
d) Press Insert so that the net label picks up the RELAY1 Sheet Entry name.
e) Left-click to place the net label on the extended wire from the RELAY1 sheet entry.
(After placing the net label, the net label on the cursor automatically increments to
RELAY2).
f) Left-click to place the RELAY2 net label on the wire extending from the RELAY2 Sheet
Entry as shown in Figure 120.
g) Right-click to exit the command.

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 Figure 120. Net Labeled Bus and Bus Slices.

10.6 Creating a Schematic Sheet from Sheet Symbol

The MID1 Processor_Power Sheet Symbol is not referencing an existing schematic sheet. In this
exercise, you will create the Processor_Power Schematic Sheet from the existing Sheet
Symbol.

10.6.1 Create Sheet from Sheet Symbol

23. Right-click on the MID1 Processor_Power sheet symbol in the Top_Level.SchDoc and
execute the Sheet Symbol Actions » Create Sheet From Sheet Symbol command.

10.6.2 Completing the Newly Created Schematic Sheet

24. In the newly created Processor_Power.SchDoc you will see ports that reflect the sheet
entries of the created MID1 sheet symbol in the Top_Level schematic.
a) Group-select the ports by dragging a selection box around them.
b) Once selected, move them off to the left of the schematic sheet. The ports will still be
selected after the move.
25. With the ports selected, open the Properties Panel.
a) Change the width to 700mil
b) Press Enter to accept the new value
c) Click on the schematic to clear the selection.
26. Still in the Processor_Power.schdoc create a new sheet symbol from a schematic by
selecting the menu command, Design » Create Sheet Symbol From Sheet.

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 a) Select the Processor_Interface.SchDoc from the list in the Choose Document to
Place dialog.
b) Click OK and place the sheet symbol into the center of the schematic sheet.
27. Create a second sheet symbol.
a) Right-click an empty space in the schematic and select Sheet Actions » Create Sheet
Symbol From Sheet.
b) Select the Power Supply.SchDoc from the list in the Choose Document to Place dialog.
c) Click OK and place the sheet symbol into the lower right of the schematic sheet.
28. Arrange and position the sheet entries of the Processor_Interface.SchDoc sheet
symbol as shown in Figure 121
(You may need to toggle your grid settings using the G key until you are set to correct grid.

Figure 121. Sheet Entry Position.

29. Place wire connections from the sheet entries of the Processor_Interface.SchDoc
sheet symbol to the corresponding ports.
a) Move the port so that it makes direct contact with the corresponding sheet entry.
b) Drag the port away from the sheet to the desired location. Dragging to create wires can
be done simultaneously with multiple ports. First, move all of the ports to be in direct
contact with the sheet entries. Then group select the ports and drag.

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 Figure 122. Sheet Symbol wired to ports.

30. Right-click on the project in the Projects Panel and select Compile PCB Project
WCTopping.PrjPcb.
31. After compiling the project, the resulting hierarchical structure is visible in the Projects Panel,
Figure 123.

Figure 123. Hierarchical Design Project Structure.

32. Select File » Save All.

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Exercise 11: Transfer to PCB

11.1 Purpose
In this exercise, you will be introduced to transferring the design from schematic to
PCB. An additional part of this exercise is the placement, configuration, and transfer
of directives from the schematic to the PCB.

Using a comparison engine, Altium Designer creates an Engineering Change Order (ECO). This
is used to synchronize the schematic to PCB, as well as update the relevant changes from the
PCB back to the schematic. This bi-directional synchronization guarantees a high level of design
integrity and helps to ensure the PCB and schematics remain synchronized. If any items fail
during ECO Execution, locate and correct the errors to complete the transfer.

11.2 Preparation
1. Close any open WCTopping.PrjPcb projects.
2. Open the WCTopping.PrjPcb project located in the
AD18 Essentials Exercises\Transfer to PCB folder.

11.3 Before the Transfer

11.3.1 Footprint Validation
3. Right-click Source Documents in the Projects Panel and select Open All.
4. Select the Tools » Footprint Manager file menu.
5. Select all the components from the Component List with a right-click and Select All, or use
CTRL+A. All of the footprints used in the selected components are listed in the View and Edit
Footprints list to the right side of the dialog.
6. Select all the footprints in the View and Edit Footprints list.
7. Click the Validate button below the View and Edit Footprints list.
8. After the Validation process is finished, review the Found In column for a listing of
Footprints Not Found. Review the PCB Library column of Footprints Not Found to
see the needed libraries.
If you had not installed the WCT.IntLib library you would have seen Footprints Not
Found reported for the components used out of it as you can see in Figure 124. In that case,
it will need to be installed in the Libraries Panel.

A connection to the Altium Content Vault is needed to find footprints of parts placed
from the Altium Content Vault.

9. Close the Footprint Manager.

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 Figure 124. Footprint Manager after footprint validation.

To connect and access the Altium Content Vault, signing in to Altium Designer using an
AltiumLive account is required.

11.3.1.1 Connect to the Content Vault

a) Open the license management page in the upper right corner, as shown in Figure 125

Figure 125 Access the License Management.

b) Sign in to Altium Live with your Altium Live account.

c) Open the Setup System Preferences, in the upper right corner
d) Change to the section Data Management - Servers. Expand the Known Server section
if necessary.
e) Tick the Automatically connect Altium Content Vault checkbox, control that the Altium
Content Vault is connected and then click the OK button to exit the dialog.

Figure 126 Content Vault Connection.

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 10. Now install the WCT.IntLib library:
a) Open the Libraries panel with View » Panels » Libraries.
b) Select the Libraries button at the top of the panel.
c) Select the Installed tab.
d) Click the Install button and select Install from file… .
e) Browse to the AD18 Essentials Exercises\Transfer to PCB directory.
f) Select the WCT.IntLib file and click the Open button in the lower right corner.
g) Once added, close the Available Libraries dialog.
11. Reopen the Footprint Manager and validate that all of the footprints can be found. Now they
should all be able to be found with a connection the Altium Content Vault and the
WCT.IntLib installed in the Libraries Panel

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11.4 Transferring the Design
11.4.1 The Initial Transfer
12. Right-click the project name in the Projects Panel and select Add New to Project » PCB.
13. Save the PCB and name it WCTopping.PcbDoc
14. From within a schematic, click on Design » Update PCB Document WCTopping.PcbDoc.
15. Click the Execute Changes button in the lower left of the dialog.

Figure 127. Engineering Change Order dialog.

16. Enable the Only Show Errors checkbox to check for any errors.
17. Close the Engineering Change Order dialog.

11.4.2 Cross Select Mode

18. Right-click on the WCTopping.PcbDoc tab at the top of the workspace and select Split
Vertical.
19. Select the Relay_IO.SchDoc tab at the top of the workspace so that you have that
particular schematic in view along with the PCB on the other side.

Figure 128. Split Vertical view with selected components in Cross Select mode.

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 20. Check to see if cross selection mode is enabled by clicking on Tools drop-down menu and
check that the Cross Select Mode option is highlighted, indicating it is enabled.

Figure 129 Active Cross Select Mode

21. Group-select the following components within the Relay_IO.SchDoc in the following order
by holding down the Shift key and selecting components: RL1, D1, Q1B, DI1, RLY1, RLY2.
a) Click the WCTopping.PcbDoc tab at the top of your workspace and select Tools »
Component Placement » Reposition Selected Components.
b) Click in the PCB workspace to place the component on your cursor. With each
subsequent click, the next component will snap onto your cursor based on the order
selected in the schematic.
22. Right-click on the WCTopping.PcbDoc tab at the top of the workspace and select Merge All
to condense the tiling.

11.4.3 Assigning Directives

23. Select the Processor_Interface.SchDoc tab at the top of the workspace to get that
schematic in view.
24. Replace the net label GPIO2 and the GPIO3 net labels with CLK_P and CLK_N
25. Execute Place » Directives » Differential Pair or use the Active Bar and press Tab to open
the Properties Panel.

Figure 130 Adding a directive from the Active Bar.

a) Check the Property Label; the value is DIFFPAIR

b) Click on the pause symbol in the center of the Schematic to continue the placement.
c) Place this directive on the CLK_P and CLK_N wires as shown in Figure 131.
d) Right-click to exit the command.
26. Select Place » Directives » Parameter set.
a) With the directive on your cursor, press the Tab key.
b) Change, if needed, the label for the parameter set to PCB Rule
c) Click the Add button in the Properties Panel, pane Rules.
d) Select the Width Constraint rule from within the Routing section.
e) Press the OK button
f) In the upper section set:
i) Min Width to 30mil
ii) Preferred Width to 50mil
iii) Max Width to 100mil.
iv) Press the OK button and the Pause symbol to continue the placement of the PCB
Layout Directive.
g) Place the PCB Layout Directive on both the 3V3 and 5V wires extending from the top of
the J4 component as shown in Figure 6.
h) Right-click to exit the command.

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 Figure 131. Directives placed in the schematic.

27. Select Design » Update PCB Document WCTopping.PcbDoc from the file menu.
a) The Design Rules are listed in the Engineering Change Order.
b) Click Execute Changes.
c) Close the Engineering Change Order.
28. Check in the PCB panel to see that the differential pair directive is transferred to the
PCB.

Figure 132. The Differential Pair Editor in the PCB panel.

29. Open the PCB Design Rules and Constraints Editor with Design » Rules and check to
see that the PCB Rule directive is transferred to the PCB.

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 Figure 133. The PCB Rules and Constraints Editor.

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Exercise 12: Updating the PCB

12.1 Purpose
In this exercise, you will learn about component links and how it is used to synchronize
the schematics to the PCB document within a project structure.

In order to synchronize schematic documents to a PCB document within a project, each component
contains a unique identifier which is used to link them together. If no link is defined or if the link is
broken, the synchronization will fall back to the Component Designator. If both information are not
available the synchronization between the documents will be removed, and the ECO generation will
not initialize.

12.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\Updating the PCB folder.

12.3 Component Links

2. Open the WCTopping.PrjPcb project in Altium Designer.
3. Open and focus on WCTopping.PcbDoc. Notice all components placed outside of the board
towards the right.
4. Go to Design » Import Changes from WCTopping.PrjPcb. Notice that there are
unmatched components seen in Figure 134. This can be easily resolved by clicking
Automatically Create Component Links. However, this exercise will detail how it can be
done manually. Click Cancel and then close the Engineering Change Order window that pops
up.

Figure 134. Component Links Failure.

5. Go to Project » Component Links.

6. Notice the unmatched components in the first two columns of Figure 135. Ensure that the
Designator checkbox is ticked, then click Add Pairs Matched By ».

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 Figure 135 Component Link Setup.

7. Click Perform Update. Notice the Information window as shown in Figure 136 indicating that
59 links have been modified. Click OK.

Figure 136. Information Window Confirming Component Link Modifications.

8. The project’s ECO will no longer show any unlinked components. Save and close all project
documents.

It is highly recommended to recompile the project to register the modifications made to

the Component Links to ensure full synchronization between the schematic documents
and the PCB documents.

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Exercise 13: PCB Introduction

13.1 Purpose
In this exercise, you will explore some of the PCB specific preference settings and
learn to customize them.

13.2 Preparation
1. Open the PCB project using File » Open Project and browse to your installed example
projects folder. Select:
Examples\Bluetooth Sentinel\Bluetooth_Sentinel.PrjPcb.
Since this project had been opened previously, it can also access using File » Recent
Projects.

The default path to your installed examples is C:\Users\Public\Public

Documents\Altium\<AD Version>\Examples\

13.3 Moving PCB View

2. Navigate to the Projects panel and double-click the icon for the PCB file
Bluetooth_Sentinel.PcbDoc with the left mouse button so that the PCB document is
open.
3. In the workspace, right-click and hold until the dragging hand cursor appears. Move your
mouse while holding the right mouse button to drag the PCB around. Release the right button
to end the drag operation.
4. Scroll the mouse wheel to scroll the PCB vertically.
5. Hold Shift while scrolling the mouse wheel to scroll horizontally.
6. Hold Ctrl while scrolling the mouse to zoom in and out.
7. Press and hold both right and left mouse buttons simultaneously to zoom in and out.
8. Press and hold the mouse wheel down to zoom in and out.

13.4 View Commands

9. Maintain the focus on the PCB Workspace and observe the behavior of the following shortcut
keys:
a) To View » Fit Board or press the V » F keys in succession
b) To View » Fit Document or press the V » D keys in succession
c) To View » Zoom In or press the V » I keys in succession or press Page Up
d) To View » Zoom Out or press the V » O keys in succession or press Page Down
e) To View » Area or press the V » A and draw a rectangle with the Mouse
f) To View » Zoom Point or press the V » P keys in succession, then draw a center
focused rectangle with the mouse in PCB view. The contents of the rectangle will be
focused and shown with the zoom level adjusted.
g) Be sure to try more view commands to become more comfortable with your graphical
navigation options within Altium Designer PCB.

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13.5 General
10. Click Setup System Preferences, in the upper right corner, to open the preferences.
Open the PCB Editor branch and look in the General page as shown in Figure 137.

Figure 137. General settings for the PCB editor.

11. Verify that Online DRC is enabled. Click OK to close the preferences dialog.
12. Zoom to the left side of the PCB and select on component R13 as shown in Figure 138.

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 Figure 138. R13 from the Bluetooth_Sentinel.PcbDoc.

Quickly find the component using the command:

Edit » Jump » Component (J»C).

13. Left-click and hold component R13.

a) Drag and drop R13 so it overlaps with component R16.
b) Notice that the overlapping components highlight in green with error markers.
14. Undo the changes by selecting Edit » Undo.
15. Go back to the Preferences: Click in the upper right corner.
a) Enable the option Display popup selection dialog
b) Press OK to exit Preferences
16. Left-click component X2. A selection window should appear as shown in Figure 139.
Select X2 from the list.

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 Figure 139. Selection window.

17. Press Shift+C to clear the selection.

18. Open the Properties panel using View » Panels » Properties or from the Panels menu
accessed from the Panels button in the lower right of the workspace
19. Expand the section Selection Filter
20. Activate the selection filter for Components and deactivate it for all other elements as shown
at Figure 140

Figure 140. Selection filter for component.

21. Left-click component R13 and select it in the pop up selection dialog.
22. Move the resistor to the left; notice a violation with the surrounding polygon.
23. Repour the Polygon with the command Tools » Polygon Pours » Repour Violating
Polygons or by a right-clicking over the polygon and execute Polygon Actions » Repour
violating polygons….
24. Reopen the Preferences.
a) Under General, enable Repour Polygons After Modification and Repour all
dependent polygons after editing

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 b) Click OK to close the preferences.
25. Left-click and move component R15 to the right. Release the component to see the polygon
automatically repour.
26. Undo changes with Edit » Undo.
27. Shift+C to clear the selection of R15
28. Open the Properties panel and the selection filter.
29. Click on All objects to allow the selection of all kinds of objects again.

13.6 Board Insight Display

30. Open the Preferences, section PCB Editor:
a) Select the Board Insight Display page.
b) Enable all options under Available Single Layer Modes if not enabled already and press
OK.
31. Activate a PCB document and toggle through the single layer modes by pressing Shift + S.
Notice the differences between the modes as indicated in Figure 141, Figure 142, Figure 143
and Figure 144.

Figure 141. Regular 2D view.

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 Figure 142. Single Layer Mode - Hide Other Layers.

Figure 143. Single Layer Mode - Gray Scale Other Layers.

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 Figure 144. Single Layer Mode - Monochrome Other Layers.

32. Return to the non-single layer mode using Shift+S.

13.7 Display
1. Open the Preferences dialog and select the Display page, from the branch PCB.
2. Under the Highlighting Options section:
a) Enable all of the options
b) Press OK to exit the Preferences dialog
3. Jump to component C21 using the shortcut J»C and entering C21 into Component
Designator dialog.
4. If not already the active layer, change to Top Layer as the active layer by selecting it
from the Layer Tabs at the bottom of the Workspace.
5. Enter Single Layer Mode by pressing Shift+S, except the active layer (Top Layer) all other
visible layers are now gray.
6. Mask net VBAT by selecting the via above the component U4 (close to Pin 19) using the
command Ctrl + left-click. Notice that tracks connected to that via are now masked as well
as shown in Figure 145. Do Not Clear the highlight.

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 Figure 145. Highlighting all primitives.

7. Press Shift+S again, except the active layer all other layers are now invisible.
8. Open Preferences - page Display
a) Disable Show All Primitives in Highlighted Nets.
b) Click OK to confirm. Notice that tracks on the Bottom Layer are no longer masked.
9. Clear selection by pressing Shift + C.
10. Exit single layer by executing Shift + S twice until all layers are in the regular color.
11. Jump to component U4 using the shortcut J»C
12. Place a Route from Pad U4-28 (Located in the upper left corner of the component) by
selecting Route » Interactive Routing.
a) Place the crosshair on Pad U4-28 and select it. Notice that the pad and existing routing
is now highlighted and the rest of the board is masked.
b) Right-click twice to exit the routing mode.
13. Open the Preferences dialog- page Display
a) Disable Apply Mask During Interactive Editing.
b) Click OK to return to the PCB.
14. Reroute Pad U4-28 to see that the rest of the board is no longer masked.
15. Return to the Preferences:
a) Disable Apply Highlight During Interactive Editing.
b) Click OK.
16. In the PCB, the pad should no longer be highlighted.
17. Press Shift+C to clear the board.

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13.8 Board Insight Mode
18. Open the Preferences, section PCB Editor:
a) Select the Board Insight Modes page.
b) Ensure the Display Heads Up Information is active.
c) Press OK.
19. Hover over component U4 to see the Heads Up Display as shown in the top right of Figure
146.

Figure 146. Heads up display.

The Heads-Up Display can be disabled by pressing Shift + H

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13.9 DRC Violations Display
20. Jump to component R13 using J»C and drag the component to overlap component R16. It
should now have (x) violation overlays on the two components. Additional to the
Altium shows detail objects to show, e.g. short circuits .
21. Open the Preferences:
a) Select the section DRC Violations Display.
b) Change the Violation Overlay Style from Style B to Style A and press OK.
c) Notice the violations have now changed to (!) violation markers, Shown in Figure 147.
d) Repeat steps and try other Violation Overlay Styles.

Figure 147. Violation display markers.

22. For individual DRC violations the section Choose DRC Violations Display Style allows you to
configure the Violation Detail and Violation Overlay information (Figure 148).
a) Access the DRC Violations Display in the preferences and deactivate the details
information for the Short Circuit rule.
b) Press OK
c) Notice the violations detail for Short Circuit are now removed.

Figure 148. Configuration for DRC Detail and Overlay.

23. Undo the violation by selecting Edit » Undo.

24. Shift+C to clear the selection of R13

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13.10 Interactive Routing
To shelf the Polygons with Tools » Polygon Pours » Shelve… could make it easier to
see the routing.

25. Try different Interactive Routing modes:

a) Open the Preferences and select the Interactive Routing page.
i) In the Routing Conflict Resolution options, set Current Mode to Ignore Obstacles.
ii) Press OK.
b) Zoom to Pad U4-28 and activate the route by selecting Route » Interactive Routing.
c) Place crosshair over Pad U4-28 and route from the pad to the net JTDI. Notice that the
track can go past the JTDI, creating a violation due to the Ignore Obstacles option.
d) Right-click twice to exit the routing mode. Undo any tracks that you may have made.
e) Repeat to experiment with other Routing Conflict Resolution modes.

Quickly toggle through the routing modes while actively routing using Shift + R. The
Heads up display and Status bar will show the active routing conflict resolution mode.

26. Place a Route from Pad U4-28:

a) Press Shift+Space to toggle through routing angles. Notice that there are options to
route at Any Angle and Arcs. (This is indicated at the bottom of the workspace in the
Status Bar)
b) Right-click twice to exit routing mode.
c) Reopen the PCB Editor Preferences menu to enable Restrict to 90/45.
d) Repeat the steps to toggle through different routing angles to see the restriction.
27. Clear the selection using Shift+C.
28. Open the Preferences branch Interactive Routing.
a) Enable Display Clearance Boundaries and select OK to confirm.
b) Route from Pad U4-28 to see an outline around objects on the board as shown in Figure
149.

The clearance boundaries will not show if you have Ignore Obstacles as the active
routing conflict mode. Press Tab while routing to access the routing preferences.

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 Figure 149. Clearance boundaries.

Reduce this outline by enabled Reduce Clearance Display Area in Preferences

29. Explore Routing Gloss Effort options by routing on the board.

a) Try dragging some of the vias outside U4, e.g. Via close to U4-32 and note the attached
track behavior, avoiding the GND net vias.
b) Open the Preferences, Page Interactive Routing pane Routing Gloss Effort and change
the routing Gloss Effort from Weak to Strong.

If you finished the exercise and are looking for another position to do some test routing
you can activate Mid-Layer 2 and reroute the signal Wake.

30. Close the project without saving.

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Exercise 14: PCB Navigation

14.1 Purpose
In this exercise, users will gain a better understanding of the PCB Editor interface and
learn about basic navigation and viewing tools.

This exercise is to users familiar with the PCB workspace. Do not save the project or design
documents.

14.2 Preparation
1. If not already open use File » Open Project and browse to your installed example projects
folder. Select: Examples\Bluetooth Sentinel\Bluetooth_Sentinel.PrjPcb.
Since this project had been opened previously, it can also access using File » Recent
Projects.

The default path to your installed examples is C:\Users\Public\Public

Documents\Altium\<AD Version>\Examples\

2. Navigate to the Projects panel and double-click the icon for the PCB file
Bluetooth_Sentinel.PcbDoc with the left mouse button so that the PCB document is
open.

14.3 View Commands

3. Maintain the focus on the PCB Workspace and observe the behavior of the following shortcut
keys:
a) To View » Fit Board or press the V » F keys in succession
b) To View » Fit Document or press the V » D keys in succession
c) To View » Zoom In or press the V » I keys in succession or press Page Up
d) To View » Zoom Out or press the V » O keys in succession or press Page Down
e) To View » Area or press the V » A and draw a rectangle with the Mouse
f) To View » Zoom Point or press the V » P keys in succession, then draw a center
focused rectangle with the mouse in PCB view. The contents of the rectangle will be
focused and shown with the zoom level adjusted.
g) Be sure to try more view commands to become more comfortable with your graphical
navigation options within Altium Designer PCB.

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14.4 Jump Command
The Edit » Jump command is commonly used so the status of this sub-menu has been elevated to a
popup menu with its hotkey J.
4. To jump to the current origin: press the J - O keys in succession.
5. To jump to a specific location: press the J - L keys in succession, then enter the X, Y
coordinates within the Jump to Location dialog, Figure 150.

Figure 150. Jump to location

6. To Jump » Component.. press the J - C keys in succession. Enter U1 into the resulting
Component Designator dialog. (Figure 151)

Figure 151. Jump component

7. Press OK and the cursor will jump to the component U1, a zoom and pan will occur only if
necessary to reach the location of the component, in the event it is currently outside the
visible area.

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14.5 Cross Probe Mode
8. Keep PCB Document Bluetooth_Sentinel.PrjPcb open.
9. Navigate back to the Projects Panel and open 3-Axis_Accelerometer.SchDoc.
10. Select from the menu Tools » Cross Probe; the mouse cursor should now be a crosshair.
11. Select component U1. The PCB should briefly pop up before returning to the schematic.
12. Press ESC to stop the cross probe mode.
13. Switch to the PCB Workspace to see footprint LGA16-3X3X1_L now masked.
14. Press Shift+C to clear the mask.

14.6 Cross Select Mode

The Tools » Cross Select Mode allows PCB component selecting directly from a
schematic. Used in conjunction with the PCB's Tools » Component Placement »
Reposition Selected Components command enables a very powerful and effective
way to go about the placement

15. Verify that cross-select mode is enabled within the preferences.

a) Open the Setup System Preferences, in the upper right corner, tree System, and the
page Navigation.
b) Verify the Cross Selection checkbox is enabled. The Cross Selection Mode section also
controls the selection scope.
c) Click OK to close the preferences dialog.
16. To toggle the Cross Selection Mode from the menu use Tools » Cross Select Mode. If the
icon of this menu has a blue outline around it, then Cross Select Mode is enabled.

Figure 152. Active Cross Select Mode

17. Navigate to the Projects Panel and double-click on

Microcontroller_STM32F101.SchDoc to open the schematic document.
18. Select component U2A
19. Switch back to the PCB Workspace with document Bluetooth_Sentinel.PcbDoc to see
the VFQFPN36_N footprint selected.

In this example, we use a special function, the Device Sheets.

The logical designators from the schematic do not show us the designator information
we see as physical Designator on the PCB. This is based on the specific Device
Sheets functions we use in this example.
To see the physical designator on the schematic, you can change the view by selecting
the seconds tab at the lower left side of the schematic page.
For further information about Device Sheets and logical/physical designators have a
look at the documentation or the Advanced training modules.

14.7 Layout Mode

20. Maintain focus on the PCB Workspace with the document
Bluetooth_Sentinel.PcbDoc.
21. Select View » 3D Layout Mode or press the ‘3’ key to enter 3D mode.

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 a) Press the ‘8’ key to change the 3D view to one of three predefined 3D views.
b) Press the ‘9’ key or ‘0’ key to see the other predefined 3D views.
22. Press and hold Shift key until you see an orb Figure 153.

Figure 153 Orb for 3D View.

Now press and hold the right mouse button on one of the navigation objects in the orb (arrow,
circle, dot) and now move the mouse to change the 3D view.

23. Select View » 2D Layout Mode or press the ‘2’ key to enter 2D mode.

14.8 PCB Layers

Visible layer tabs will be displayed at the bottom of the workspace.
24. Click on different enabled layer tabs at the bottom of the workspace.
a) Click the two small arrows beside the layer tabs to scroll through the tabs (Figure
154).
b) Click directly on different layer tabs change the current layer.
c) Press ‘ + ’, ‘ - ’, ‘ * ’ to change the active layer. ’
d) Notice the Heads Up Display (HUD) will display the current layer name.

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 Figure 154. Layer tabs

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14.9 Single Layer Mode
25. Single layer mode controls how the non-current layers for visible tabs will be displayed.
a) Open the Preferences, tree PCB Editor, page Board Insight Display.
b) Enable all three modes from the pane Available Single Layer Modes. Each enabled mode
will be cycled with each press of the Shift + S key in the PCB.
c) Click OK to close the preferences.
26. In the PCB Editor view with the focus on the PCB workspace, press Shift + S to cycle into
one of your single layer modes and observe how the current layer looks.
27. Change the current layer by selecting a layer tab or by holding Shift+Ctrl and slowly
scrolling the mouse wheel.
28. Repeat the above two steps for the remaining two single layer modes.

Notice in the HUD. It will show (Single) when you are in Single-Layer Mode.

29. Press Shift + S until you exit Single-Layer Mode. Note: the HUD will not immediately reflect
the change until after a mouse movement is detected.

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14.10 View Configurations
30. Open the View Configuration panel by clicking on the Panels button at the lower right side
and selecting View Configuration (key L), or click on the current layer color rectangle
immediately to the left of the LS button in the Layer Tabs.
a) The View Configuration panel with the tab Layer & Colors will open as shown in Figure
155.

Figure 155. View Configuration panel

b) Activate or deactivate the visibility for different layers with a click on the eye icon next to
the layer color Figure 155.
c) Click on a color box for an active layer. Change the color in the pop-up box.
d) Select the View Options tab (Figure 156).
e) Under Objects Visibility click on the eye icon for polygons to hide the polygons

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 Figure 156. Show and hide layers

Although the polygons are not visible while hidden in this way, they will still be affecting
your design. They are still considered obstacles for other features like Interactive
Routing. In general, it is better to Shelve a polygon instead of hiding it.

f) Under Objects Visibility click on the eye icon for Polygons to show the polygons again
g) Move the slider on the right side to change the transparency for the polygon.
h) View the results in the PCB view.
31. Experiment with other options and observe changes in the PCB view.
32. You can revert to “Altium Standard 2D” configuration by selecting Altium Standard 2D from
the Configuration drop-down list Figure 157.

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 Figure 157. Different predefined Views

33. Close the project without saving.

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Exercise 15: PCB Layers

15.1 Purpose
In this exercise, you will examine the layers associated with your design and learn how
to add plane layers to simplify power and ground connections used later.

15.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping project located in
the AD18 Essentials Exercises\PCB Layers folder.

15.3 Adding a new PCB

2. Open the WCTopping.PrjPCB project file from the AD18 Module 16 PCB Layers folder.
3. Add a new PCB Document to the project by opening the Projects Panel and right-clicking on
the project name. From the right-click menu, select Add New to Project » PCB as seen in
Figure 158.

Figure 158. Add PCB to project.

4. Go to File » Save All and save the PCB document as WCTopping.PcbDoc.

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15.4 Layer Stack Manager
15.4.1 Modify Default Layer Stack
5. With the WCTopping.PcbDoc as the active document, from the menu select Design » Layer
Stack Manager or using the shortcut keys D » K. The dialog, as shown in Figure 159, will
appear.

Figure 159. Layer Stack Manager.

6. Click on the Add Layer button at the bottom of the dialog and choose the Add Internal Plane
menu. (Figure 160).

Figure 160. Adding layers.

7. Click on the new Internal Plane 1 label created in the layer stack and rename it GND.

Edit text by selecting the cell then click the cell again with Left Mouse Button.

8. Repeat the previous two steps to create a new plane layer called 3V3. The layer stack should
look like Figure 161.

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 Figure 161. Moving layers.

9. Select the just created layers and click on Delete Layer to remove the layers. Click on YES to
confirm that objects on that layer will be removed.
10. Click on the Add Layer button at the bottom of the dialog and choose the Add Layer menu to
add a first internal routing layer.
11. Repeat the previous step to create a second internal routing layer.
12. Select the cell for Dielectric Material from the second core and add the material FR-4
13. Select the Signal Layer 2 and move the layer by selecting the Move Up and Move Down
button and observe the changes.
14. Select OK to save the changes and to close the layer stack manager.

15.5 Layer Stack Table

15. With the PCB Workspace in focus, press the L hotkey or select View » Panels » View
Configuration.
a) Locate the Mechanical 1 layer name in the list. If needed expand the section of the
Mechanical Layers (M).
b) Right-click and rename the layer to Layer Stack. (Figure 162).

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 Figure 162. Renaming mechanical layers.

16. Select from the menu Place » Layer Stack Table to add a table of the layer stack in the
workspace.
17. Press Tab before clicking in the editor space to set the table parameter.
18. Modify the following parameters: (Figure 163).
a) Change Layer to Layer Stack
b) Uncheck the Show Board Map
c) Set Line Width to 8mil
d) Set Text Height to 30mil
e) Set Stroke Width to 5mil

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 Figure 163. Layer stack table.

19. Press the Pause button in the middle of the workspace and position the compact table below
the board outline. Right Click to exit Layer Stack Table placement. (Figure 164).

Figure 164. Place layer stack table.

20. Save your design and close.

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Exercise 16: Shaping the PCB

16.1 Purpose
In this exercise, you will learn how to define a board shape using several methods.

The board shape or board outline is a closed polygon used to define the PCB boundaries. The
board shape does not exist on a particular layer but rather defines the space where components
and traces can be placed. In Altium Designer, the black area is the board shape and can be
created in several ways. This exercise will explore three of these methods.

16.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\Shaping the PCB folder.

16.3 Board Planning Mode

2. Open the WCTopping.PrjPCB project file located in the AD18 Module 17 Shaping the
PCB folder.
3. Navigate to the Projects Panel and double-click the icon for the PCB file
WCTopping.PcbDoc with the left mouse so that the PCB document is open.
4. Set the origin to 2050mil x 2150mil by selecting the menu Edit » Origin » Set. Rather than
clicking the location we want, press the J » L keys to open the Jump Location command.
5. Enter in the X and Y coordinates. (Figure 165).

Figure 165. Jump to location.

6. Press Enter twice to set the origin at that location. A circle and X will appear at the new origin
location (Figure 166).
7. Change the grid setting to 500mils by pressing Ctrl + G and entering 500mil in the Step X
field and clicking OK. Notice the cursor’s position reported relative to the new origin is shown
the Status Bar located in the lower left corner of the Workspace. (Press the Q key to toggle
units from mm to mils if necessary).

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 Figure 166. Defined origin on the grid.

8. Change to the board planning mode with the command: View » Board Planning Mode (the
shortcut to get to this mode is the 1 key).
9. Click on the menu Design » Redefine Board Shape, and then draw a closed rectangle
starting at the origin (0,0). Use the X, Y position to guide you to draw a rectangle 3500mils
wide by 2000mils tall. Be sure to left-click on every rectangle vertices and ending at the
origin followed by a right click to end the command (Figure 167).

If the corner mode is not 90° rectangle change it to 90° rectangle. You can change the
corner mode by pressing Shift +Spacebar.
Examine the Status Bar in the bottom center of the window to see the current mode as
you toggle through the five corner style choices.

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 Figure 167. Board planning mode.

Use the Jump » Location command to go to the X, Y locations quickly.

10. Select from the menu Design » Edit Board Shape then select and hold the right vertical
sliding edge.
11. Drag to expand the rectangle to be 5000mils wide.
12. Repeat with the top horizontal line to expand the rectangle to be 2500mils tall (Figure 168).
13. Right-click to end the command.

Figure 168. Board outline defined in board planning mode.

14. From the menu, select Design » Modify Board Shape to get a crosshair.
15. Left-click at points to customize shape (Figure 169):
a) (5000, 1500)

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 b) (2500, 1500)
c) (2500, 1000)
d) (5000, 1500)

Figure 169. Board outline modified in board planning mode.

16. Right-click to end the command. Change back to View » 2D Layout Mode (or press 2).
17. Change the grid back to 5mils in the Grid Editor using the keys Ctrl + G.

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16.4 Define Board Shape from Selected Objects
16.4.1 Circle
18. Open the View Configurations panel by selecting the View » Panels » View Configuration
or press the L hotkey.
19. Rename the Mechanical Layer 1 to Board Outline, right-click Edit Layer
as shown in Figure 170.

Figure 170. Renaming mechanical layer.

20. Select Board Outline as the active layer.

21. Select Place » ARC » Full Circle
a) Left-click to set the center of the circle x:1750mil y:1250mil.
b) Move the cursor to create a large circle, clicking again to set the circle radius (r=1300mil)
using the R: Radius indication in the Heads Up Display.
c) Press the right-mouse button to terminate the command (Figure 171).

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 Figure 171. Placing a circle in the PCB workspace.

22. The circle should be highlighted in white indicating it is selected (if it is not, press Ctrl + A
keys to select it).
23. Now create a circular board shape by selecting the menus Design » Board Shape » Define
from selected objects. The black area, the board outline, should now be limited to the circle
(Figure 172).

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 Figure 172. Defining the board shape from selected primitives.

The display may be masked as a result of this action. Click the Clear button or in the
bottom right corner of the editor or press [Shift] + C to return to normal view.

24. With the circle still highlighted, press the Delete key to remove the circle outline. Notice that
this does not affect the board shape.

16.4.2 Rectangle
25. To simplify the drawing process, we will set a coarse grid. Press Ctrl + G to open the Grid
Editor and change the Step value to 500mil. Click OK to close the Grid Editor.
26. Click menu choices Place » Line and draw a closed rectangle of any shape. Ensure that the
rectangle is closed by looking for a white circle at the cursor when you are completing the
polygon. (Figure 173).

If the rectangle is not closed, you might be prompted to use the external edges.
Selecting Yes to use external edges will create a board shape. However, this can result
in your board size larger than expected by the line width, as normally the centerline of
the selected objects is used.

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 Figure 173. Drawing board shape with lines.

27. After you complete the rectangle, right-click to terminate the command.

Try changing the corner style by pressing [Shift]+[Spacebar] while drawing the
rectangle. Examine the Status Bar in the bottom center of the window to see the
current mode as you toggle through the five corner style choices.

28. Right-click a second time to terminate the place line command.

29. Press the Ctrl + A keys to select the newly defined rectangle.
30. Now create a board shape to match your rectangle by selecting the menus Design » Board
Shape » Define from selected objects. (Figure 174).

Figure 174. Example Board shape defined from outline on mechanical layer.

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16.5 Defining Board Shape from DXF/DWG
31. Remove the outline for the board by pressing Ctrl + A to select the outline, then press the
Delete key to remove the outline.
32. Set the Origin to the bottom left of the grid with Edit » Origin » Set.
33. Select File » Import » DXF/DWG and browse to the project folder AD18 Essentials
Exercises\Shaping the PCB for outline.dxf located in the exercise folder.
34. The Import from AutoCAD dialog box will open. Change the dialog box settings as shown
below in Figure 175. Be sure to change the Scale to mm, the board_shape to your new Board
Outline layer and that title_block is set to Not Imported.

Figure 175. Import DXF dialog.

To ensure the proper scale selection, check the Size = which will update based on the
selected scale units and should match the dimension you are expecting.

35. After clicking on OK, the board shape will be imported (Figure 176).

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 Figure 176. Imported DXF outline.

36. Select all the line segments in the imported outline by pressing Ctrl + A.
37. Select Design » Board Shape » Define from selected objects to create the new board
shape.

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 Figure 177. Final board shape created from a DXF outline.

38. Save your changes and close the document.

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Exercise 17: PCB Grids

17.1 Purpose
In this exercise, the configuration and the functionality for the Cartesian and Polar Grid
will be reviewed. Both grids can be used as a local grid within the PCB editor for a
specific document.

Designers need to precisely place and align components during PCB design and routing which is
extremely difficult without the help of grids systems. Altium Designer supports multiple user-defined
grids in both Cartesian and Polar forms, making component placement predictable and easy.

17.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\PCB Grids folder.
2. Open WCTopping.PrjPcb from the AD18 Module 18 PCB Grids folder.
3. Open Test1.PcbDoc.

17.3 Predefined Default Grids

4. Press key G to open a list of predefined grid values.
5. Select one of the predefined Grid Values. You see the selected value at the bottom in the
status bar and the Heads Up Information Figure 178.

Figure 178. Grid Selection Dialog.

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17.4 Grid Manager
You can make your grid choice and tailor the settings to suit both your personal placement
preferences and the immediate design requirements.

17.4.1 Global Board Snap Grid

6. Go to Design » Import Changes from WCTopping.PrjPcb and execute all changes.

If the ERC for the Validation report a Footprint not found messages have a look at the
exercise about the Design Transfer for information how this could be corrected.
Ignore other messages from the validation step as long as they are not reported again
after executing the ECO.

7. Open the Properties panel by clicking View » Panels » Properties. The grid configuration
can be seen inside the Properties panel, as shown in Figure 179. Close the other panes from
the properties panel or open the grid pane if needed to see the relevant information.

You may need to change your units from mm to mil using the Q hotkey.

Figure 179. Properties panel with Grid manager.

1. Double-click on the Global Board Snap Grid line in the Grid Manager pane to access
parameters for the default grid as shown in Figure 180.

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 Figure 180. Default Grid settings.

You can access the default grid parameters directly with the Ctrl+G hotkeys.

2. Change the Step X size to 10mil, the Multiplier to 10x Grid Step and the drawing
configuration from Dots to Lines.

The Multiplier determines how many Fine units will be contained in a Coarse grid unit.
One Fine unit is the value of the Step entered in the Cartesian Grid Editor dialog.

3. Click OK to accept changes.

4. Examine the new grid to see the changes as shown in Figure 181. Notice that there are ten
fine grids to each coarse grid and the smallest division is 10mil.

Figure 181. Modified default grid setting.

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17.4.2 Custom Cartesian Grid
5. Open the Properties panel.
6. Click the Add button in lower left of the dialog and select Add Cartesian Grid.
7. A grid named New Cartesian Grid will be added to the list in the Grid Manager, as shown
in Figure 182 below.

Figure 182. New grid added in Grid Manager.

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 8. Double click any field in the New Cartesian Grid entry to open the Grid Editor dialog.

Figure 183. Cartesian Grid Editor.

9. Edit the values for Step, Extents, Quadrants and Display to match those shown in Figure 183.
The Fine color is set to 127 while Coarse color is set to 123.
10. Click OK to return to the PCB editor and note the presence of the new grid. Zoom in to see
the fine grid detail (Figure 184).

Figure 184. New Cartesian Grid in quadrants 1,2 and 4.

11. Drag the component D11 to the right of the board on to the new Cartesian grid. You will notice
that the grid is no longer visible. It will reappear when the component is not selected.
12. Open the Properties Panel and enable the Comp checkbox for the UserGrid1 Cartesian grid
as highlighted in Figure 185 below.

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 Figure 185. Enabling Component checkbox for User Grid.

13. Move the component DI1 to see that the grid now remains visible. Place the component on
the grid and note that the center point snaps to the grid vertices.

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17.4.3 Custom Polar Grid
14. Open the Properties Panel.
15. Click Add in the Grid Manager pane and select Add Polar Grid.
16. Enable the Comp checkbox to make the polar grid active for component operations.
17. Double-click the New Polar Grid row to open the Polar Grid Editor. Set the values as shown in
Figure 186 and click OK.
The Fine and Coarse line colors are assigned to values 106 and 232 respectively.

Figure 186. Polar Grid Editor.

18. Note the new Polar Grid in the PCB editor was generated over the Cartesian Grid we just
generated.
19. The Grid Manager allows changing the priority for the overlapping grids if needed, Figure 187.

Figure 187. Priority for the Grids.

20. Drag components DI2 to the newly added polar grid. Test the rotations of the components by
pressing Spacebar and Shift + Spacebar while moving the component to notice its
alignment to the grid.

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 For better visual experience, hide the rat’s nests by going to View » Connections »
Hide All. See Figure 188 as an example.

Figure 188. Aligning components to a Polar Grid.

21. Save and close the project documents.

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Exercise 18: PCB Rules and Panels

18.1 Purpose
In this exercise, students will learn various methods to create PCB design rules. Rule
priorities will also be defined, to ensure proper rule application on objects targeted by
multiple rules.

Design rules are used to ensure the PCB layout meets the specified design requirements and
highlight violations when items fall outside of their defined constraints. These rules cover various
aspects of the design and collectively form an “instruction set” for the PCB editor to follow. Many of
them can also be monitored in real-time by the online Design Rule Checker (DRC).

18.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\PCB Rules and Panels folder.

18.3 Basic Design Rule

18.3.1 PCB Rules and Constraints Editor
2. Open WCTopping.PrjPcb from the AD18 Module 19 PCB Rules and Panels folder.
3. Open the Rules.PcbDoc file from the Projects panel.
4. Go to Design » Import Changes From WCTopping.PrjPcb and verify that there are no
differences reported. Close the Comparator Results dialog.
5. Go to Design » Rules (D » R) and the PCB Rules and Constraints Editor dialog will open.
6. The tree on the left lists the rule categories. Expand the Electrical rule category. Notice that
there are five rule types within this category.
7. Expand the Clearance rule type to display all clearance rules currently defined. Notice that
there is only a single, default rule called Clearance. Select it to view its rule definition on the
right of the window (as shown on Figure 189).

Figure 189. PCB Rules and Constraints Editor.

8. We will now create a new rule and target the 12V power net. Right-click on the Clearance rule
just underneath Electrical and click New Rule. You should notice a new rule added with a
default name given as Clearance_1.

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 9. Select the new rule Clearance_1 on the left pane of the window and assign each field
according to Figure 190.
a) Set the Name field to PowerNets.
b) Set the first query to Net and 12V.
c) Set the Minimum Clearance constraint to 15mil.

Figure 190. PowerNets clearance rule definition.

18.3.2 Rule Priorities

10. Now that we have multiple clearance rules, let’s ensure that their priorities are set correctly.
Click on the Priorities… button on the bottom left of the PCB Rules and Constraints Editor
window to open the Edit Rule Priorities window. Ensure that the newly added rule’s priority is
number 1 as shown in Figure 191. If it’s not, select that rule and click Increase Priority.
11. Click Close and then OK to accept changes and close all dialogs.

Figure 191. Rule Priorities Window.

To simplify the process of defining and managing rules, the idea is to first define the
general rules that cover broad requirements of the PCB. Then, override these rules
with specific rules in specific situations. Thus, it is a general practice to make the
“All-All” rule the least prioritized so that objects are applied with their specific rules.

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18.4 Design Rule Using Net Clases
12. Instead of scoping objects of a single net in Design Rules, we can target objects from multiple
nets by grouping them in Net Classes. We will now add a net class to the 12V net, and assign
a width rule to this net class. Open Power Supply.SchDoc.
13. Go to Place » Directives » Parameter Set. Your mouse cursor will contain the Parameter
Set Symbol attached to it.
a) Before placing it, hit the Tab key to open the Properties Panel.
b) Assign the fields according to Figure 192.

Figure 192. Parameters for a Net Class directive.

14. Click on the pause symbol to continue and place it on the 12V power line (Figure 193).

Figure 193
Figure 193. Placing the PowerNets directive.

15. Perform a Design » Update PCB Document Rules.PcbDoc.

16. Click Execute Changes and Close as shown in Figure 194. The focus will automatically
change to the PCB file.

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 Figure 194. Engineering Change Order showing the addition of PowerNets net class.

If you add a new net class directly in the Object Class Explorer of the PCB, they will not
be present on the schematic. When running the Engineering Change Order, you may
be prompted of a possible removal of the net class. Simply untick the box to prevent
the removal within, or edit the Project » Project Options » ECO generation tab to
prevent any removal of net classes.

17. We will now add a width rule on the PowerNets net class. Go to Design » Rules, then
navigate to Routing Width design rule. Add a new width rule and assign the name and
constraints according to Figure 195.

Figure 195. PowerNets width rule definition.

18. Once again, please ensure that the newly created PowerNets_Width rule is of the highest
priority as described in Section 18.3.2 Rule Priorities.
19. Click OK to save and close PCB Rules and Constraints Editor.

18.5 Design Rule Using Custom Queries

18.5.1 Create Queries Using Find Similar Objects
20. We will now create a design rule which targets components of a specific footprint. We can
build a custom query for this purpose, using Find Similar Objects. While in Rules.PcbDoc,
right-click on component RLY4 and click on Find Similar Objects.
21. Ensure that Object Kind and Footprint are set to Same, and the Create Expression
checkbox is ticked as shown in Figure 196. Then, click OK.

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 Figure 196. Find Similar Objects configuration.

22. Open the PCB Filter Panel by going to Panels » PCB Filter or View » Panels » PCB Filter.
23. Within this panel, the query created by running Find Similar Objects earlier will be shown in
the Filter pane. We will now create a placement rule using this query.
24. Within this panel, click on Create Rule. In the Choose Design Rule Type window, under
Placement, click on Component Clearance Constraint. Click OK.

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 Figure 197. Creating a clearance rule from PCB Filter panel.

25. We will define a component clearance constraint between components of this footprint (Black
Anderson connector) and components of the Red Anderson connector. In the PCB Rules and
Constraints Editor, define the rules through the following procedure (Refer to Figure 198):
a) Copy the query from Where The First Object Matches field with Ctrl+C.
b) Set Where The Second Object Matches to Custom query and paste the query into the
field using Ctrl+V. Then, change Anderson_BLK_RHT_BOT to
Anderson_Red_RHT_BOT. Please keep in mind that the query is case sensitive.
c) Rename the rule to Anderson and set the minimum horizontal clearance to 100mil.

Figure 198. Anderson Component Clearance rule definition.

26. Once again, please ensure that the newly created Anderson Component Clearance rule is of
the highest priority as described in Section 1.3.2 Rule Priorities.
27. Click Close and then click OK.

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18.5.2 Verifying Applied Design Rules in the PCB
28. Go to Preferences. Under PCB Editor branch, open the General page. Ensure that
Online DRC is enabled. Click OK. Hit Shift+C to clear any masks or selection.
29. Notice that 5 components (RLY4, RLY3, PWRP1, PWRN1, RLY1) have green highlight as they
are violating the new component clearance constraint.
30. Drag RLY4 away from the components to remove the violation highlights on RLY4 and RLY3.
31. Drag PWRN1 towards RLY4; while dragging, hit R to change the component pushing mode to
Push:Avoid, as indicated in the Heads-up Display. Drop it to the right of RLY4.
32. Lastly, drag RLY1 towards RLY4 and drop it to the left of RLY4.
33. Notice the clearance allowed between RLY1 and RLY4 is larger than between RLY4 and
PWRN1, because of the Anderson Component Clearance rule defined earlier (Figure 199).

Figure 199. Applied Anderson component clearance Constraint.

18.6 Design Rule Wizard

34. We will now see how we can create design rules using the Design Rule Wizard. Go to Design
» Rule Wizard… and click Next.
35. Set:
a) Name to PwrWidth
b) Comment to Need wider traces for power
36. Select Width Constraint as shown in Figure 200 and click Next.

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 Figure 200. Rule Wizard Rule Type Setup.

37. Select A Few Nets for the Rule Scope and click Next.
38. Within the Advanced Rule Scope:
a) Change the first Belongs to Nets condition value field to 5V.
b) Change the second Belongs to Nets condition value field to 12V.
c) Right click on the third Belongs to Nets condition and click on Delete. Repeat the step for
the fourth one too.
d) Finally, change the expression from exclusive AND to inclusive OR by clicking on AND.
See Figure 201 for the final configuration.

Figure 201. Rule Wizard configuration.

39. Click Next. Verify that its priority is of the highest on the list.
40. Click Next. Tick Launch main design rules dialog checkbox, then click Finish.

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 41. Notice the new rule added in the PCB Rules and Constraints Editor. We can then modify the
minimum, preferred and maximum width constraints for this rule as desired (Figure 202).

Figure 202. New PwrWidth rule created

One thing to note: the PowerNets_Width rule which we created in Section 18.4 Design
Rule Using Net Clases is now invalid and superseded by the PwrWidth rule. Objects
within the 12V nets will now only be applied by the PwrWidth rule.

42. Save and close all documents.

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Exercise 19: PCB Placement

19.1 Purpose
This exercise will allow you to practice different techniques for component placement.

Component placement directly determines the degree of difficulty for routing and the performance
of the final product.

19.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\PCB Placement folder.

19.3 Placement of Components Within Rooms

2. Open WCTopping.PrjPcb and open the project file WCTopping.PcbDoc. Notice all
components are within the rooms placed outside of the board towards the right.
3. Test out the component behavior when a Room is moved:
a) Drag one of the Rooms, such as Relay_IO. Notice the behavior of all components being
moved simultaneously when the room is moved. Figure 203.
b) Repeat for other rooms that have yet been moved and notice the behavior.

Figure 203. Room Deletion.

4. Set the Pre-selection filter from the ActiveBar to only activate Rooms. Then, draw a selection
rectangle around all the rooms (Figure 204). Hit the Delete key to delete all of them, leaving
the components remaining on the PCB document.

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 Figure 204. Set Pre-selection filter to Rooms.

19.3.1 Placing within an Area

5. Enable All Objects in the Pre-selection filter on the ActiveBar (Figure 205).

Figure 205. Enable All Objects in pre-selection filter

6. Select all the components in the design by drawing a rectangle around them.
7. Use the command Tools » Component Placement » Arrange within Rectangle.
a) Define a rectangle of the entire board outline by:
i) First click in the upper left corner of the board.
ii) Next, click towards the bottom right corner.
iii) Right Click to exit command
b) Compare your result with Figure 206. This illustrates how you can get any selected group
of components within a specific area of your board to begin placement. It is not necessary
for the drawn box to be large enough for components, a small box would do.
c) Right-click or press ESC to exit the placement command.

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 Figure 206. Component Placement within the board area.

8. Position all the components outside of the board.

a) With all the components still selected, click Tools » Component Placement » Arrange
Outside Board.
b) Shift+C to clear component selection. See Figure 207 for the end result.

Figure 207. Components Arranged Outside of the Board.

19.3.2 Placing Individual Components

9. Click on the 40-pin header, component J4, and drag it to the position shown in Figure 208.

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 Figure 208. Manually placing J4.

10. Continue placing components using the drag method.

a) Use the Move command using the Edit » Move » Move (M, M hotkeys) and left-click on
component UI1 and move to its new position as shown in Figure 209.
b) During component movement, release your left mouse. The component remains on the
cursor.
c) Left-click to position the component – no hold and drag required!

Figure 209. Placing other components with Edit Move Move (MM).

While moving a component, press Shift to rotate the component counter-clockwise and
press Shift + Spacebar to rotate the component clockwise.

11. Position components RLY1, RLY2, RLY3 and RLY4 so that the result looks like Figure 209.

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 Connection lines will appear when dragging a component to show the same net
connections between the footprints. While dragging a component, press N to toggle the
visible component net connections ON/OFF. To hide all connection lines, use View »
Connections » Hide All.

19.3.3 Cross Select Mode

Tools » Cross Select Mode used in conjunction with the PCB Editor’s Tools »
Component Placement » Reposition Selected Components command is a very
effective way to place components by selecting them from the schematic.

12. Open Setup System Preferences, in the upper right corner. Navigate to the section
System - Navigation and verify that the Cross Selection checkbox is enabled under Cross
Select Mode.
Enable Cross Selection capability from an active PCB or schematic document by accessing
the menu item Tools » Cross Select Mode. If the icon of this menu item already has a blue
outline around it, then Cross Select Mode is already enabled as shown in Figure 210.

Figure 210. Blue highlight indicates Cross Select Mode in the Tools menu is enabled.

13. In Processor_Interface.SchDoc, select capacitors C5 and C6 sequentially.

a) Hold down Shift while left-clicking on the component bodies as shown in Figure 211.
b) The order you select them is important as this will determine the placement order in the
PCB.

Be sure to click on the body of the resistor rather than just the designator or comment.
The component will not be selected in the PCB if the body of the symbol is not
selected.

Figure 211. Selecting capacitor symbol bodies.

14. Bring into focus the WCTopping.PcbDoc. In the PCB Editor, make sure the corresponding
footprints are currently selected. Access the command Tools » Component Placement »
Reposition Selected Components. Component C5 should automatically jump to your cursor
for placement.
15. Click to place C5 in the bottom left corner as shown in Figure 212, using Spacebar to rotate.
16. Component C6 should now automatically jump to your cursor.
Place it in accordance with Figure 212.

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 Figure 212. Positioning Processor_Interface.SchDoc components C5 and C6 loosely.

17. Now we will position the leftmost capacitor exactly in the position we want.
a) Double click the capacitor, C5, to open its Properties Panel dialog.
b) Change the (x, y) position to (200mil , 100mil) as shown in Figure 213.
c) Press Enter to accept the change.

Figure 213. Setting specific position for the origin of C5 on the board.

18. We will now position the component C6 using the Move command.
a) Invoke the Object Move command by pressing M » M hotkeys.
b) Click the C6
c) With the component now attached to the cursor use the Jump to Location command.
i) Press the J » L hotkeys and enter (X, Y) values of (500mil , 300mil) as shown in
Figure 214.
ii) Select the OK button with the TAB key, press Enter to accept the jump values and
press Enter again WITHOUT MOVING THE MOUSE to fix the position.

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 Figure 214. Jump to Location dialog to accurately position a component.

19. Place UI1 outside of the board.

20. Align the Relay Components:
a) Select components RLY1, RLY2, RLY3, and RLY4.
b) Use the command Edit » Align » Distribute Horizontally. The components should
appear as in Figure 215. They have been spaced out between the two end ones that we
carefully set.

Figure 215. Components distributed evenly horizontally.

21. With the components still selected, use Edit » Align » Align Vertical Centers then choose
the component at either end as the primitive reference. (Be sure to click between the pads).
See outcome on Figure 216.

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 Figure 216. Components aligned with vertical centers.

Alignment and move commands can be performed on component properties, such as

Designators. Hold Ctrl while selecting to select.

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19.3.4 Position Remaining Components
22. To place the remaining unplaced components (Please bear in mind that the PCB does not
have to be completely placed, due to time restrictions):
a) Use click and move method:
i) Click in the center of a component and hold down the left mouse button.
ii) The component will now move with your cursor.
iii) Release the mouse button at the desired location.
b) Placement from the PCB Panel:
i) Open the PCB Panel.
ii) Set the Drop-down at the top to Components.
iii) For drag and drop, in the select boxes at the top of the panel, uncheck Select and
check Clear Existing. Feel free to Uncheck Zoom if this makes your flow easier.
iv) Click on the Component Class <Outside Board Components>.
v) All outside board components will be listed in the Components pane.
vi) In the Components section:
Click a component and drag it directly to the right and the component will pop onto
your cursor for placement.
vii) Release the mouse at the desired location.
c) Multiple Placement from the PCB Panel:
i) Try selecting multiple components in the pane using Ctrl + Click.
ii) Drag one of the selected components to the right will begin a reposition selected
components for the components that had been selected.
iii) Place the components in the PCB as they pop onto your cursor.
23. For the remainder of the components, in the PCB Panel, enable the Select checkbox at the
top. The <Outside Board Components> class should still be selected, so just click the Apply
button. This will select the remaining components outside the board area.
24. Use Tools » Component Placement » Reposition Selected Components to sequentially
load up the cursor with the unplaced parts.
25. Refer to Figure 217 as the sample of a finished PCB component layout for the training.
26. Refer to Figure 218 as the sample for the PCB component layout for the final product.
27. Once complete, save and close all documents.

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 Figure 217. Placement Training PCB

Figure 218. Finished Component Layout.

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Exercise 20: PCB Routing

20.1 Purpose
In this exercise, students will practice on various PCB routing modes. Within each
mode, routing options and tips will also be discovered.

Routing is essentially the process of connecting pads through tracks and vias. Altium Designer
provides a series of powerful interactive routing tools. The main aspects of Interactive Routing
(Clearance, Width, Allowed Layers and Via Style) are driven and defined by your Design Rules.

20.2 Preparation
1. For this exercise, open the WCToppingRouting.PcbDoc file located in the AD18
Essentials Exercises\PCB Routing folder.

20.3 PCB Routing

20.3.1 Setting Preferences
2. Before routing, it is also good to be aware of some of the preferences which can affect its
behavior.
a) Press O - T to open the Preferences dialog to the PCB Editor branch on the Interactive
Routing page.
b) Set the following options as follows:
• Automatically Terminate Routing: On
• Automatically Remove Loops: On
• Track Width Mode: Rule Preferred
• Via Size Mode: Rule Preferred
c) Click OK to apply and close the Preferences dialog.

20.3.2 Quick Routing for Simple Nets

3. In this section, we will see how we can hold the Ctrl key and left-click to quickly complete
simple, local routes.
4. Jump to component UI1 by hitting J » C and type UI1. Start the Interactive Router by
pressing the U - T keys or select the Route » Interactive Routing menu command or clicking
the Interactive Routing button on the ActiveBar .
5. Hold the Ctrl key, then left-click on one of the pads, e.g. UI1-28. If the route is possible on
the selected layer, it will be instantly routed.
6. Continue to hold the Ctrl key and try another net, e.g., UI-27, UI1-26, UI-25. Right-click or
hit the Escape key to exit the interactive routing command.

20.3.3 Interactive Routing Nets

7. Zoom into the area of the board shown in Figure 219 (toward the upper left portion of the
PCB). We will now route the connections between components P1, RTERM1, DioCAN1,
CH1, CL1, and UC2 through the following procedure:

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 Figure 219. Ratsnests between components.

a) Start the route command with Route » Interactive Routing (or U - T hotkeys)
b) The cursor will change to a command crosshair, indicating that you are in an interactive
command.
c) Left-click on Pad 2 of P1 to begin the route. Move the mouse away from the pad to see
the tracks the Interactive Router is planning to place.
d) Move your mouse to Pad 1 of RTERM1 and left-click to terminate the route. Upon
terminating the route, we will still remain in the interactive routing mode and the editor is
ready for the next net to route, as indicated by the active command crosshair.
8. While still in active interactive routing mode, left-click on Pad 1 of P1.
a) Hit the ~ tilde key to access all the shortcuts and commands while in this mode (
Figure 220). Notice that 3 is the hotkey to cycle track-width source of this route.

Figure 220: Shortcuts/menus listed in thilde menu

b) Hit the 3 key to cycle through the different trace width values set in the Trace Width
design rule.
c) You can hit the Spacebar key to toggle the "elbow side" (Start/End toggle).
d) Hit Shift + R to cycle through the available Conflict Resolution modes. Experiment with a
few of the different routing modes, Walkaround, HugNPush, Push, Ignore Obstacles and
Stop at First Obstacle. The current routing resolution mode is displayed in the Status
Bar and the Heads-Up Display (Figure 221).

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 Figure 221: Conflict resolution modes display

You can control which Conflict Resolution Modes are available by changing
preferences in the PCB Editor branch under the Interactive Routing Page and altering
the preferences in the Routing Conflict Resolution section or by pressing Tab during a
route.

9. Hit the Backspace key to remove the last placed vertex of your current route.
10. During a route:
a) Right-click once (or press Esc) to exit current route placement.
b) Right-click again while no routing is active (or press Esc) to exit the Interactive Routing
command completely.

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20.3.4 Vias
20.3.4.1 Setting Via Sizes
To have multiple via sizes available during interactive routing, we will modify the Routing Via Style
design rule.
11. Open the RoutingVias design rule: Design » Rules section Routing - Routing Via Style.
a) Modify the Via Diameter and Via Hole Size values as shown in Figure 222. Note that the
Maximum values are in the middle.
b) Click OK to accept changes and close the dialog.

Figure 222. Changing the Routing Via Style Design Rule.

20.3.4.2 Adding Vias

12. Start the interactive routing command by pressing U - T.
a) Move the cursor and click on Pad 13 of component UC1.
b) Start routing and hit the + key on the NumPad to drop a via and go to the next signal layer
as shown on Figure 223 (if you do not have a NumPad, hit the ~ tilde key and click next
layer.
c) Hit the 4 key to toggle through the three via sizes that you added in the design rule earlier.
d) After pressing the L key, a via should be added as in Figure 223.
e) Continue finishing the route on the bottom layer.

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 Figure 223. Changing via size while routing.

The active layer will now be switched to the Bottom Layer, as shown on the current
layer tab below. New routes will start on this active layer, unless if starting the route
from a top-layer surface mount pad.

It is not necessary to memorize all the interactive routing options. Instead, hit the tilde
(~) key located below the Esc button or the F1 key to display all available options. This
key works to display all possible command options within the PCB and Schematic
Editors.

20.3.5 Multi-Trace Routing

To improve the routing efficiency for grouped signals, especially buses, you can use the
Interactive Multi-Routing command.
13. Find UC1 in the PCB document using the command Jump » Component (shortcut J - C).
14. Hold Shift and click on Pads 12, 13, 14 and 16 to accumulate a group selection (Figure
224).

Figure 224. UC1 pads to be used for multi-trace routing.

15. Start the multi-route from these pads using the command Route » Interactive Multi-Routing
(U » M). The command crosshair will appear to indicate you are in an interactive command.

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 a) Left-click either of the four pads to set the base track for the multi-route.
b) Press Tab to open the Properties panel. Change the Bus Spacing to 10mil by pressing
From Rule (10mil)
c) Move the cursor down towards J4, and you will see four tracks are routing
simultaneously. If traces do not appear, press the 3 key to cycle the trace width until it
changes to 10mil.
d) Left-click to place vertical routes. Then, move the cursor and hover above the destination
pad on the far right. If you are satisfied with the routes, left-click to place them (Figure
225).

Figure 225. Multi-Trace Routing from UC1 to J4.

During the Interactive Multi-Routing process, hit Tab and you can set the gap between
the tracks. Or simply press shortcut B to reduce the gap, or Shift + B to increase the
gap as you route.

20.3.6 Adjusting Tracks

16. If you need to adjust a route, rather than deleting it and then re-routing, just route it again.
Automatic Loop Removal will remove the old redundant tracks automatically. A good
connection to try this on is the portion of tracks on the Bottom Layer between J1 and J4.
a) Start a route from J1 Pad 1 to J4 Pad 5.
b) Re-route a more direct trace between the two pads.
c) Once the route is finished, the Loop Removal removes the previously routed trace.
17. To drag a track to adjust it, exit the Interactive Router, clicking the track to drag it.
18. If you do want to delete an entire track and start again, use the Route » Un-route »
Connection, or just press U - U - C and select the track to remove.

The behavior for tracks, if dragging or moving is the preferred command can be
configured in the Preferences, PCB Editor branch under the Interactive Routing Page.

20.3.7 Track Glossing

Utilizing some of the interactive and dynamic routing features may leave some undesired track
segments or less effective route paths. We can use Track Glossing to clean up route paths after
placement. After routing some connections, locate route paths that can be cleaned up or routed
more directly.

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 19. To gloss a trace:
a) Left-click to select a segment of the trace. (or Edit » Select » Physical Connection or E
- S – C)
b) Run Track Glossing by going to Route » Gloss Selected. See Figure 226 as an
example.

Figure 226. Gloss Tracks, Before (left) and After (right).

20.3.8 Active Route

20. Select the connection lines between UI1 and IOS2 by holding the Alt key followed by
dragging your mouse from right to left around the connection lines to select them.
21. Open the PCB ActiveRoute Panel by going to Panels » PCB ActiveRoute or View » Panels
» PCB ActiveRoute.
22. Enable both checkboxes in the PCB ActiveRoute Panel Layers section to allow ActiveRoute
to utilize both the Top and the Bottom layer when the command is activated. However, in our
case since we only have SMD Top-Layer pads on UI1 and ActiveRoute does not drop vias,
routes will only be placed on the Top Layer.
23. Click the ActiveRoute button in at the bottom of the panel, or select Route » ActiveRoute.
(Figure 227).

Figure 227. Active route completed.

24. Please continue routing the PCB using the various routing techniques discussed in this
exercise. Use Figure 11 as a guide. Please bear in mind that the PCB does not have to be
completely routed, due to time restrictions.

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 Figure 11. Routed PCB Example.

Routing Tips:
• Use Ctrl + Click on a net object to mask everything but the selected net for better
visibility of target locations.
• Use HugNPush routing mode for routing close to the bus routes or other traces.
• Press Shift + C to clear applied mask after a route.
• Use the bracket keys to increase [ and decrease ] the applied mask and can be used
during routing.
•Holding Shift + Alt while selecting connection lines will accumulate the selection.

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Exercise 21: PCB Global Editing

21.1 Purpose
This exercise will explore the four tools related to Global Editing: Properties Panel,
Filter Panel, Find Similar Objects and List Panel.

The global editing tools are available in the schematic, schematic symbol editor, PCB editor, and
footprint editors. We will focus on the PCB editor in this exercise.

21.2 Preparation
1. Close any open PCB projects. For this exercise, we will be using the WCTopping.PrjPcb
project located in the AD18 Essentials Exercises\PCB Global Editing folder.

21.3 Properties Panel

The Properties panel is used to modify properties for multiple objects easily. In this section, we
will use the mouse and Edit » Select commands to select items then use the Properties Panel to
make changes in both the Schematic and PCB editors.

21.3.1 Modify PCB Traces

2. Open the WCToppingGlobalEditing.PcbDoc document and zoom in on U1 as shown in
Figure 228.

Figure 228. WCToppingGlobalEditing.PcbDoc near component U1.

3. Ensure nothing is selected on the board. Then, open the Properties Panel from the Panel
button located in the bottom right corner of the editor. Ensure that the filter is set that all the
objects are highlighted in blue. Else, click on All objects. The same pre-selection filter can
also be accessed from the ActiveBar (shown in Figure 229).

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 Figure 229. Properties panel with the scope set to “All objects”.

4. Select multiple irregular traces quickly by using the Edit » Select » Connected Copper
command, or the hotkeys Ctrl+H then hold Shift while clicking on the four traces shown in
Figure 230.

Figure 230. Selecting Multiple Traces with the [Shift] key and "Connected Copper" command.

5. Right-click or hit Esc to terminate the command.

6. We now would like to change the widths of the selected tracks to 10mil. The Properties Panel
contain parameters and values of the selected objects. However, the visible values are
represented by * since there are different values for the selected objects.
a) As of right now, both tracks and pads are currently selected. Let’s change the
post-selection filter to only show properties of tracks by clicking on the down arrow button
at the top-right of the panel.
b) Then, ensure to only activate Track from the post-selection filter (refer to Figure 231).

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 Figure 231. Properties panel with the post-selection filter set to Tracks only.

7. In the Properties panel, locate the Width field and change the value from 15mil to 10mil. Hit
Enter. The modified layout is then shown in Figure 232.

Figure 232. Board layout with modified traces.

In this exercise, we use the Global Editing workflow to modify the trace width. An
excellent alternative to re-apply the preferred width and clearance requirements to an
existing route is the command Route » Retrace Selected.

21.4 Filter Panel

The PCB Filter Panel is another method to select items based on a query language. In the
examples in this section, we will once again use the Properties Panel to make changes after the
appropriate elements have been selected by the PCB Filter Panel.

21.4.1 Object Checkboxes

8. We will first familiarize ourselves with the checkbox options within the PCB Filter panel. Open
the PCB Filter Panel accessible via the Panels button in the bottom right corner of the editor.

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 9. Enable the Track checkboxes associated with Net and Component objects as well as the
Via checkbox for Net and Component object as shown in Figure 233. Notice that the Filter
field is populated with a query based on the combination of checkboxes you have selected.

Figure 233. PCB Filter Panel selections reflected in PCB.

10. Make sure that at the bottom of the PCB Filter Panel you have Matching set to Select,
Non-matching with Deselect enabled and with the mode set to Mask. Ensure that the filter in
the Properties Panel is set to All objects.
11. Click the Apply to All button in the bottom right corner of the panel to see the effect of the
query to the design.
12. Disable the Track on Component checkbox hit Apply to All again. Notice that the
component outlines have now been excluded from the selection on the board.
13. Enable the Top Layer checkbox in the Layer pane then click Apply to All.
14. Click the Clear button to reset the selection on the board.
15. Try enabling different combinations of the checkboxes then click Apply to All to see which
objects are selected.
16. Right-click in the top pane of the PCB Filter Panel and choose the Uncheck All checkbox to
reset the query back to Not All. Uncheck any selections in the Layer pane as well.

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21.4.2 Query Selection
17. In this section, we will build a query using the PCB Filter panel to select components having
designators starting with character C, and move them from the top to bottom layer.
18. To simplify the view, we will temporarily hide the tracks and vias. First, we will open the View
Configuration Panel by going to View » Panels » View Configuration Panel. Activate the
View Options tab and set the Tracks and Vias to hidden as shown in Figure 234.

Figure 234. Hiding tracks and vias.

19. Return to the PCB Filter panel. Enable the Component Free checkbox. IsComponent
should appear in the filter pane. Click Apply to All to select all the components in the PCB.
20. Add the following text to the Filter pane: and (Name like ‘C*’), then apply the changes.
The asterisk is a wildcard identifier. With this filter, any component that has a name beginning
with the letter ‘C’ will be selected. The selected components should now only be
components with designators starting with letter C as shown in Figure 235.

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 Figure 235. Components with designators starting from letter “C” selected via the PCB Filter panel.

21. Now modify the query from ‘C*’ to ‘C?’.

22. After you apply the change, only components with a single character following the letter ‘C’
will be selected.
23. Now that the nine capacitors are selected, open the Properties Panel via the Panels button in
the bottom right corner of the editor.
24. Ensure that the filter option at the top is configured to show Components, as shown in Figure
236.

Figure 236. Prepare Filter to be ready to change layer of selected components.

25. Then, locate the Layer attribute and change the value to Bottom Layer. The selected
capacitors should now be blue indicating they have been flipped to the back side of the board
as shown in Figure 237.

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 Figure 237. Nine capacitors flipped to the Bottom Layer.

26. While the nine capacitors remain selected, change their layer back to Top Layer in the
Properties panel.

21.5 Find Similar Objects

The Find Similar Object (FSO) dialog is another powerful way to select multiple items in either the
schematic or PCB environments. It allows you to choose a particular element in the design and
then identify one or more common parameters that will be used as the basis for global selection.

21.5.1 PCB Find Similar Objects Dialog

21.5.1.1 Selecting Vias
27. Let’s first unhide the tracks and vias by going to the View Configuration Panel (View » Panels
» View Configuration). Open the View Options tab and activate the Tracks and Vias. We
will now select vias of a specific size on this board and change their sizes.
28. Use Shift+C to verify that there are no objects currently selected or masked.
29. Right-click on the via located near UI1-14 and click Find Similar Objects as shown in Figure
238.

Figure 238. Invoking FSO from right-click menu.

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 30. The FSO dialog will appear, displaying via parameters as shown in Figure 239. Note that by
default the Object Kind is set to a scope of Same. Enable Mask in the scope settings to mask
the rest of the board.

Figure 239. FSO for selected via.

31. Click the Apply button to select all vias in the design as shown in Figure 240.

Figure 240. All vias selected by using FSO dialog with Object Kind set to Same.

21.5.1.2 Changing Via Size

32. Instead of all vias, we only would like to change the via diameter of the 30mil vias. In the FSO
dialog, set the column of the Via Diameter parameter to Same and click the Apply button.
Now only the larger vias of 30mil diameter are selected.

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 33. In the FSO dialog click the OK button to close the dialog.
34. Open the Properties Panel.
35. Change the filter for the Properties Panel to Vias. Locate the Via Diameter field and change
the value from 30mil to 20mil. Change Hole Size from 16mil to 10mil. Hit Enter and see
the changes made on the selected vias.

Figure 241. Properties Panel with new values for Via Diameter and Hole Size.

36. Hit Shift-C to return to standard board view.

21.6 List Panel

The PCB List Panel displays items from your design in a tabular format and is used for both
selecting and editing.

21.6.1 Selecting Components

37. We will now view attributes of selected components in a tabular form and lock their positions,
using the PCB List panel. Open the PCB List Panel through the Panels access button in the
bottom right corner of the editor.
38. Change the list settings at the top of the panel to match those shown in Figure 242 below.
Note that all objects are included in the PCB List Panel.

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 Figure 242. PCB List panel showing all objects in design.

39. Open Power Supply.SchDoc.

40. Ensure Cross Select Mode is turned on, indicated by its blue highlight in Tools » Cross
Select Mode (as shown in Figure 243). Else, click to enable it.

Figure 243. Cross Select Mode enabled.

41. Hold the Shift key to select the capacitors on Power Supply.SchDoc. Return to the PCB
editor and the five components should now be selected in this environment also.
42. In the PCB List panel, change the all objects blue link to selected objects. The PCB List
panel will now display only the selected components as shown in Figure 244.

Figure 244. PCB List Panel showing 5 components selected in the PCB.

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21.6.2 Modifying Properties
Our objective is to lock all of these selected components on the board. We will do this by
changing the Locked column in the PCB List Panel.
43. Enable the Locked checkbox for the first component in the PCB List Panel.
44. Click on the cell that you just locked and copy it with the Ctrl+C keys.
45. Select the locked cells for all the remaining four components by clicking on the first
unchecked one, hold the Shift key then click on the last cell.

Figure 245. Copy and Paste to quickly change multiple rows in the PCB List Panel.

46. Use the Ctrl+V keys to paste the locked property quickly as shown in Figure 245.

The same method can be used to copy and paste multiple parameters in the PCB List
Panel at the same time.

47. Try to move any of the five components you just locked to confirm they will not move.

Consider the circumstances where these batch replacement methods would help you
with your designs.

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Exercise 22: Polygons and Power Planes

22.1 Purpose
In this exercise, students will learn to place and edit polygons pours and power planes.

22.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\Polygons and Power Planes folder.
2. Open the WCTopping.PrjPcb project.
3. From the Projects Panel double click on the file WCTopping.PcbDoc to open the PCB
document.
4. Open Preferences and navigate to PCB Editor - General. Enable Repour Polygons
After Modification under Polygon Rebuild. This removes the need to manually repour the
polygons after every change.

22.3 Placing a Polygon Pour

5. We will be placing a polygon on the bottom layer. Click on the Bottom Layer tab at the
bottom of the PCB editor workspace to make it the active layer.
6. View the entire board area using the V - D hot keys.
7. Set the grid spacing to 10mil by pressing G and select 10 mil. Ensure to be on imperial
units, as indicated on the status bar – else, hit the Q key to toggle units from metric.
8. If it is not visible, enable the Heads Up Display (HUD) by pressing Shift + H as shown in
Figure 246. You can change HUD window opacity and options in Preferences, PCB
Editor branch, Board Insight Modes page.

Figure 246. Heads Up Display toggled with Shift+H keys.

9. Access the command Place » Polygon Pour (hot keys P - G).

10. Press Tab to edit the Polygon Pour… dialog as shown in Figure 247. Be sure to assign it to
the 5V net, check the Auto Naming checkbox, and ensure the option is selected in the
pull-down for Pour Over All Same Net Objects.

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 Figure 247. Polygon Pour dialog.

11. Click on the pause symbol to continue placing the polygon. Your cursor will turn into a
cross-hair indicating that you may begin drawing the polygon. Click on the board origin in the
bottom left corner – the HUD should indicate co-ordinates (0,0).

Figure 248. Heads-up Display (HUD) showing (0,0) co-ordinates.

12. Hit Shift + Spacebar until the HUD indicates Line 90/90 Horizontal Start to provide a right
angle for the polygon. Explore changing the corner mode by pressing Shift + Spacebar until
the HUD indicates Line 90/90 Vertical Start with Arc (radius: 100mil). While in this mode, use
the comma ‘,’ and period ‘.’ keys to increase/decrease the radius value.

13. If necessary, hit Spacebar to change from vertical to horizontal if necessary.

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 14. Complete the rectangular polygon as seen in Figure 249.

Figure 249. Polygon Pour added to the design.

22.4 Polygon Properties

15. Double-click on the newly created polygon on the Bottom Layer to open its Properties panel.
16. Ensure that the post-selection filter in the Properties panel is reset to have all objects
selected, as shown on Figure 250.

Figure 250. All objects selected in post-selection filter.

17. Change the Fill Mode to Hatched as in Figure 251 and click Apply. The polygon should then
repour.

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 Figure 251. Changing polygon fill mode.

18. In the design, go to Place » Polygon Pour Cutout define a region for the polygon cutout
directly within an area of the existing Bottom Layer polygon. Once defined, right click to
terminate the polygon outline and right click once more to exit polygon pour cutout placement
mode.
19. You should now see that once the polygon repours, there is a cutout and absence of copper
within the cutout region as in Figure 252.

Figure 252. Polygon cutout.

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22.5 Polygon Pour Manager
20. Click on the Top Layer tab at the bottom of the PCB editor to set it as the active layer. Notice
the multiple polygon pours on this layer and the specific clearances, as shown on Figure 253.
With multiple polygons overlapping, pour order or priority must be defined.

Figure 253. Polygon pours on top layer.

21. Open the polygon pour manager by going to Tools » Polygon Pours » Polygon Manager.
22. Within the Pour Order pane, we can change the pour order of the polygons. Select 12V_Top
polygon and click Move Down until it is moved all the way down to the bottom of the Pour
Order list (as shown in Figure 254). Click OK.

The polygon that is higher in the pour order will pour first, and the polygons lower in the
list will then pour around existing polygons with necessary clearance.

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 Figure 254. Polygon Pour Manager.

23. In the PCB, notice that the 12V_Top polygon is no longer visible when repoured since the
GND_Top polygon which floods the entire board is higher in the pour order. This is a
deliberate error and we should revert it back to the original order.
24. Open the polygon pour manager by going to Tools » Polygon Pours » Polygon Manager
and set the 12V_Top polygon back to the top of the pour order. Click OK to return to the PCB
and ensure to see the 12V_Top polygon poured on the board.

22.6 Flooding a Layer

25. We will now create a polygon which floods an entire layer of the board. Go to Tools »
Polygon Pours » Polygon Manager. Click on Create New Polygon from… then Board
Outline as seen in Figure 255.

Figure 255. Creating a polygon from board outline in the polygon manager.

26. Match the settings in the Polygon Pour dialog that pops up as shown in Figure 256 and click
OK.

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 Figure 256. Polygon pour dialog.

27. Ensure that this newly created polygon is last in the pour order and click OK to close the
Polygon Manager.

22.7 Editing Polygons

22.7.1 Editing an Edge
28. In the PCB editor, click on Bottom Layer from the layers tab to make it the active layer.
29. Navigate to the bottom of the board where the polygon manually created earlier in this
exercise was placed.
30. Left-click on the polygon to select it. If the first click selects the Polygon for the entire board,
click again.
31. Hover over the right vertical edge of the polygon (not at a vertex); the edge will be highlighted
by a thick white line and the cursor will turn into a 2-way arrow as shown in Figure 257.

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 Figure 257. Hovering over the right edge of the polygon.

32. Now click and hold the left mouse button; the cursor will become a crosshair and the HUD will
show that the Sliding Edge mode is active (Figure 258).

Figure 258. Moving right edge of a polygon using the Sliding Edge mode.

33. Slowly move the cursor to the left and the polygon edge slides to the left, becoming narrower.
Release the mouse button. Notice that you are constrained to only the x-direction ensuring
that the height of the polygon is unchanged.

22.7.2 Adding a Vertex

You can add a center vertex at any point on the edge of the polygon. Center vertices are also
automatically added or removed as the topology changes.
34. Select the same polygon as in Section 22.7.1. Hold Ctrl, position the cursor at the desired
location for the center vertex.

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 35. Left-click and move the mouse button while holding Ctrl. The new vertex will appear in the
desired location as a white square (Figure 259).

Figure 259. Adding a vertex to a polygon.

22.7.3 Deleting a Vertex

36. Select the same polygon as in Section 22.7.1. Click and hold a corner vertex then press
Delete. The cursor will turn into a crosshair, and the vertex will be removed reshaping the
polygon as shown below (Figure 260).

Figure 260. Deleting a vertex.

22.8 Controlling the Connection Style - Polygon

37. As of right now, all polygons are connected with a relief connect style as shown between the
pads of the headers on the top left of the board, and the GND polygon.

Figure 261. Relief connect style.

38. We would like to change the connections from relief connect to direct connect. In the PCB, go
to Design » Rules.
39. Click on Polygon Connect Style under Plane and select Polygon Connect to open the rule.

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 40. Set the Connection Style to Direct Connect, as shown on Figure 262. Click OK to return to
the board.

Figure 262. Polygon Connect Style Rule.

41. Go to Tools » Polygon Pours » Repour All (Figure 263). Note that the pads are now direct
connected to the pour.

Figure 263. Repoured polygon.

The design rule can be configured as both a simple and advanced mode. In Advanced
mode, you can set the connection styles for through hole, surface mount and via
connection.

42. To avoid design rule violations or automatic repour of polygons when routing on top of
existing polygons, polygons should be shelved. Polygons can be shelved through a couple of
different ways, e.g., by right-clicking on a polygon » Polygon Actions » Shelve All, or Tools
» Polygon Pours » Shelve Polygons or in Polygon Manager window.
43. Go to Tools » Polygon Pours » Shelve 6 Polygon(s). Note the number will vary depending
on the number of polygons on the board. Observe that all the polygons have disappeared.

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 44. Restore using Tools » Polygon Pours » Restore 6 Shelved Polygon(s).

22.9 Power Plane

45. Select GND from the layers tab, which is an internal plane.
46. Double-click in the board area to open the Split Plane dialog appears as shown in Figure 264.
Assign the net GND to the Power Plane.

Figure 264. Assign GND net to the internal plane.

47. Now, click on 5V from the layers tab and repeat the previous step to assign net 5V to the
plane.

22.9.1 Controlling the Connection Style – Power Plane

48. Like for the polygons, we can also control the connection style of pads/vias with the power
plane. Go to Design » Rules, navigate to Plane and open the page Power Plane Connect
Style.
Open the default PlaneConnect rule. Ensure the fields in this dialog is set as the following:
• Constraint: Simple
• Connect Style: Relief Connect
• Conductors: 4
• Conductor Width: 10 mil
• Air-Gap: 10 mil
• Expansion: 10 min
49. Click OK to close the window.
50. Note that the pads on the top left of the board should be connected with a relief connect to the
power plane. For clarity, you could also enter single layer mode by hitting Shift+S as shown
in Figure 265.

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 Figure 265. Relief Connect 5V in Single Layer View.

If any additional rules are added, ensure that the new rule has a higher priority than the
ALL scoped rule. Otherwise, the new rule will be ignored. Once the ALL scoping query
is encountered, it overrides lower priority rules for that category.

51. Save and close all files.

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Exercise 23: DRCs on PCBs

23.1 Purpose
In this exercise, students will run the batch Design Rule Check. Using the PCB Rules
and Violations panel, students will then inspect and resolve the violations.

23.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\DRCs on PCBs folder.
2. Navigate to the Projects panel and open WCT.PcbDoc.

23.3 Design Rule Check

3. Go to Tools » Design Rule Check to open the Design Rule Checker.
a) Enable Create Report File and Create Violations.
b) Click Run Design Rule Check… button on the bottom left (Figure 266).

Figure 266. Design Rule Checker.

4. The Design Rule Verification Report should generate, indicating 10 Rule Violations. Scroll
down to the Rule Violations section to see the violated rules. (Figure 267).
a) Un-Routed Net Constraint
b) Minimum Solder Mask Sliver

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 c) Silk to Solder Mask
d) Component Clearance Constraint

Figure 267. Rule violations in the report file.

5. Click on the first violation under the Un-Routed Net Constraint list in the report. It should then
open the PCB document and navigate to the violating area, which is near component IOS2.

23.4 PCB Rules and Violations Panel

6. Instead of using the report to navigate through the violations, we will use the PCB Rules and
Violations panel while in the PCB. While in the WCT.PcbDoc, click the Panels button on the
bottom right, and then select the PCB Rules and Violations panel from the menu (Figure 268).

Figure 268. Opening the PCB Rules and Violations panel.

7. This would open the PCB Rules and Violations panel. Dock this panel to the left of the
workspace (Figure 269).

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 Figure 269. PCB Rules and Violations panel.

8. Click on the Component Clearance Constraint violation in the Violations list at the bottom of
the panel. It should then navigate to the violating area. Instead of just zooming to the violating
area, we would also like to perform a mask of the other objects, to improve clarity.
9. In the PCB Rules and Violations panel, change the highlight options from Normal to Mask
(Figure 270).

Figure 270. Mask control in the PCB Rules and Violations panel.

10. Left-click on the Component Clearance Constraint from Violations list. The workspace
should zoom to the violating primitives and mask the rest of the board except for the
primitives
(Figure 271).

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 Figure 271. Violating primitives on the PCB.

11. Enable the Select checkbox from the PCB Rules and Violations panel and repeat the steps.
Notice that the violating primitives will now be selected.
12. To clear all the masks and selection, click the Clear button from the PCB Rules and
Violations panel or hit Shift+C on the keyboard.

23.5 Resolving Violations

13. Instead of running all the rules from the Design Rule Check window as described in the
previous section, we can run only selected design rules from the PCB Rules and Violations
panel.
14. Right-click on Un-Routed Net Constraint in the Rule Classes section of the PCB Rules and
Violations panel (Figure 272) and click Run DRC Rule Class (Un-Routed Net Constraint)
option from the popup menu to run the Design Rule Check.
15. Five violations of this rule type should be highlighted. Find these listed at the bottom of the
PCB Rules and Violations panel in the Violations section (Figure 273).
16. In the Violations pane of the panel, click on the first violation in the list to jump to component
IOS2. The Pad 4 should be highlighted along with Pad 3 of component UI1, and the rest of
the board is masked (Figure 274).

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 Figure 272. Rule classes.

Figure 273. Un-Routed Net violations.

Figure 274. Highlighted violations.

17. Since this is an Un-Routed Net Constraint violation, we will resolve it by routing a trace from
UI1-3 to IOS2-4 with Route » Interactive Routing. Repeat the previous steps for other
Un-Routed Net Constraint violations in the PCB Rules and Violations panel.
18. Repour the polygon by going to Tools » Polygon Pours » Repour All (Figure 275).

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 Figure 275. Routed nets with poured polygons.

19. Go to Tools » Design Rule Check and click Run Design Rule Check.
20. The Design Rule Verification Report should now show five rule violations (Figure 276).

Figure 276. Design rule verification report.

21. Open the PCB document and select the [All Rules] rule class from the PCB Rules and
Violations panel. Select the Component Clearance Constraint from the Violations section to
zoom to the offending primitives, J2 and J3.
22. Select the Component Clearance Constraint class from the Rule Class section to view its 3
rules (Figure 277).

Figure 277. Component clearance rule class.

23. Double-click on the last rule with the Scope All – All.
24. The Edit PCB Rule – Component Clearance window should open. Change the Minimum
Horizontal Clearance from 10mil to 5mil. Click OK (Figure 278).

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 Figure 278. Editing design rule.

25. Run the Design Rule Check again. The Design Rule Checker should now indicate four
violations. Return to the PCB document. Select [All Rules] rule class to view the four
violations. Select each of the violation to notice the same pad highlighted.
26. Click the Clear button from the PCB Rules and Violations panel.
27. Remove the GND tracks from component C8. Move component C8 to the left so that it is no
longer overlapping the violating pad. Route Pad 2 of component C8 to the GND via.
28. Repour all Polygons by going to Tools » Polygon Pours » Repour All (Figure 279).

Figure 279. Resolved design rule violations.

29. Run the Design Rule Check and ensure to have 0 violations.
30. Save your changes and close the document.

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Exercise 24: PCB Fabrication Files

24.1 Purpose
In this exercise, students will learn configure and export a Bill of Materials (BOM).
Additionally, an Output Job is added to the project to manage outputs including
documentation outputs, report outputs (BOM) and fabrication outputs like Gerber,
NC-Drill.

24.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\PCB Fabrication Files folder. Open any
of the schematic document, such as Digital_IO.SchDoc.

24.3 Bill of Materials

2. To generate a Bill of Materials (BOM), we can go to Reports » Bill of Materials.

Figure 280. Bill of Materials window.

3. Currently, multiple components appear on a single row because they are grouped by
Comment and Footprint parameters as shown in the upper left corner, Grouped Columns
pane. Drag these Comment and Footprint parameters into the pane immediately below it,
and the BOM will have one component per row.
4. Component parameters can be disabled/enabled by checking on their show checkboxes.
Columns can also be re-arranged by dragging their headers to the intended locations.
5. Component’s parameters in the PCB document such as their co-ordinates can also be made
visible by checking on Include Parameters from PCB (Figure 281). Then, PCB related
parameters such as Center-X (mm), Center-Y (mm) and Layer can be added to the
BOM.

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 Figure 281. BOM with parameters from PCB.

6. Under Export Options, select Microsoft Excel Worksheet (*.xls) as the file format. Click
Export to generate the report. Save the file to Desktop. Close the generated Excel file upon
opening.
7. Click OK to save and close the BOM dialog.

24.4 Output Job File

An Output Job file allows users to add, configure, and reuse a variety of output configurations. In
this exercise, you will define a single output job file containing all outputs we need for the working
project. The outputs will include schematic and PCB printouts, validation reports, Gerber, NC Drill
and a Pick & Place output.

24.4.1 Creating a New Output Job File

8. In the Projects panel, right-click on the project and go to Add New to Project » Output Job
File. A new output job file will be added to the project as shown in Figure 282.

Figure 282. Output Job File added to project.

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24.4.2 Defining Outputs
24.4.2.1 Documentation Outputs
9. In the Outputs pane, find the listing for Documentation Outputs.
10. Click [Add New Documentation Output] » PCB Prints » [PCB Document].
11. Click [Add New Documentation Output] » Schematic Prints » All SCH Documents.
12. Right-click on Schematic Prints output and click Page Setup. Ensure that its Color Set
option is set to Color (Figure 283).

Figure 283. Schematic Print Page Setup dialog.

Defining the data source as the generic [PCB Document], [Project] or [PCB Document]
instead of the specific file name would allow the Output Job file to be re-used in
multiple projects.

24.4.2.2 Assembly Outputs

13. Find the listing for Assembly Outputs.
14. Click [Add New Assembly Output] » Assembly Drawings » [PCB Document].
15. Click [Add New Assembly Output] » Generates Pick and Place Files » [PCB Document].

24.4.2.3 Fabrication Outputs

16. Find the listing for Fabrication Outputs.
17. Click [Add New Fabrication Output] » NC Drill Files » [PCB Document].
18. Click [Add New Fabrication Output] » Drill Drawings » [PCB Document].
19. Click [Add New Fabrication Output] » Gerber Files » [PCB Document].
20. Double-click on the Gerber Files output to open its Gerber Setup dialog. Open the Layers
tab. Click on Plot Layers and choose to plot used layers. Click OK (Figure 284).

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 Figure 284. Gerber setup.

24.4.2.4 Report Outputs

21. Find the listing for Report Outputs.
22. Click [Add New Report Output] » Bill of Materials » [Project].
23. Double click on the Bill of Materials output to open its BOM dialog. Here you can customize
the grouping and desired columns as explored previously. Click OK to close the dialog.

24.4.2.5 Validation Outputs

24. Find the listing for Validation Outputs.
25. Click [Add New Validation Output] » Electrical Rules Check » [Project].
26. Click [Add New Validation Output] » Design Rules Check » [PCB Document].

24.4.3 Defining Containers

24.4.3.1 PDF Container
27. In the Output Containers section on the right side of the Output Job File, click on PDF to
select it as shown in Figure 285. Then, click on the balloons in the Enabled column,
corresponding to the outputs to map it to the PDF container. Ensure to click in the order
shown in the figure.

Figure 285. Output Job File with outputs linked to PDF container.

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 24.4.3.2 Folder Container
28. In the Output Containers pane, select Folder Structure. Then, click on the balloons in the
Enabled column, corresponding to the outputs to map it to the PDF container. Ensure to click
in the order shown in Figure 286.

Figure 286. Output Job File with reports linked to Folder Structure container.

29. Save the output job file by going to File » Save. The outputs have now been created,
configured and mapped to their corresponding containers. Next, we will generate these
outputs.

24.4.4 Generating the Outputs

24.4.4.1 Generating the PDF
30. To create the PDF file of all seven outputs, highlight the PDF container and click on the
Generate content link as shown in Figure 287.
a) The PDF file will pop up after processing as shown in Figure 288 and will be saved to the
Project Outputs for WCTopping project sub-folder.

Figure 287. Running the PDF output.

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 Figure 288. PDF Output file containing all mapped outputs.

24.4.4.2 Generating the Folder Structure

31. The outputs mapped to the folder container will be generated like the PDF.
a) Click on the Generate content link in the Folder Structure section. Individual outputs will
appear as separate tabs in the Altium Design workspace and as folders under the
Generated section of the Projects panel as shown in Figure 289. These files are also
saved to the Project Outputs for WCTopping project sub-folder.

Figure 289. File Structure Reports added to Projects Panel.

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Exercise 25: Draftsman

25.1 Purpose
In this exercise, students will learn to create a Draftsman document which can then be
used as board production drawings for fabrication and assembly. Students will learn to
place board views (assembly/fabrication/drill drawing), tables (drill table, layer stack
legend, BOM) and other graphical notes or objects to improve clarity.

25.2 Preparation
1. Close all open projects. For this exercise, we will be using the WCTopping.PrjPcb project
located in the AD18 Essentials Exercises\Draftsman folder.
2. Open the WCTopping.PcbDoc and view it in 3D. In this exercise, we will learn to produce a
board production drawing of this PCB using Draftsman document.

25.3 Creating a Draftsman Document

25.3.1 Creating Draftsman From a Template
3. Open the new Draftsman document dialog with the command File » New » Draftsman
Document.
4. Select the Template Assy Drawing – Main views (rect. board 3x1). Ensure to point to the
WCTopping.PrjPcb and WCTopping.PcbDoc (Figure 290).
5. Click OK to generate the Draftsman document based off the chosen Draftsman template.

Figure 290. Create a new Draftsman document.

6. The Draftsman document created will have multiple assembly views of the board, as
pre-defined in the template. Go to File » Save As and save the Draftsman document as
WCTopping - Assembly View.PCBDwf to the project folder.

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 Document Templates like the Altium document template Assy Drawing – Main views
(rect. board 3x1) can be created with Altium Designer, to create your own template
available for your projects.

7. Go to Preferences. Expand the Draftsman branch and open the Templates page. The
path in this page currertly points by default to the Altium Draftsman template folder. The path
could be changed to a company-standard template folder if required.
8. Close the Preferences without saving.

25.3.2 Creating Draftsman Without a Template

9. Open the new Draftsman document dialog with the command File » New » Draftsman
Document. This time around, select [Default] as the template. Ensure to point to
WCTopping.PrjPcb and WCTopping.PcbDoc.
10. Click OK to generate an empty Draftsman document.
11. Go to File » Save As and save the Draftsman document as My Draftsman
WCTopping.PCBDwf.

25.4 Page Configuration

12. We will now define a sheet template for this Draftsman document. Open the Properties panel
and open the Page Options tab. Under the Formatting and Size pane, select Template and
from the Templates dropdown, select ANSI B Landscape (Figure 291).

Figure 291. Selection of a Template.

13. Click on the Parameters tab. In this tab, the PCB, system and project parameters will be
listed. However, the parameter DocumentNumber currently does not exist. We can add this
parameter by clicking on Add. Then, ensure that the parameter name is DocumentNumber
while the value being DOC1234 (Figure 292).

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 Figure 292. Adding DocumentNumber parameter.

25.5 Assembly View

14. We will first place assembly views or also known as mechanical views on our Draftsman
document. Go to Place » Board Assembly View. By default, the top-side view of the board
will be provided. Place this view in the middle of the document.
15. Right-click on the placed assembly view and click Copy. Then, right-click on an empty space
to the right of the assembly view and click Paste.
16. Double-click on the pasted assembly view to open its Properties panel. In the Properties
pane, change its View side to Right (Figure 293).

Figure 293. View side of Assembly View.

17. Repeat Steps 15 and 16 above twice, and change their View side to Left and Front,
respectively to place left and front assembly views onto the document. Move the views to the
appropriate locations, using the alignment indicators as a guide while moving (Figure 294).

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 Figure 294. Multiple assembly views of the board.

18. Double-click on the top side assembly view to open its Properties panel. Check on Show
Silkscreen and Show SMD and Through-Hole pads (as shown on Figure 295).

Figure 295. Show silkscreen and pads.

25.6 Fabrication View

19. We would now like to add fabrication views on a new sheet. To add a new sheet to this
document, simply right-click anywhere on the document and click Add Sheet.
20. To place fabrication views, go to Place » Board Fabrication View. By default, the top layer
of the board will be provided. Place this view on the left half of the document.

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 21. Right-click on the placed fabrication view and click Copy. Then, right-click on an empty space
to the right of the fabrication view and click Paste.
22. Double-click on the pasted fabrication view to open its Properties panel. In the Properties
pane, change its Layer from Top Layer to Bottom Layer (Figure 296).

Figure 296. Layer configuration for the fabrication views.

25.7 Additional Views and Dimensions

Detail, isometric and section views of the board can also be placed in the Draftsman document.
Various dimensions can then be placed on any of these views.
23. Return to the first page of the document containing the assembly views. Go to Place »
Additional Views » Board Isometric View and place the view on the bottom left of the page.
24. Currently, the components on the left of the board are too small and should be enlarged for
easier visibility.
a) We can place a detail view of this area by going to Place » Additional Views » Board
Detail View.
b) Then, draw a circle around the area which we wish to enlarge.
c) Place this detail view in an empty area on the page. If required, it can also be scaled up or
down in its Properties panel (Figure 297).

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 Figure 297. Scale attribute, available on all Drafsman views.

25. Section views of the board can also be placed, for better board representation. Go to Place »
Additional views » Board Section View and move the cursor towards the top side assembly
view.
a) Hit Spacebar to toggle between horizontal and vertical cut
b) Left-click to set the position of the cut line.
c) Then, move the cursor on either side of the cut line to set the view direction. Left-click
again to confirm the view direction.
d) Left-click again to place the section view in the desired location on the top left of the page
( Figure 298).

Figure 298. Assembly views with additional detail, isometric and section views.

26. We will now place linear dimensions on the top side assembly view by going to Place »
Linear Dimension. Then, left-click on the horizontal and vertical edges of the board (Figure
298). To change its units, double-click on the dimension and configure it in the Properties
panel.

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25.8 Tables
27. We will add a third page to this document by right clicking anywhere on the document and
click Add Sheet. Scroll down all the way to the newly created page.
28. On this third page, place the following objects with the default configuration (see Figure 299
as reference):
a) a Drill Drawing View Place » Additional Views » Drill Drawing View
b) a Drill Table Place » Drill Table
c) a Layer Stack Legend Place »
Layer Stack Legend
d) a BOM Table Place » Bill Of Materials

Figure 299. Drill Drawing, Drill Table, Layer Stack and BOM.

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Exercise 26: Schematic Symbol Creation

26.1 Purpose
In this exercise, students will learn the steps necessary to create a schematic symbol
by creating a custom crystal symbol.

26.2 Create a Crystal Symbol

26.2.1 Creating a Schematic Library
29. In your training folder create a new folder called My_Components.
30. In Altium Designer, go to File » New » Library » Schematic Library to create a new
schematic library (Figure 300).

Figure 300. A new schematic library.

31. Go to File » Save As and save the library as My_Symbols.SchLib in the newly created
My_Components folder.

26.2.2 Symbol Properties

32. We are now ready to start creating the symbol. The completed crystal symbol that we will be
building in this exercise is shown in Figure 301.

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 Figure 301. Completed crystal symbol for this exercise.

33. By default, every new schematic library will contain a default symbol with the name
Component_1 as shown in Figure 302. If you do not see the SCH Library panel, go to View »
Panels » SCH Library.

Figure 302. Default Component Name in SCH Library Panel.

34. Double-click on Component_1 in the SCH Library panel to open its Properties panel as
shown in Figure 303.
35. Locate Design Item ID of the component and enter Crystal as the new name.
36. Enter Y? in the Default Designator field.
37. In the Description field, enter 50MHz 20pF 20ppm.

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 Figure 303. Open Library Component Properties to modify symbol name.

38. Save the symbol library with the command File » Save.

26.2.3 Defining the Pins

A proper Snap Grid will simplify symbol creation. The ideal setting for this exercise is a grid of
50mil which you can verify in the Properties panel when nothing is selected in the editor (Figure
304). Hit G key to toggle the value to 50 mil, if it is currently 10mil or 100mil.

Figure 304. Snap Grid set to 50mil.

39. Go to Place » Pin and hit Tab to open its Properties panel. Configure the settings to match
those in the highlighted box of Figure 305. Hit the Enter key after you updated all fields to
continue pin placement.

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 Figure 305. Properties of Pin 1 in the Properties panel.

40. Notice that one end of the pin has a small X at one end as shown in Figure 306. This X
cross-hair define its electrical connection or hotspot. Use the X key to flip the pin horizontally
while the pin is floating to flip its orientation.

Figure 306. Pin with electrical hotspot on the left.

41. Using Figure 307 as reference, place pin 1 to the left of the origin.
42. After placing Pin 1, another pin will appear on the cursor with the pin name and designator
already incremented to 2. Ensure that the X cross-hair of this pin is on the right and the pin is
positioned to the right of the origin (Figure 307).
43. Right-click to exit pin placement mode.

Figure 307. Position pin 2 to the right of pin 1 separated by a pin length.

Each Pin has a single electrical hotspot on one end for a valid wire connection. When a
placed pin is moved the cursor automatically jumps to the hotspot. Click and hold on
each pin to confirm that the hotspot is positioned on the outer end of each pin, ready for
wiring.

26.2.4 Adding Symbol Body

44. To place the two vertical lines on the end of each pin, use the command Place » Line.

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 45. Press Tab key to open the Properties panel and set the Line Width to Medium and your
choice of color. Press Enter to continue the placement.
46. Draw the 2 lines as shown in Figure 308. Right-click to terminate each segment. Right-click a
second time when you are finished to terminate the command.

Figure 308. Adding lines to crystal symbol.

47. Go to Preferences, Schematic branch, and Defaults page. Select the object Round
Rectangle from the Primitive list and change both the Corner X Radius and Corner Y Radius
to 50mil. Click OK to apply this as default.
48. Go to Place » Round Rectangle command to add the central body for the crystal.
49. Hit the Tab key to open its Properties panel. Change the Border to Medium and select your
choice of color, Figure 309.

Figure 309. Round Rectangle dialog.

50. Draw the rectangle in the center of the symbol as shown in Figure 310 by clicking in the top
left corner then the bottom right corner. Right-click to terminate the command.

Figure 310. Adding the central body to the crystal.

51. Save the library by going to File » Save.

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26.3 Using the Symbol
26.3.1 Installing the Library
52. To install your new symbol library, open the Libraries panel by selecting Libraries from the
Panels button in the bottom right corner.
53. Click the Libraries… button in the top left corner of the Libraries panel.
54. The Available Libraries dialog will open.
55. Click on the Installed tab to view currently installed system libraries.
56. Click the Install button and choose the menu Install from file….
a) Navigate to the training folder My_Components and select My_Symbols.SchLib library
that you just created.
b) Click the Open button.

If your library file is not visible, be sure that the filter drop-down in the lower right corner
of the file browser window is set to Schematic Libraries (*.SCHLIB).

57. Your library should now be added to the list as shown in Figure 311.

Figure 311. My_Symbols.SchLib added to the Installed Libraries list.

58. Click the Close button in the Available Libraries dialog.

59. Back in the Libraries panel select My_Symbols.SchLib from the drop-down list. The crystal
symbol should appear as shown in Figure 312.

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 Figure 312. Crystal symbol appearing in Libraries panel.

26.3.2 Adding Symbol to Schematic

60. Create a new schematic document by going to File » New » Schematic.
61. Add the crystal symbol to the schematic by clicking on Place Crystal in the Libraries panel.
62. Do not close the schematic.

26.4 Revising the Symbol

26.4.1 Making a Change to the Symbol
63. Open the My_Symbols.Schlib. (If you have closed the window, use the command File »
Open » Recent Documents » My_Symbols.SchLib).
64. Double click the center body of the crystal and change the Fill color in the Properties panel
for the round rectangle to Yellow.
65. Save the library file.

26.4.2 Updating the Schematic

66. Open the new schematic document created earlier. The symbol on the schematic is still the
initial version where its fill is White. To update:
a) Go to Tools » Update from Libraries. Ensure to check on Fully Replace symbols on
sheet with those from library and click the Finish button.
b) Click Execute Changes in the ECO dialog, followed by Close. The symbol should then
be updated with the newest version, with a yellow-filled rectangle.
67. Close the schematic document without saving.

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Exercise 27: Footprint Creation

27.1 Purpose
In this exercise, students will learn the steps necessary to create a PCB footprint by
creating a HC49SMD package for the crystal symbol created earlier.

27.2 Creating a PCB Library

1. Create a new PCB Library by going to File » New » Library » PCB Library.

Figure 313. A new PCB Library.

2. Go to File » Save As and save the library as My_Footprints.PcbLib in the

My_Components folder created in the previous exercise.
3. By default, every new PCB footprint library will contain a default footprint with the name
PCBCOMPONENT_1 as shown in Figure 314. If you do not see the PCB Library panel, go to
View » Panels » PCB Library.

Figure 314. PCB Library Panel with default component PCBCOMPONENT_1.

4. Double-click on PCBCOMPONENT_1 and in the pop-up window rename the component to

HC49SMD, set the Height field to 4.5mm and add the Description HC49SMD-RoHS
Compliant

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 Figure 315 Configuration for the new Footprint.

27.3 Footprint Creation

A preview of the footprint we will be creating in this exercise is shown in Figure 316.

Figure 316. Crystal footprint that will be created in this exercise.

27.3.1 Setting the Grid

5. The footprint uses metric dimensions so hit the Q key to toggle workspace units to mm if
needed. Hit the G key to display the list of preset grid settings and choose a value of 0.5mm.
The grid value and the selected unit should now be visible in the lower left corner as shown in
Figure 317.

Figure 317. Grid setting in the bottom left corner of editor indicates 0.5mm.

To change the current grid markers and color press CTRL+G to open the Grid Editor.
Select the marker style Lines, Dots, or Do Not Draw and the color you prefer.

27.3.2 Adding Pads

6. To place a pad, go to Place » Pad.
7. Hit the Tab key to open its Properties Panel before placing it.
8. Change its Designator to 1. Check the parameters for the pad to match those shown Figure
318.

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 Figure 318. Pad Properties dialog with parameters for Pad 1.

9. Hit Enter or click the pause symbol to continue placement.

10. Left-click on the origin to place Pad 1 on the origin.
11. A second pad of the same shape and with Designator 2 is now attached to your cursor.
12. If it is not currently visible, turn on the Heads Up Display (HUD) by hitting Shift + H.
13. Slowly move the position of pad 2 until the HUD displays an incremental dx value of 9.5mm
and a dy value of 0mm as shown in Figure 319. Left-click to place Pad 2 at that position.

Figure 319. Heads Up Display showing incremental cursor position.

14. Right-click or hit the Esc key to terminate the command. The placed pads and their properties
should then be listed in the PCB Library panel (Figure 320).

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 Figure 320. PCB Library Panel showing two pads added for component HC49SMD.

27.3.3 Setting Component Origin

There are three options to set an origin for a component: Pin 1, Center or Location as shown in
Figure 321

Figure 321. Setting Component Origin from the Edit menu.

15. Assign the origin to the center of the existing pads by going to Edit » Set Reference »
Center. The resulting circle and diagonal lines indicating the component origin is shown in
Figure 322.

Figure 322. Component Origin set to Center.

27.3.4 Adding Top Overlay Outline

16. Switch to the silkscreen layer by clicking on the Top Overlay tab at the bottom of the
workspace.
17. Go to Place » Line command and hit the Tab key to set the line width to 0.2mm in the
Properties panel. Press Enter or click the pause symbol to continue the line placement
18. Now that we have a component origin, we can use the HUD to position the component outline
precisely. Move the cursor to the component origin at the center of the component and note
that the HUD reports an x and y value of 0.

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 The command Edit » Jump » New Location (J-L) with x:0 and y:0 or …Jump »
Reference (Ctrl+END) could help to find the correct position.

19. Using the HUD to guide you, move the cursor to location x: -6.000 y: 2.000 and click to
set the starting point for the line.
20. Move the cursor up and to the right to see the corner model. Press Shift + Spacebar to
change the shape of the corner and Spacebar to change the orientation until the HUD
displays Line 90 StartPlace Line as shown in Figure 323.

Figure 323. HUD displaying current line mode of 90 degrees.

21. Move the cursor to the following positions and left click to set the vertices:
• (-6.0, 3.5)
• ( 6.0, 3.5)
• ( 6.0, 2.0)
22. Right-click to terminate the line and right click again to terminate the command. The line
should now appear as in Figure 324.

Figure 324. The top portion of the Overlay added to the component.

23. We will use copy and paste to add the lower silkscreen shape. Drag a selection rectangle
around the yellow lines then press Ctrl + C to copy it to the clipboard. In the PCB editor,
Altium Designer requires a reference point for the copied object so that it can assign a local
origin. The cursor becomes a crosshair and a message is displayed at the bottom of the
screen: Select a reference point as shown in Figure 325. Click on the Origin to set it as a
reference point.

Figure 325. Copy the upper outline and set a reference point in preparation for pasting.

24. Hit Ctrl + V to paste a copy of the outline. Notice that the cursor is attached outside of the
horizontal line – the reference point you just selected.

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 25. Hit the Spacebar twice to rotate the objects, left-click to position the cursor on the origin so
that the line is now symmetrically below the pads as shown in Figure 326.

Figure 326. Copied bottom outline.

27.3.5 Add Pin 1 Marker

26. For soldering and debugging purposes, Pad 1 should also be visually marked. Use the
command Place » Full Circle to add a circle near Pad 1. Click at (-7.0, 2.0) then move one
grid unit to the right and click again to set the radius.
27. Double-click on the circle to open the Properties panel. Set the Radius to 0.12mm and hit
Enter. The component should now look like shown in Figure 327

Figure 327. Footprint HC49SMD.

28. Go to File » Save to save the library.

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27.3.6 3D Crystal Body
29. Go to Place » 3D Body from the menu.
30. Hit the Tab key to open its Properties panel. The dialog in Figure 328 will appear.
a) Set 3D Model Type to Extruded.
b) In the Identifier field, enter: HC49SMD
c) Choose a color for the extruded shape and change the opacity.
d) Set Overall Height = 6mm, Standoff Height = 1mm.
e) Press Enter or the Pause symbol to start drawing the body.

Figure 328. 3D Body Dialog for Crystal.

31. Draw a rectangle to match the silkscreen outline in the editor.

a) Similarly to the placement of a polygon, click the corner vertices.
b) Right-click or hit the ESC key to finish the drawing of the body.
32. The 2D footprint should now look like Figure 329 in 2D, with the purple diagonal lines
indicating the 3D body.

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 Figure 329. 2D Crystal Footprint.

33. Hit the 3 key to view the body in 3D mode Figure 330.

Figure 330. 3D Crystal Body and Footprint.

34. Go to File » Save to save the library.

27.4 Use the Footprint

27.4.1 Installing the Footprint Library
35. Open the Libraries panel, accessible via the Panels panel button in the bottom right corner.
36. Click the Libraries button in the top left corner of the Libraries Panel. The Available Libraries
window will open.
37. Choose the Installed tab.
38. Click the Install button and choose Install from File Figure 331.
39. Browse to your Training folder ...\My_Components, change the filter in the bottom right
corner to All Installable Libraries.
40. Click on My_Footprints.PcbLib and then click the Open button. Your footprint library will
now appear in the window as shown in Figure 331.

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 Figure 331. Available Libraries Panel with My_Footprints.PcbLib added.

41. Close the Available Libraries dialog.

27.4.2 Adding Crystal Footprint to PCB Document

42. In the Libraries Panel click on the three dots near the top and enable the Footprints
checkbox as shown in Figure 332.
43. Select My_Footprints.PcbLib from the drop-down list as shown in as shown in Figure
332.

Figure 332. Enabling Footprints in the Libraries Panel.

44. Create a new PCB document by going to File » New » PCB.

45. Click the Place HC49SMD button in the Libraries panel to add an instance of the crystal
footprint to the PCB document.
46. Hit the 3 key to view the component in 3D and ensure that the 3D body is visible.
47. Close the PcbDoc without saving it.

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Component Creation

27.5 Purpose
In this exercise, students will learn to link the Crystal symbol with its footprint, both
created in earlier exercises. A linked symbol and footprint is what we generally refer to
as a unified component.

27.6 Linking Footprint to the Symbol

1. Open your My_Symbols.SchLib created earlier from the “My_Components” folder.
2. Open the Crystal symbol from the SCH Library panel. If you do not see the SCH Library
panel, go to View » Panels » SCH Library.
3. In the Model pane at the bottom, click Add Footprint as shown in Figure 333.

Figure 333. The Model pane in the Symbol Editor Workspace.

4. The PCB Model dialog will open. Click Browse and the Browse Libraries dialog will open as
shown in Figure 334. Ensure to set My_Footprints.PcbLib as the active library. If not,
click on … browse button and install My_Footprints.PcbLib. Select the footprint
HC49SMD.

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 Figure 334. Link the HC49SMD footprint with the crystal symbol.

In the PCB Model dialog, there are 3 PCB Library options (Any, Library name and
Library path). If the Any option is chosen, it will search for the footprint that has
matching name in all currently available libraries. Thus, it is recommended for either
the library name or library path option to be used when working with passives or
generic footprint names which may be duplicated in multiple installed PCB libraries.

5. Click OK twice to dismiss both dialogs.

6. Note the crystal footprint preview in the Symbol Editor and shown in Figure 335. The crystal
footprint is now linked to the symbol.

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 Figure 335. Symbol Editor with linked footprint.

7. Save the library by going to File » Save. Close all documents.

27.7 Using Linked Component

Now we will test our linked component by adding it to a schematic, and then synchronize it with
the PCB.
8. Create a new project by going to File » New » Project » Project. Save the PCB project to the
Desktop. Add a Schematic and a PCB document. Save all files.
9. Open the Libraries Panel. You should see a preview for both the symbol and footprint of the
crystal as shown in Figure 336.

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 Figure 336. Libraries Panel showing symbol and footprint for crystal component.

10. Add the crystal symbol from your My_Symbols.SchLib library to the schematic.
11. Annotate the component by going to Tools » Annotation » Annotate Schematic Quietly.
Click Yes.
12. Disable Rooms by going to Project » Project Options » ECO Generation tab. Under
Modifications Associated with Components, look for Add Rooms. Change its mode to
Ignore Differences. Click OK.
13. Update the PCB by going to Design » Update PCB Document and click Execute Changes
in the ECO. Click Close.
14. View the crystal footprint in the PCB (Figure 337).
15. Change to 3D view by hitting the 3 key and rotate the view by holding Shift and right mouse
click/drag (Figure 338).

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 Figure 337. 2D Crystal in PCB Editor.

Figure 338. 3D Crystal in PCB Editor.

16. Close all files without saving.

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Exercise 28: Integrated Library Project

28.1 Purpose
In this exercise, you will recreate the WCT Integrated Library by creating a library
package project.

28.2 Preparation
1. Close all open projects and documents. For this exercise, we will be using files located in the
AD18 Essentials Exercises\Integrated Library Project folder.

28.3 Create Integrated Library Project

2. Create an Integrated Library Package Project using the menus:
File » New » Project » Project…. The New Project dialog will open as shown in Figure 339.

Figure 339. Create project dialog.

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 a) Select Integrated Library for the Project Type.
b) Name the project WCT by entering WCT into the Name field.
c) Uncheck the Create Project Folder checkbox; we will be using an existing folder.
d) Click the Browse Location button and select the AD18 Essentials
Exercises\Integrated Library Project\WCTintlib folder.
e) Verify the Project Kind is set to Regular.
f) Press the OK button to create the library project.
3. Add the WCT.SchLib and WCT.PcbLib libraries, which are available in the WCTintlib folder,
by right-clicking on the WCT.LibPkg project in the Projects panel and select Add Existing to
Project.

It is possible to select both using Ctrl + Left-click. Be sure that the drop-down filter in
the bottom right is set to All files (*.*)

4. Save the project. It should look like Figure 340.

Figure 340. WCTintlib.LibPkg Project.

5. Compile the project by selecting Project » Compile Integrated Library WCT.LibPkg.

6. The Messages panel will automatically appear if there are any errors, in this case, there is an
intentional error Cap10uf25V_0603: Could not find port ‘3’ on model ‘0603C_L’ for pin ‘3’.
(Figure 341).

Figure 341. Error highlighted in Messages panel.

7. Double-click the error in the Messages panel to jump to the symbol. Then select the symbol in
the SCH Library and notice that the pin tab of the Properties panel shows that the symbol has
Pins 1 and Pin 3, as shown in Figure 342.

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 If you have closed the Messages panel, it can be reopened in the path
View » Panels » Messages.
To open the Properties panel use the menus View » Panels » Properties.

Figure 342. Pin area of SCH Library panel.

8. Open the WCT.PcbLib to the 0603C_L footprint.

9. Notice that the Footprint Primitives area of the PCB Library panel shows that the 0603C_L
footprint has Pad 1 and Pad 2 (bottom of Figure 343), which do not match the schematic
Pins 1 and Pin 3 of Cap10uf25V_0603.

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 Figure 343. Primitive area of PCB Library panel.

10. Set the WCT.SchLib as the active document and Cap10uf25V_0603 as the active symbol.
11. Select Pin 3 in the workspace and change the value for the designator and the name to 2
(Figure 344), so that it matches the pad in 0603C_L.

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 Figure 344. Pin properties.

12. Save the WCT.SchLib and compile the integrated library again by right-clicking on the
project name in the Project panel and select Compile Integrated Library WCT.LibPkg.

The Messages panel does not open automatically if there are not any errors. The
messages panel can be opened from View » Panels » Messages.

13. Notice that the error Could Not Find Port error has been resolved in the Messages panel
but, there are still some warnings for Could Not Find Footprint, Figure 345.
14. Extra footprints have been linked to the symbols shown in these warnings, but the footprints
were not included in the PCB library.

Figure 345. Removing extra models from the Models area of the Schematic Library Editor.

15. Double-click each ‘footprint not found’ warning in the Messages panel to jump to the symbol
with the invalid footprint link Figure 346.
a) Remove the model named in the warning by pressing the Remove button.

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 Figure 346. Remove links for footprints from SCH Library.

16. Save the schematic library.

17. Compile the project by selecting Project » Compile Integrated Library WCT.LibPkg.
a) Open the Message panel.
b) Verify there are no errors or warnings listed.
18. Verify the Integrated Library has been generated in the \AD18 Essentials
Exercises\Integrated Library Project\WCTintlib\Project Outputs for WCT
folder.
a) Right-click on the project name in the Project panel and select Explore to browse the
folder.
b) Navigate to the Project Outputs subfolder to verify that it contains the WCT.IntLib file.

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28.4 Using the New Library
When opening an Integrated Library, a prompt to Extract or Install the library will open.
19. Close all projects and files in the Projects panel.
a) Select File » Open.
b) Navigate to the Project Outputs for WCT folder.
c) Select the WCT.IntLib file and click Open. The popup window shown in Figure 347 will
appear.
d) Select Install Library. Note: the library will already have been installed as it gets added
during the compile process.

Figure 347. Opening the WCTopping.IntLib.

If you select the Extract Sources button when you open an integrated library, Altium
will create a new library project and decompile the file into the SchLib and PcbLib files,
allowing you to edit the libraries. You can then recompile these edited files to update
the IntLib.

20. Open the Libraries panel and select the new library from the drop-down list. You will see the
symbol and footprint previews.

Congratulations you finished all exercises

In this course, we have covered many topics for SCH and PCB within Altium
Designer, but it is impractical for us to cover everything. Use the links below to find
additional information to help you in your learning process.

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Getting help
For further assistance, there are a variety of resources open to you:

Local support for your region

to contact Altium for your region visit http://www.altium.com/support
to contact your local reseller visit http://www.altium.com/how-to-buy

Visit www.altium.com
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Visit http://www.altium.com/documentation
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to all available Altium resources (reference help, articles, white papers, tutorials, videos, forums,
solutions, user generated content), but will also be a place for all engineers (you) to share their
knowledge, experience and expertise.

Visit http://live.altium.com/
User forums
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(This forum is only for Altium Designer technical and product related discussions. Altium technical
staff participates directly in this forum)

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This course was assembled on Monday, February 5, 2018 at 06:38 from the following modules:
A ACE_Course_FrontPage AD18_EN.docx
A ACE_CopyrightNotice AD18_EN.docx
A ACE_TableOfContents.docx
1 AD18 Module 2 Design Environment.docx
2 AD18 Module 3 It Starts with a Project.docx
3 AD18 Module 5 Schematic Preferences.docx
4 AD18 Module 6 Navigation Schematics.docx
5 AD18 Module 7 Schematic Capture.docx
6 AD18 Module 8 Making the Connection.docx
7 AD18 Module 9 Schematic Updating.docx
8 AD18 Module 10 Schematic Graphics.docx
9 AD18 Module 11 Compiling in Altium Designer.docx
10 AD18 Module 12 Adding Hierarchy.docx
11 AD18 Module 13 Transfer to PCB.docx
12 AD18 Module 21 Updating the PCB.docx
13 AD18 Module14 - PCB Introduction.docx
14 AD18 Module 15 PCB Navigation.docx
15 AD18 Module 16 PCB Layers.docx
16 AD18 Module 17 Shaping the PCB.docx
17 AD18 Module 18 PCB Grids.docx
18 AD18 Module 19 PCB Rules and Panels.docx
19 AD18 Module 20 PCB Placement.docx
20 AD18 Module 22 PCB Routing.docx
21 AD18 Module 23 PCB Global Editing.docx
22 AD18 Module 24 Polygons and Power Planes.docx
23 AD18 Module 25 DRCs on PCBs.docx
24 AD18 Exercise - PCB Fabrication Files .docx
25 AD18 Module 26 - Draftsman.docx
26 AD18 Exercise - Schematic Symbol Creation.docx
27 AD18 Exercise - Footprint Creation.docx
28 AD18 Exercise - Component Creation.docx
29 AD18 Exercise - Integrated Library Project.docx
A ACE_Course_LastPage_Exercise AD17_EN.docx

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