Microprocessors and

Microcontrollers
Unit 1
Formative Assessment
Ashesh B Vignesh
110110013
I.C.E. Department
2010 2014 Batch

Introduction
Definition: A microprocessor is a multipurpose,
programmable, clock driven, register based
electronic device that reads binary instructions
from a storage device called memory, accepts
binary data as input and process data
according to those instructions and provides
results as output

Introduction
Basically, very similar to human brain

Physical Components are called hardware

Set of instructions written for microprocessor

called a program
A group of programs is called software
8085 is an 8 bit microprocessor
8086 is a 16 bit microprocessor

Microprocessor as a CPU (MPU)

Traditionally the computer is represented by a) in

figure
Diagram shows that has four components:
memory, input, output and the CPU, which
consists of the ALU
CPU contains various registers to store data, the
ALU to perform arithmetic and logical operations
etc.
It communicates with I/O devices either to accept
or send data
These devices are also known as peripherals
CPU is the primary and central player in

Microprocessor as a CPU (MPU)

It became possible to build the CPU on a single

chip: this came to be known as a microprocessor

The new block diagram is shown b)
A computer with a microprocessor as its CPU is a
microcomputer
c) shows the microcontroller chip also includes
additional devices such as an A/D convertor,
serial I/O etc.

Microprocessor as a CPU (MPU)

Memory
Memory stores such binary informations as

instructions and data

Provides that information to microprocessor when
necessary
To execute programs, microprocessor reads
instructions and data from memory
There are two type of memory
Read Only Memory (ROM)

Read/Write Memory (R/WM) also known as (RAM)

ROM
ROM is used to store programs that do not need

alterations
Monitor program of a single board
microcomputer is stored in ROM
Programs stored in ROM can be only read, not
altered

RAM
RAM is also known as user memory

It is used to store user programs and data

In single board microcomputers, the monitor

program monitors the HEX keys, and stores

those instructions and data in RAM
The information stored in this memory can be
easily read and altered

MPU initiated operations and BUS

organization
MPU performs primarily performs 4 operations
Memory Read
Reads data or instructions from memory
Memory Write
Writes data or instructions into memory

I/O Read
Accepts data from input devices
I/O Write
Sends data to output devices

MPU initiated operations and BUS

organization
Operations are part of communication process

between the MPU and peripheral devices

To communicate with peripheral, MPU needs to
perform following steps:
Step 1: Identify the peripheral or the memory location

Step 2: Transfer binary information

Step 3: Provide timing or synchronization signals

Provides functions using 3 sets of communication

lines:
Address bus, Data bus and Control bus

8085 Bus Structure

Address Bus
Address bus is group of 16 lines generally

identified as 0 to 15
Address bits are unidirectional from MPU to
peripheral devices
The MPU uses the address bus to perform the
first step
Each memory location is identified by a binary
number called address
Address bus is used to carry a 16 bit address

Data Bus
Data bus is a group of 8 lines used for data flow

These lines are bidirectional data flows

between MPU and memory and perihperal

MPU uses data bus to perform step 2
8 data lines enable MPU to manipulate 8 bit
data ranging from 00 to FF
Largest number that can appear on data bus is
11111111 (25510)

Control Bus
Comprised of various single lines that carry

synchronization signals
Uses such lines to perform step 3
These lines provide a pulse to indicate an MPU
operation
MPU generates specific control signals for every
operation it performs
These signals are used to identify a device type
with which the MPU intends to communicate

8085 Architecture
8085 is an 8 bit general purpose

microprocessor
Capable of addressing 64K of memory

Device has forty pins

Require a +5V single power supply
Can operate at 3 MHz single phase clock

8085 Logic Pinout and Signals

Signals of 8085
There are 6 groups of control and status signals
Address Bus
Data Bus
Control and Status signals
Power supply and frequency signals

Externally initiated signals

Serial I/O Ports

Address Bus
8085 has 16 pins used as address bus
Split into two segments: A15 A8 and AD7 AD0

A15 A8 are unidirectional

Used for most significant bits called high order

address
AD7 AD0 are used for a dual purpose

Multiplexed Address/Data Bus

AD7 AD0 are bi directional and serve dual

purpose
Used as low order address bus and data bus
When executing instruction:
Earlier part of cycle: low order address bus
Later part of cycle used as data bus
Known as multiplexing the bus

Low order bus can be separated by using a

latch

Control and Status signals

There are 6 main signals

Two control signals

and

Three status signals

/, 1 and 0
Identify the nature of the operation

One special signal

Indicate beginning of operation

Control Signal
Read
A Read control signal (active low)
Indicates selected / or memory device is to be

read
Indicates data available on the data bus
Write
Write control signal (active low)
Indicates the data on data bus are to be written into

selected memory or / location

Status Signals
/ - Input/Output or Memory
Signal used to differential between I/O and memory

operation
When High, it indicates I/O operation
When Low, it indicates memory operation
Combined with and to generate I/O and
Memory control signals
1 and 0
Similar to

Can identify various operations but rarely used in

small systems

Machine Cycle Status and Control

Signal

Power Supply and Clock

Frequency

+5 V Power Supply

Ground Reference

1 , 2
A crystal (or RC, LC) network is connected at these

two pins
To operate at 3 MHz, crystal should have a
frequency of 6 MHz
()
Clock output: This signal can be used as the system

clock for other devices

Externally Initiated Signals, Including

Interrupts
8085 has 5 interrupt signals
Used to interrupt program execution

Microprocessor acknowledges an interrupt

request by (Interrupt Acknowledge) signal

Three pins - , and
Accept externally initiated signals as input

Interrupts
To respond to Request, there is a signal

called (HOLD Acknowledge)

:
: When signal in this pin goes low,

program counter set to zero

Buses are tri stated and MPU is reset

: Indicates that MPU is being reset

Cen be used to reset other devices

The other interrupts are shown in the table

Interrupt signals

Serial I/O Ports

There are two signals to implement serial

transmission
(Serial Input Data)
(Serial Output Data)

During serial transmission, data bits are sent over

a single line, one bit at a time, such as the

transmission over telephone lines

Detailed look at 8085 architecture

The 8085 consists of the following:
ALU (Arithmetic/Logic Unit)
Timing and Control Unit
Instruction Register and Decoder
Register Array

Interrupt Control
Serial I/O Control

Block Diagram of 8085 Architecture

The ALU
Performs computing functions

Includes:
The accumulator
Temporary register
The arithmetic and logic circuits
Five Flags

The temporary register holds date during an

arithmetic/logic operation
Result stored in accumulator
Flags are set or reset according to the result of
the operation

ALU Flags
S Sign flag
After an arithmetic or logic operation, if bit 7 of the

result (usually in accumulator) is 1, the Sign flag is

set
In a given byte, if 7 is 1, number is negative,
otherwise if 0, it is positive
In arithmetic operations with signed numbers, bit 7
is reserved for indicting sign
Remain 7 bits are for magnitude of number
For unsigned numbers, value of bit 7 is irrelevant
to the sign of number (positive or negative)

ALU Flags
Z Zero Flag
Zero flag is set if ALU operation results in 0
Flag is reset if result is not 0
Flag is modified by results in accumulator as well as

other registers
AC Auxiliary Carry Flag
In arithmetic operation, when carry is generated by

bit 3 and passed to 4 , AC flag is set

Used only internally for Binary Coded Decimal
(BCD) operations
Not available for programmer to change sequence
of program with jump instruction

ALU - Flags
P Parity Flag
If result of operation has an even number of 1s, flag

is set (e.g. 0000 0011)

If there is odd number of 1s, flag is reset (e.g. 0000
0111)
CY Carry Flag
If operation results in carry, the Carry flag is set
Otherwise, reset
Also serves as the borrow flag for subtraction

ALU - Flags
The bit positions reserved for these flags in the

flag register are as follows

AC Flag is used internally for BCD arithmetic

Instruction set does not include any conditional

jump instructions based on the AC flag

Z and CY flags are most commonly used

Timing and Control Unit

This unit synchronizes all operations with clock

Generates control signals necessary for

communication between processor and

peripherals
Similar to a sync pulse in an oscilloscope
The and signals are sync pulses
Indicating availability of data on data bus

Instruction register and Decoder

Instruction register and Decoder are part of ALU

When instruction is fetched from memory. It is

loaded in the instruction register

Decoder decodes instruction and establishes
sequence of events to follow
Instruction register is non programmable and
not accessible through instructions

8086 microprocessor
Inter iAPX 8086 is a 16 bit microprocessor

Housed in 40 pin package

Capable of addressing 1 MB of memory
Various versions can operate with clock

frequencies from 5 MHz to 10 MHz

8086 Architecture
The 8086 has a 16 bit external data bus

Signals of the 8086 are classified in seven

categories
1)
2)
3)
4)
5)
6)
7)

Address bus
Data Bus
Control and status signals
External requests
Response to external requests
Power and clock
Signals for micro processing environment

The first six categories are the same as the 8085

8086 Architecture Figure

8086 Architecture
The 7th category, Signals for multiprocessor

environment, is a new
It includes 2 signals
/ (minimum or maximum mode)
Test

The data bus and status signals are multiplexed

with the address bus

16 data lines, 15 0 are multiplexed

Signals different from 8085

/ - Minimum/Maximum mode
Represents two operation modes; minimum and

maximum
When signal is high (connected to +5 V): Minimum
When signal is low (grounded): Maximum
Minimum mode used for single processor
environment
Maximum mode used for multiprocessor
environment
In Maximum mode, 8 pins assigned different
functions as compared to maximum mode
Bus controller is necessary to generate control signals

Minimum/Maximum mode control

signals

Signals different from 8085

Test
Used to synchronize operations of multiple

processors in a system
When WAIT instruction is being executed,
processor checks this signal
If high, processor interrupts execution of program
If low, it continues execution
- Data Enable
Active low output signal
Generally connected to bidirectional buffer to isolate

MPU from system bus

Signals different from 8085

/ - Data Transmit/Receive
Connected to a bidirectional buffer to enable data

flow
/ - Memory and I/O
Indicates whether processor cycle is I/O operation

or memory operation
- Bus High Enable
Active low signal used to enable the high order

byte of 16 bit data

Stack
Stack can be described as a set of memory

locations in R/W memory

Beginning of the stack is defined in the program
by using instruction LXI SP
Loads a 16 bit memory address in the stack

pointer register of the micro processor

Once stack location defined, storing of data bytes

startsat the memory address that is 1 less that

the address in the stack pointer register

Stack
As a general practice, the stack is initalized at the

highest avaible memory location

To prevent the program from being destroyed by the

stack information
Size of stack is limited only by

Data bytes in register pairs of the microprocessor

can be stored on the stack

Stored (two at a time) in reverse order (decreasing

memory address)
By using instruction PUSH

Stack
Data byte can be transferred from stack to

respective registers by using instruction POP

Stack pointer register tracks the storage and
retrieval of the information
Because two bytes are stored at a time
16 bit memory address in stack pointer register is

decremented by two
When retrieved, address is incremented by two

Stack

Stack

Subroutine
Group of instructions written separately from main

program to perform a function that occurs

repeatedly in the main program
There are two instructions to implement
subroutine
CALL (Call a subroutine)
RET (Return to main program)

Subroutine
When subroutine is called, the contents of the

program counter is stored on the stack

Program execution is transferred to subroutine
address
When RET is executed, memory address stored
on the stack is retrieved and sequence of
execution is resumed to main program

Subroutine

Registers
The operations with the microprocessor performs

are:
Store 8 bit data
Perform arithmetic and logical operations
Test for conditions

Sequence for execution of instructions

Store data temporarily during the execution in the

defined R/W memory locations called stack

Registers
To perform operations, the microprocessor

requires registers, ALU, and BUS

Registers store data or instructions
There are a total of 9 registers which is of
importance
6 General Purpose registers
2 Special Registers
1 Main Register

Registers

Registers
The 6 general purpose registers are: B, C, D, E,

H and L
Each register is 8 bits long
Can be combined to give register pairs
B-C, D-E, H-L

Each register pair will then be 16 bits long

Registers
The accumulator is an 8 bit register that is part of

the ALU
This register is used to store 8 bit data and to
perform arithmetic and logical operations
Used as a register for storing on data when two
are arithmetically operated
The result of the operation is stored also in the
accumulator which is identified as A.
When only one data is to be logically operated, A
is used for storing data and for storing result after
operation

Special Registers
The program counter (PC) is a 16 bit special

function register in the 8085 microprocessor.

Sequences execution of instruction
Keeps track of memory address of next
instruction once current is executed
In other words, holds address of memory of next
instruction when current instruction is completed
When user enters a memory address and
presses execute key, it is pushed into PC
Once processor begins execution, it places the
memory address user entered into address bus

Program Counter
The address in PC is incremented for next

operation
Once execution is done, the next address in
placed on address bus, and PC is incremented
again
It basically points next location of memory where
data can be stored

Stack
Stack can be defined as:
A set of memory locations in the R/W memory,

specified by a programmer in a main program

These memory locations are used to store binary

information (bytes) temporarily during execution

of a program
The location of the stack is defined by the stack
pointer
The stack pointer is a 16 bit register
Used as a memory pointer to identify the stack
Used when interrupt is generated by
microprocessor

Stack
The beginning of the stack is defined in the

program by using the instruction LXI SP (e.g. LXI

SP, 2099H)
This instruction loads a 16 bit memory address
in the stack pointer
Once stack location defined, storing of data bytes
begins at memory address that is one less than
address in SP
For example, if SP is loaded with address 2099H,
the storing of data bytes begins at 2098H
The rest of the data is stored in reverse order
(2097H, 2096H...)

Stack
We call this as the stack growing backwards

Hence, stack is initialized at highest available

memory location to prevent program from being

destroyed
The size of the stack is limited only by the
available memory
The 8085 provides two instructions: PUSH and
POP for storing information on the stack and
retrieving it back
Information is saved on the stack by PUSHing it
on
It is retrieved from the stack by POPing it off.

PUSH
PUSH is a 1 byte instruction

Example: PUSH B (B has value 12 and C has

value F3)
The process of how PUSH works:
First, decrease SP by one
Then copy contents of register B to memory

location pointed now by SP after decrement

Decease SP by one again
Copy contents of register C to location pointed by
SP

POP
POP is a 1 byte instruction

For example POP D (used after PUSH B from last

slide)
Process of how POP works:
Copy contents of memory location pointed by SP to

register E
Increase the SP by 1
Copy contents of memory location pointed by SP to
register D after increment
Increase SP

Stack
Note: operands B, D and H represent register

pairs BC, DE and HL respectively

During pushing, the stack operates in a
decrement then store style.
The stack pointer is decremented first, then the

information is placed on the stack.

During popping, the stack operates in a use then

increment style.
The information is retrieved from the top of the

stack and then the pointer is incremented.

The SP pointer always points to the top of the

stack.

LIFO
LIFO is an acronym
When expanded, it becomes Last In First Out
This is how the stack operations work, where the last

byte to be stored will be retrieved first

To retrieve information back into original location, one
must make order of PUSH and POP opposite to each
other
Example:

PUSH B
PUSH D
POP D
POP B

If the POP instructions are reversed, there will be an

exchange of contents of BC and DE register pairs

8 Bit Addition
Start program by loading the first data into

accumulator
Load the second data into other register
Add the contents of the two registers
Check for carry
Store the value of sum and carry in memory
location
Terminate the program

Program
Loop

LOOP

Memory
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E
410F
4110
4111
4112
4113
4114
4115

Instruction
MVI C, 00H
LDA, 4200H

MOV B,A
LDA, 4201H

ADD B
JNC 410EH

INR C
STA, 4400H

MOV A, C
STA, 4401H

HLT

Op Code
OE
OO
3A
OO
42
47
3A
O1
42
80
O2
0E
41
OC
32
OO
44
79
32
O1
44
76

Comment
Initialise C to 00H
Load the 1st data in A
Move Content of A to B
Load the 2nd data
Add B to A
Jump on no carry
Increment content of S
Store the content of A to 4400H
Move the content of C to A
Store the content of A to 4401H
Terminate the Program

16 Bit addition
Algorithm

Start the program by loading HL register pair with

address of 1st number.

Copy the data to DE register pair.
Load the second number to HL pair.
Add the two register pair contents.
Check for carry.
Store the value of sum and carry in memory
locations.
Terminate the program.

Program
Loop

LOOP

Memory
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
420A
420B
420C
420D
420E
420F
4210
4211
4212
4213
4214
4215

Instructions
MVI C, OO
LHLD 4500

XCHG
LHLD 4502

DAD A
JNC LOOP

INR C
SHLD 4100

MOV A, C
STA 4102

HLT

Opcode
OE
OO
2A
OO
45
EB
2A
O2
45
19
D2
OE
42
OC
22
OO
41
79
32
O2
41
76

Comment
Initialize C a 0
Load address of 1st number to HL pair
Copt 1st number to DE pair
Load address of 2nd number to HL pair
Add HL pair with DE pair
JUMP on no carry to the label LOOP
Increment C by 1
Store HL pair content to 4100
Contents of C copied to A
Store accumulator content to 4102

Program Ends

8 Bit subtraction
Start the program by loading the first data into

accumulator
Load the second data into other register
Subtract the second register data from the
accumulator
Check for positive
Store the result in some memory location
Terminate the program

Program
Loop

LOOP

Memory
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E
410F
4110
4111
4112
4113
4114
4115

Instruction
MVI C, 00H
LDA, 4200H

MOV B,A
LDA, 4201H

SUB B
JP LOOP

DCR C
STA, 4300H

MOV A, C
STA, 4301H

HLT

Op Code
OE
OO
3A
OO
42
47
3A
O1
42
90
F2
0E
41
OD
32
OO
43
79
32
O1
43
76

Comment
Initialise C to 00H

Load the first Data

Move contents of A to B
Load the 2nd data
Subtract B from A

Jump if Positive
Decrement C
Store value in A
Move contents to C
Store value in A
Terminate Program

16 Bit Subtraction
Start the program by loading HL register pair with address of

1st number.
Copy the data to DE register pair.
Load the second number to HL pair.
Copy data in register E to Accumulator.
Copy date in register L to register B.
Subtract data in register B from Accumulator.
Check for carry.
If carry is present take 2s complement of Accumulator.
Store the difference value in the memory location.
Copy data in register D to Accumulator.
Subtract data in register H from Accumulator along with borrow.
Check for carry.
If carry is present take 2s complement of Accumulator.
Store the difference value and borrow in the memory location.
Terminate the program.

Program
Loop

Memory

Instructions

Opcode

4400

LHLD 4600

2A

4401

OO

4402

46

4403

XCHG

EB

4404

LHLD 4602

2A

4405

O2

4406

46

4407

MVI C, 00

4408

OE
OO

Comment

Load 1st number's address to HL pair

Exchange between HL and DE pair
Load address of 2nd number to HL pair

Initialize C as 0

4409

MOV A, E

7B

Copy contents of E to accumulator

440A

MOV B, L

45

Copy content of register L to B

440B

SUB B

90

Subtract B from Accumulator

440C

JNC LOOP

D2

440D

11

440E

44

Jump on no carry to label LOOP

440F

CMA

2F

Compliment accumulator content

4410

INR A

3C

Increment accumulator content by 1

Program
LOOP

LABEL

4411

STA 4300

32

4412

OO

4413

43

Store accumulator content to 4300

4414

MOV A,D

7A

Copy content of D to accumulator

4415

SBB H

9C

Subtract content of H from accumulator with borrow

4416

JNC LABEL

D2

4417

1C

4418
4419
441A
441B

INR A

44
OC
2F
3C

441C

STA 4301

32

INR C
CMA

441D

O1

441E

43

441F

MOV A, C

79

4420

STA 4302

32

4421

O2

4422

43

4423

HLT

76

Jump on no carry to label LABEL

Increment C by 1
Compliment accumulator content
Increment accumulator content by 1

Store accumulator content to 4301

Copy carry to accumulator

Store the accumulator content to 4302
Program ends

8085 Instruction Set

We shall now see the 8085 instruction set

MOV
Copy from source to destination

MOV Rd, Rs
M, Rs
Rd, M
This instruction copies the contents of the source

register into the destination register

The contents of the source register are not
altered
If one of the operands is a memory location, its
location is specified by contents of the HL
registers.

MVI
Move immediate 8-bit

MVI Rd, data

M, data
The 8-bit data is stored in the destination register

or
M, data memory
If the operand is a memory location, its location is
specified by the contents of the HL registers
Example: MVI B, 57H or MVI M, 57H

LDA
Load accumulator

LDA 16-bit address

Contents of a memory location, specified by a 16-

bit address in the operand, are copied to the

accumulator
The contents of the source are not altered
Example: LDA 2034H

LDAX
Load accumulator indirect

LDAX B/D Reg. pair

The contents of the designated register pair point
to a memory location
This instruction copies the contents of that
memory
location into the accumulator
The contents of either the register pair or the
memory location are not altered
Example: LDAX B

LXI
Load register pair immediate

LXI Reg. pair, 16-bit data

The instruction loads 16-bit data in the register

pair designated in the operand

Example: LXI H, 2034H or LXI H, XYZ

LHLD
Load H and L registers direct

LHLD 16-bit address

The

instruction copies the contents of the

memory location pointed out by the 16-bit
address into register L
It copies the contents of the next memory location
into register H
The contents of source memory locations are not
altered
Example: LHLD 2040H

STA
Store accumulator direct

STA 16-bit address

The contents of the accumulator are copied into

the memory location specified by the operand

This is a 3-byte instruction
The second byte specifies the low-order address
and the third byte specifies the high-order
address
Example: STA 4350H

STAX
Store accumulator indirect

STAX Reg. pair

Contents of accumulator are copied into memory

location specified by contents of operand

The contents of the accumulator are not altered
Example: STAX B

SHLD
Store H and L registers direct

SHLD 16-bit address

The contents of register L are stored into the

memory location specified by the 16-bit address

in the operand
The contents of H register are stored into the next
memory location by incrementing the operand
The contents of registers HL are not altered
The second byte specifies the low-order address
and the third byte specifies the high-order

PUSH
Push register pair onto stack

PUSH Reg. pair

The contents of the register pair designated in the

operand are copied onto the stack in the following

sequence
The stack pointer register is decremented and the
contents of the high order register are copied into that
location
Stack pointer register is decremented again
The contents of the low-order register are copied to
that location

POP
Pop off stack to register pair

POP Reg. pair

Contents of the memory location pointed out by

the stack pointer are copied to the low-order of

operand
Stack pointer is incremented by 1
The contents of that memory location are copied
to the high-order register of the operand
The stack pointer register is again incremented
by 1

OUT
Output data from accumulator to a port with 8-bit

address
OUT 8-bit port address
The contents of the accumulator are copied into

the I/O port specified by the operand

Example: OUT F8H

IN
Input data to accumulator from a port with 8-bit

address
IN 8-bit port address
The contents of the input port designated in the

operand are read

accumulator
Example: IN 8CH

and

loaded

into

the

ADD
Add register or memory to accumulator

ADD R
M
The contents of the operand are M added to the

contents of the accumulator

The result is stored in the accumulator. If the operand
is a memory location
Its location is specified by the contents of the HL
registers
All flags are modified to reflect the result of the
addition

ADC
Add register to accumulator with carry

ADC R
M
The contents of the operand and M the Carry flag are

added to the contents of the accumulator

The result is stored in the accumulator
If the operand is a memory location, its location is
specified by the contents of the HL registers
All flags are modified to reflect the result of the
addition.

SUB
Subtract register or memory from accumulator

SUB R
V
The contents of the operand (register or memory
) are subtracted from the contents of the
accumulator
The result is stored in the accumulator
If the operand is a memory location, its location is
specified by the contents of the HL registers
All flags are modified to reflect the result of the
subtraction.
Example: SUB B or SUB M

SBB
Subtract source and borrow from accumulator

SBB

R
M

The contents of the operand the Borrow flag are

subtracted from the contents of the accumulator

The result is placed in the accumulator
If the operand is a memory location, its location is
specified by
the contents of the HL registers
All flags are modified to reflect the result of the
subtraction
Example: SBB B or SBB M

INR
Increment register or memory by 1

INR

The

R
M

contents of the designated register or

memory are incremented by 1
The result is stored in the same place
If the operand is a memory location, its location is
specified by the contents of the HL registers
Example: INR B or INR M

INX
Increment register pair by 1

INX

The contents of the designated register pair are

incremented by 1
The result is stored in the same place
Example: INX H

DCR
Decrement register or memory by 1

DCR R
M
The

contents of the designated register or

memory are decremented by 1
The result is stored in the same place
If the operand is a memory location, its location is
specified by the contents of the HL registers
Example: DCR B or DCR M