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Instruction Formats Explained

The document discusses different types of instruction formats: - Three-address instructions specify a result address and two operand addresses - Two-address instructions specify an operand/result address and one operand address - One-address instructions specify an operand address, with the accumulator used for the result - Zero-address instructions perform operations without explicit addresses using a stack It provides examples of how an arithmetic problem could be evaluated using each of these instruction formats. RISC instructions are also noted to restrict memory access to load and store instructions only.

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431 views13 pages

Instruction Formats Explained

The document discusses different types of instruction formats: - Three-address instructions specify a result address and two operand addresses - Two-address instructions specify an operand/result address and one operand address - One-address instructions specify an operand address, with the accumulator used for the result - Zero-address instructions perform operations without explicit addresses using a stack It provides examples of how an arithmetic problem could be evaluated using each of these instruction formats. RISC instructions are also noted to restrict memory access to load and store instructions only.

Uploaded by

ysuresh_bng
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Basic Instruction Types

Three-Address Instructions
ADD R1, R2, R3 R1 R2 + R3
Two-Address Instructions
ADD R1, R2 R1 R1 + R2
One-Address Instructions
ADD M AC AC + M[AR]
Zero-Address Instructions
ADD TOS TOS + (TOS 1)
RISC Instructions
Lots of registers. Memory is restricted to Load & Store

Dr. Yeresime Suresh 1


Instruction Formats
Example: Evaluate (A+B) (C+D)
Three-Address
1. ADD R1, A, B ; R1 M[A] + M[B]
2. ADD R2, C, D ; R2 M[C] + M[D]
3. MUL X, R1, R2 ; M[X] R1 R2
Instruction Formats
Example: Evaluate (A+B) (C+D)
Two-Address
1. MOV R1, A ; R1 M[A]
2. ADD R1, B ; R1 R1 + M[B]
3. MOV R2, C ; R2 M[C]
4. ADD R2, D ; R2 R2 + M[D]
5. MUL R1, R2 ; R1 R1 R2
6. MOV X, R1 ; M[X] R1
Instruction Formats
Example: Evaluate (A+B) (C+D)
One-Address
1. LOAD A ; AC M[A]
2. ADD B ; AC AC + M[B]
3. STORE T ; M[T] AC
4. LOAD C ; AC M[C]
5. ADD D ; AC AC + M[D]
6. MUL T ; AC AC M[T]
7. STORE X ; M[X] AC
Instruction Formats
Example: Evaluate (A+B) (C+D)
Zero-Address
1. PUSH A ; TOS A
2. PUSH B ; TOS B
3. ADD ; TOS (A + B)
4. PUSH C ; TOS C
5. PUSH D ; TOS D
6. ADD ; TOS (C + D)
7. MUL ; TOS (C+D)(A+B)
8. POP X ; M[X] TOS
Instruction Formats
Example: Evaluate (A+B) (C+D)
RISC
1. LOAD R1, A ; R1 M[A]
2. LOAD R2, B ; R2 M[B]
3. LOAD R3, C ; R3 M[C]
4. LOAD R4, D ; R4 M[D]
5. ADD R1, R1, R2 ; R1 R1 + R2
6. ADD R3, R3, R4 ; R3 R3 + R4
7. MUL R1, R1, R3 ; R1 R1 R3
8. STORE X, R1 ; M[X] R1
Instruction-3-address
opcode address for Result address for Operand 1 address for Operand 2

Example : SUB Y A B Y=A-B


Result Y
Operand 1 A
Operand 2 B
Operation = subtracts
Address for Next instruction? program counter (PC)
Instruction-2-address
opcode address for Operand 1 & Result address for Operand 2

Example : SUB Y B Y=Y-B


Operand 1 Y
Operand 2 B
Result replace to operand 1
Address for Next instruction? program counter (PC)
Instruction-1-address

opcode address for Operand 2

Example :
LOAD A
ADD B AC = AC + B
or
SUB B AC = AC - B
Operand 1 & Result in AC (accumulator), a register
SUB B B subtracts from AC, the result stored in AC
Address for Next instruction? program counter (PC)
Short instruction (requires less bit) but need more instructions
for arithmetic problem
Y = (A-B) / (C+D x E)

Instruction Comment
SUB Y, A, B Y A-B
MPY T, D, E T DxE
ADD T, T, C T T+C
DIV Y, Y, T Y Y/ T

Three-address
instructions
Y = (A-B) / (C+D x E)
MOVE Y, A
SUB Y, B
MOVE T, D
MPY T, E
ADD T, C
DIV Y, T

Two-address instructions
Y = (A-B) / (C+D x E)
INSTRUCTIONS Comment
LOAD D AC D
MPY E
AC AC x E
ADD C
AC AC + C
STOR Y
LOAD A Y AC
SUB B AC A
DIV Y AC AC B
STOR Y AC AC / Y
Y AC
One-address Instructions
Utilization of Instruction Addresses

** Zero-address instructions are applicable to a special memory organisation,


called a stack.
Name Assem bler syn tax Addressing function

Immediate #V alue Op erand = V alue

Register Ri EA = R i

Absolute (Direct) LOC EA = LOC

Indirect (R i ) EA = [R i ]
(LOC) EA = [LOC]

Index X(R i ) EA = [R i ] + X

Base with index (R i ,R j ) EA = [R i ] + [R j ]

Base with index X(R i ,R j ) EA = [R i ] + [R j ] + X


and offset

Relative X(PC) EA = [PC] + X

Autoincremen t (R i )+ EA = [R i ] ;
Incremen t R i

Autodecrement (R i ) Decremen t Ri ;
EA = [R i ]
Dr. Yeresime Suresh 13

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