MOSFET Basics

• Qualitative description –
• n-channel enhancement mode
• Start with MOS capacitor with p-type substrate
• Bias gate to invert capacitor – create n-channel
• Put n-type regions at the ends Source and Drain
• Source and substrate at ground potential
• Gate at positive potential to invert
• Drain - variable positive voltage
• At small drain voltages channel acts like a resistor – linear region
• At higher drain voltages, voltage drop across channel reduces
potential across oxide toward drain end – thinner channel –
threshold voltage at drain end shifted by VD (s=VD+2 B)
• Eventually, inversion goes away at drain end –pinch off
• Current does not increase with increasing drain voltage since
number of carriers injected toward the drain stays the same –
(waterfall)saturation
 MOSFET Operation (linear to saturation)-
Approximations and Assumptions

1. Gate structure is ideal MOS diode

2. Only drift current is considered (diffusion current small)

3. Mobility in the inversion channel is constant

4. Uniform channel doping

5. Leakage currents neglected (oxides, p-n junctions)

6. Field from gate >> Field from Source-Drain

– Gradual Channel Approximation
MOSFET Geometry

VG

VD
L

S D
z

x
MOSFET Linear and Saturation Regions

• Voltage across capacitor (V=VG)

QS
VG  Vi   S    S
Ci

• Surface potential is now a function of position (y)

QS  (VG   S (y ))Ci

• Surface potential at inversion approximated by

 S =2B+V(y)
• V(y) is the potential at a point y with respect to the source
electrode - grounded
• Charge in the inversion layer is total charge minus depletion

QB Qn (y )  Qs (y )  QB (y )

 VG   S (y )Ci  QB
 QB is uncovered depletion layer charge with the
maximum depletion width
QB

QB (y )  qN AWmax (y )   2 SqN A (V (y )  2 B

Putting these together:

Qn (y )  VG  V (y )  2 B Ci  2 SqN A (V (y )  2 B )

We now know the inversion layer charge as a function of voltage

along the channel from source to drain

Want to know how it conducts – currents and voltages

Inversion Channel Conductivity

At any point, y, along the channel, the conductivity varies with depth,x

 ( x )  qn( x ) n ( x )

Total conductance (1/resistance) assuming n is constant:

 Z x q n Z x q n Z
g      ( x )dx  
i i

 n ( x )dx Qn
L0 L 0 L

1  dy  dy dy
y y+dy dR     
g  L  gL Z nQn (y )
Find expression for Drain Current

• Voltage drop across channel element (dy)

• Current in channel is constant = drain current=ID
I D dy
dV  I D dR 
Z nQn (y )

• Integrate dV from 0 to VD and dy from 0 to L

VD
ID L
 QndV   dy
o Z n 0

• Plug in expression for Qn

Qn (y )  VG  V (y )  2 B Ci  2 SqN A (V (y )  2 B )

 Do the integral

• RHS: ID L ID L
 dy 
Z n 0 Z n

• LHS:

V  V dV  V V dV  V 2 dV C  2 N V V  2  12dV
D D D D

 0 G 0

0
 B 

i s A 
0
B

VD
2 3 2 v  2
v D  2 B 1
 V  2 B 
1 D B

2 dV    d   2
0 2 B
3 2 B

Where:
  V  2 B
d  dV
• End up with

Z nCi  VD  2 2 s qN A  3
2

VD  2 B   (2 B )  
3
ID  VG  2 B  2 VD  3
2
L   Ci 
 

• General expression for MOSFET drain current as a function of

physical parameters, gate voltage and drain voltage

• Can simplify for small drain voltages (below saturation)

• Expand using Taylor’s series
 V  2  3 2  (2 )3 2 
 D B B


 VD  2 
3
V  2  3 2 3
 (2 B ) 2
3
2
 (2 B )  1    1
 D B
  2 B  
 Drain current for small VD

1 x  n  1  nx  ......
x  1
 3
 3 
3
2
 V  2
  3  VD    3  1
(2 B )  1  D
  1  (2 B )  1   
2
  1   (2 B ) 2VD
 2 B     2  2 B    2 

Putting this back into ID

Z  n Ci  VD  2 s qN A (2 B ) 
ID  VG  2 B  VD  VD 
L  2  Ci 
Z  1 2
  nCi VG  VT VD  VD 
L  2 
This is the equation of a parabola (not linear or saturated)
 Drain current for small VD
• Maximum point in parabola (slope =0) is where transistor goes
into saturation:

ID IDsat
I D  Z n   V  V V  1 V 2 
0  G T D D 
 VD  VD L 2 
0  (VG  VT )  VD
VDsat VD
 VD sat  VG  VT

Z 1
I D sat   nCi  VG  VT VD sat  VD sat 2 
  
L  2 
Z  1 2
  nCi  VG  VT   VG  VT  
2

L  2 
Z
 nCi VG  VT 
2

2L
Drain current for REALLY small VD

Z 1 2
ID   nCi  VG  VT VD  VD 
L  2 
Z
I D   nCi  VG  VT VD  Linear operation
L
VD  VG  VT 

Channel Conductance:

I D Z
gD    nCi (VG  VT )
VD V LG

Transconductance:
I D Z
gm    nCiVD
VG V L
D
Ideal Characteristics of n-channel
enhancement mode MOSFET
In Saturation

• Channel Conductance:

I D
gD  0
VD V
G

• Transconductance:

Z
 nCi VG  VT 
2
I D sat 
2L

I D Z
gm    nCi VG  VT 
VG V L D
Equivalent Circuit – Low Frequency AC

• Gate looks like open circuit

• S-D output stage looks like current source with channel
conductance
I D I D
I D  VD  VG
VD VG
VG V D

i  g D v d  g mv g
Equivalent Circuit - Higher Frequency AC

• Input stage looks like capacitances gate-to-source(gate) and

gate-to-drain(overlap)
• Output capacitances ignored -drain-to-source capacitance
small
Equivalent Circuit – Higher Frequency AC

• Input circuit:

i in  jCgs  Cgd v g  j 2fCgatev g

• Input capacitance is mainly gate capacitance

• Output circuit: i out  g mv g

i out gm

i in 2fC gate

I D Z
gm    nCiVD
VG V L
D
Maximum Frequency (not in saturation)

• Ci is capacitance per unit area and Cgate is total capacitance of

the gate
C gate  Ci ZL

• F=fmax when gain=1 (iout/iin=1)

gm
fmax 
2Cgate

Z
 nVDCi
L  nVD
fmax  
2Ci ZL 2L2
What if it isn’t ideal?

• If work function differences and oxide charges are present,

threshold voltage is shifted just like for MOS capacitor:
2 s qN A (2 B )
VT  VFB  2 B 
Ci
 Qf  2 s qN A (2 B )
  ms    2 B 
 Ci  Ci

• If the substrate is biased wrt the Source (VBS) the threshold

voltage is also shifted

2 s qN A (2 B  VBS )
VT  VFB  2 B 
Ci
Threshold Voltage Control

• Substrate Bias:

2 s qN A (2 B  VBS )
VT  VFB  2 B 
Ci

VT  VT (VBS )  VT (VBS  0)

2 s qN A
VT   2 B  VBS  2 B 
Ci
Threshold Voltage Control-substrate bias
 Threshold Adjust – Ion Implantation

• Make adjustments device thresholds

– p vs n
– Compensate for oxide trapped charge
– Substrate doping fixed by other considerations
• Shallow Implant B or P at depth near semiconductor surface
• Forms “sheet” of ionized donors/acceptors
• Voltage shift due to charge sheet and gate capacitance

Qimplant
V
Ci
• Example: 5x1011/cm2 B with 100 nm oxide

Qimplant 1.6 x10 19 C / ion * 5 x1011 ions / cm 2

V  14 2 5
 2Volts
Ci (3.9 * 8.85x10 F / cm / 10 cm)
 Threshold Adjust – Ion Implantation

• If implant depth greater than Wmax then doping density increased

by implant dose
2 s q(N A  Nimplant )(2 B  VBS )
VT  VFB  2 B 
Ci
• If Implant depth is finite but less than Wmax then (x)
solve Poisson’s equation with two-step charge density
W

x
-qNA
-qNimplant
xs
1
2q s N A  qxs  2
DI
VT  VFB  2 B   2 B  VBS  DI  q
Ci  2 s  Ci
Mobility
• Drain current model assumed constant mobility in channel
• Mobility of channel less than bulk – surface scattering
• Mobility depends on gate voltage – carriers in inversion channel
are attracted to gate – increased surface scattering – reduced
mobility
Mobility dependence on gate voltage

0

1  (VG  VT )
Sub-Threshold Behavior

• For gate voltage less than the threshold – weak inversion\

• Diffusion is dominant current mechanism (not drift)
• Drain current determined by gradient of carrier density from
source to drain:

n n(o )  n(L)
I D  J D A  qADn  qADn
y L
• A is channel cross-sectional area
• We know the carrier densities at each end

n(0)  ni e q (  
s B ) / kT

n(L)  ni e q (  
s B VD ) / kT
Sub-threshold

qADn ni e  / kT
1  e e
B
qVD / kT q s / kT
ID 
L

We can approximate s with VG-VT: surface potential =gate potential

minus inversion potential

qADn ni e  / kT
1  e e 
B
qVD / kT q VG VT  / kT
ID 
L

•Sub-threshold current is exponential function of applied gate voltage

•Sub-threshold current gets larger for smaller gates (L)
Subthreshold Characteristic

Subthreshold Swing
1
S
   log ID  VG 
More complete model – sub-threshold to saturation

• Must include diffusion and drift currents

• Still use gradual channel approximation
• Yields sub-threshold and saturation behavior for long channel
MOSFETS
• Exact Charge Model – numerical integration

Z s n V 
D s
e  V
ID  
L LD 0   np0 
F  ,V , 
B

p 
 p 0 
Exact Charge Model – Long Channel MOSFET