Unit 3

Memory management &Virtual memory

Operating System Concepts – 8th Edition Silberschatz, Galvin and Gagne ©2009
 Base and Limit Registers
 A pair of base and limit registers define the logical address space

Operating System Concepts – 8th Edition 8.2 Silberschatz, Galvin and Gagne ©2009
 Hardware Address Protection with Base and Limit Registers

Operating System Concepts – 8th Edition 8.3 Silberschatz, Galvin and Gagne ©2009
 Address Binding

 Inconvenient to have first user process physical address always at

0000
 How can it not be?
 Further, addresses represented in different ways at different stages
of a program’s life
 Source code addresses usually symbolic
 Compiled code addresses bind to relocatable addresses
 i.e. “14 bytes from beginning of this module”
 Linker or loader will bind relocatable addresses to absolute
addresses
 i.e. 74014
 Each binding maps one address
Operating System Concepts – 8th Edition 8.4 space to another
Silberschatz, Galvin and Gagne ©2009
 Binding of Instructions and Data to Memory

 Address binding of instructions and data to memory addresses

can happen at three different stages
 Compile time: If memory location known a priori, absolute
code can be generated; must recompile code if starting
location changes
 Load time: Must generate relocatable code if memory
location is not known at compile time
 Execution time: Binding delayed until run time if the process
can be moved during its execution from one memory
segment to another
 Need hardware support for address maps (e.g., base and
limit registers)
Operating System Concepts – 8th Edition 8.5 Silberschatz, Galvin and Gagne ©2009
 Multistep Processing of a User Program

Operating System Concepts – 8th Edition 8.6 Silberschatz, Galvin and Gagne ©2009
 Logical vs. Physical Address Space

 The concept of a logical address space that is bound to a separate physical

address space is central to proper memory management
 Logical address – generated by the CPU; also referred to as virtual
address
 Physical address – address seen by the memory unit

 Logical and physical addresses are the same in compile-time and load-time
address-binding schemes; logical (virtual) and physical addresses differ in
execution-time address-binding scheme
 Logical address space is the set of all logical addresses generated by a
program
 Physical address space is the set of all physical addresses generated by a
program

Operating System Concepts – 8th Edition 8.7 Silberschatz, Galvin and Gagne ©2009
 Memory-Management Unit (MMU)
 Hardware device that at run time maps virtual to physical
address

 Many methods possible, covered in the rest of this chapter

 To start, consider simple scheme where the value in the

relocation register is added to every address generated by a
user process at the time it is sent to memory
 Base register now called relocation register
 MS-DOS on Intel 80x86 used 4 relocation registers

 The user program deals with logical addresses; it never sees the
real physical addresses
 Execution-time binding occurs when reference is made to
location in memory
 Logical address bound to physical addresses

Operating System Concepts – 8th Edition 8.8 Silberschatz, Galvin and Gagne ©2009
 Dynamic relocation using a
relocation register

Operating System Concepts – 8th Edition 8.9 Silberschatz, Galvin and Gagne ©2009
 Dynamic Loading
 Routine is not loaded until it is called

 Better memory-space utilization; unused routine is never loaded

 All routines kept on disk in relocatable load format

 Useful when large amounts of code are needed to handle infrequently occurring cases

 No special support from the operating system is required

 Implemented through program design
 OS can help by providing libraries to implement dynamic loading

Operating System Concepts – 8th Edition 8.10 Silberschatz, Galvin and Gagne ©2009
 Dynamic Linking
 Static linking – system libraries and program code
combined by the loader into the binary program
image
 Dynamic linking –linking postponed until execution
time
 Small piece of code, stub, used to locate the
appropriate memory-resident library routine
 Stub replaces itself with the address of the routine,
and executes the routine
 Operating system checks if routine is in processes’
memory address
 If not in address space, add to address space
 Dynamic linking is particularly useful for libraries
 System also known as shared libraries
 Consider applicability to8.11
Operating System Concepts – 8th Editionpatching systemSilberschatz,
libraries Galvin and Gagne ©2009
 Swapping
 A process can be swapped temporarily out of memory to a backing store, and
then brought back into memory for continued execution
 Total physical memory space of processes can exceed physical memory
 Backing store – fast disk large enough to accommodate copies of all memory
images for all users; must provide direct access to these memory images
 Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority process
can be loaded and executed
 Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped
 System maintains a ready queue of ready-to-run processes which have
memory images on disk
 Does the swapped out process need to swap back in to same physical
addresses?
 Depends on address binding method
 Plus consider pending I/O to / from process memory space
 Modified versions of swapping are found on many systems (i.e., UNIX, Linux,
and Windows)
 Swapping normally disabled
Operating System Concepts – 8th Edition 8.12 Silberschatz, Galvin and Gagne ©2009
 Schematic View of Swapping

Operating System Concepts – 8th Edition 8.13 Silberschatz, Galvin and Gagne ©2009
 Context Switch Time including Swapping
 If next processes to be put on CPU is not in memory, need to swap
out a process and swap in target process
 Context switch time can then be very high
 100MB process swapping to hard disk with transfer rate of 50MB/sec
 Plus disk latency of 8 ms
 Swap out time of 2008 ms
 Plus swap in of same sized process
 Total context switch swapping component time of 4016ms (> 4
seconds)
 Can reduce if reduce size of memory swapped – by knowing how
much memory really being used
 System calls to inform OS of memory use via request memory and
release memory

Operating System Concepts – 8th Edition 8.14 Silberschatz, Galvin and Gagne ©2009
 Contiguous Allocation
 Main memory usually into two partitions:
 Resident operating system, usually held in low memory with interrupt
vector
 User processes then held in high memory
 Each process contained in single contiguous section of memory

 Relocation registers used to protect user processes from each other, and from
changing operating-system code and data
 Base register contains value of smallest physical address
 Limit register contains range of logical addresses – each logical address
must be less than the limit register
 MMU maps logical address dynamically
 Can then allow actions such as kernel code being transient and kernel
changing size

Operating System Concepts – 8th Edition 8.15 Silberschatz, Galvin and Gagne ©2009
 Hardware Support for Relocation
and Limit Registers

Operating System Concepts – 8th Edition 8.16 Silberschatz, Galvin and Gagne ©2009
 Contiguous Allocation (Cont.)
 Multiple-partition allocation
 Degree of multiprogramming limited by number of partitions
 Hole – block of available memory; holes of various size are scattered
throughout memory
 When a process arrives, it is allocated memory from a hole large enough
to accommodate it
 Process exiting frees its partition, adjacent free partitions combined
 Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
OS OS OS OS
process process process process
5 5 5
process 5
process
9 9
process process
8 10
process process process process
2 2 2 2
Operating System Concepts – 8th Edition 8.17 Silberschatz, Galvin and Gagne ©2009
 Dynamic Storage-Allocation Problem

How to satisfy a request of size n from a list of free holes?

 First-fit: Allocate the first hole that is big enough

 Best-fit: Allocate the smallest hole that is big enough; must search entire list,
unless ordered by size
 Produces the smallest leftover hole

 Worst-fit: Allocate the largest hole; must also search entire list
 Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of speed and storage utilization

Operating System Concepts – 8th Edition 8.18 Silberschatz, Galvin and Gagne ©2009
 Fragmentation
 External Fragmentation – total memory space exists to satisfy a request, but
it is not contiguous

 Internal Fragmentation – allocated memory may be slightly larger than

requested memory; this size difference is memory internal to a partition, but
not being used

 First fit analysis reveals that given N blocks allocated, 0.5 N blocks lost to
fragmentation
 1/3 may be unusable -> 50-percent rule

Operating System Concepts – 8th Edition 8.19 Silberschatz, Galvin and Gagne ©2009
 Fragmentation (Cont.)
 Reduce external fragmentation by compaction
 Shuffle memory contents to place all free memory together in one large block
 Compaction is possible only if relocation is dynamic, and is done at execution
time
 I/O problem
 Latch job in memory while it is involved in I/O
 Do I/O only into OS buffers

 Now consider that backing store has same fragmentation problems

Operating System Concepts – 8th Edition 8.20 Silberschatz, Galvin and Gagne ©2009
 Paging
 Physical address space of a process can be noncontiguous; process is
allocated physical memory whenever the latter is available

 Divide physical memory into fixed-sized blocks called frames

 Size is power of 2, between 512 bytes and 16 Mbytes

 Divide logical memory into blocks of same size called pages

 Keep track of all free frames

 To run a program of size N pages, need to find N free frames and load
program

 Set up a page table to translate logical to physical addresses

 Backing store likewise split into pages

 Still have Internal fragmentation

Operating System Concepts – 8th Edition 8.21 Silberschatz, Galvin and Gagne ©2009
 Address Translation Scheme
 Address generated by CPU is divided into:
 Page number (p) – used as an index into a page table which contains base
address of each page in physical memory
 Page offset (d) – combined with base address to define the physical
memory address that is sent to the memory unit

page number page offset

p d

m-n n

 For given logical address space 2m and page size 2n

Operating System Concepts – 8th Edition 8.22 Silberschatz, Galvin and Gagne ©2009
 Paging Hardware

Operating System Concepts – 8th Edition 8.23 Silberschatz, Galvin and Gagne ©2009
 Paging Model of Logical and Physical Memory

Operating System Concepts – 8th Edition 8.24 Silberschatz, Galvin and Gagne ©2009
 Paging Example

n=2 and m=4 32-byte memory and 4-byte pages

Operating System Concepts – 8th Edition 8.25 Silberschatz, Galvin and Gagne ©2009
 Paging (Cont.)
 Calculating internal fragmentation
 Page size = 2,048 bytes
 Process size = 72,766 bytes
 35 pages + 1,086 bytes
 Internal fragmentation of 2,048 - 1,086 = 962 bytes
 Worst case fragmentation = 1 frame – 1 byte
 On average fragmentation = 1 / 2 frame size
 So small frame sizes desirable?
 But each page table entry takes memory to track
 Page sizes growing over time
 Solaris supports two page sizes – 8 KB and 4 MB
 Process view and physical memory now very different
 By implementation process can only access its own memory

Operating System Concepts – 8th Edition 8.26 Silberschatz, Galvin and Gagne ©2009
 Free Frames

Before allocation After allocation

Operating System Concepts – 8th Edition 8.27 Silberschatz, Galvin and Gagne ©2009
 Implementation of Page Table
 Page table is kept in main memory

 Page-table base register (PTBR) points to the page table

 Page-table length register (PTLR) indicates size of the page table

 In this scheme every data/instruction access requires two memory accesses

 One for the page table and one for the data / instruction

 The two memory access problem can be solved by the use of a special fast-
lookup hardware cache called associative memory or translation look-aside
buffers (TLBs)

 Some TLBs store address-space identifiers (ASIDs) in each TLB entry –

uniquely identifies each process to provide address-space protection for that
process
 Otherwise need to flush at every context switch

 TLBs typically small (64 to 1,024 entries)

 On a TLB miss, value is loaded into the TLB for faster access next time
 Replacement policies must be considered
 Some entries can be wired down for permanent fast access
Operating System Concepts – 8th Edition 8.28 Silberschatz, Galvin and Gagne ©2009
 Associative Memory
 Associative memory – parallel search

Page # Frame #

 Address translation (p, d)

 If p is in associative register, get frame # out
 Otherwise get frame # from page table in memory

Operating System Concepts – 8th Edition 8.29 Silberschatz, Galvin and Gagne ©2009
 Paging Hardware With TLB

Operating System Concepts – 8th Edition 8.30 Silberschatz, Galvin and Gagne ©2009
 Effective Access Time
 Associative Lookup =  time unit
 Can be < 10% of memory access time

 Hit ratio = 
 Hit ratio – percentage of times that a page number is found in the
associative registers; ratio related to number of associative registers

 Consider  = 80%,  = 20ns for TLB search, 100ns for memory access

 Effective Access Time (EAT)

EAT = (1 + )  + (2 + )(1 – )
=2+–

 Consider  = 80%,  = 20ns for TLB search, 100ns for memory access
 EAT = 0.80 x 120 + 0.20 x 220 = 140ns

 Consider slower memory but better hit ratio ->  = 98%,  = 20ns for TLB
search, 140ns for memory access
 EAT = 0.98 x 120 + 0.02 x 220 = 122 ns

Operating System Concepts – 8th Edition 8.31 Silberschatz, Galvin and Gagne ©2009
 Memory Protection
 Memory protection implemented by associating protection bit
with each frame to indicate if read-only or read-write access is
allowed
 Can also add more bits to indicate page execute-only, and so
on

 Valid-invalid bit attached to each entry in the page table:

 “valid” indicates that the associated page is in the process’
logical address space, and is thus a legal page
 “invalid” indicates that the page is not in the process’ logical
address space
 Or use PTLR

 Any violations result in a trap to the kernel

Operating System Concepts – 8th Edition 8.32 Silberschatz, Galvin and Gagne ©2009
 Valid (v) or Invalid (i)
Bit In A Page Table

Operating System Concepts – 8th Edition 8.33 Silberschatz, Galvin and Gagne ©2009
 Shared Pages
 Shared code
 One copy of read-only (reentrant) code shared among
processes (i.e., text editors, compilers, window systems)
 Similar to multiple threads sharing the same process space
 Also useful for interprocess communication if sharing of
read-write pages is allowed

 Private code and data

 Each process keeps a separate copy of the code and data
 The pages for the private code and data can appear
anywhere in the logical address space

Operating System Concepts – 8th Edition 8.34 Silberschatz, Galvin and Gagne ©2009
 Shared Pages Example

Operating System Concepts – 8th Edition 8.35 Silberschatz, Galvin and Gagne ©2009
 Structure of the Page Table
 Memory structures for paging can get huge using straight-forward
methods
 Consider a 32-bit logical address space as on modern computers
 Page size of 4 KB (212)
 Page table would have 1 million entries (232 / 212)
 If each entry is 4 bytes -> 4 MB of physical address space / memory
for page table alone
 That amount of memory used to cost a lot
 Don’t want to allocate that contiguously in main memory

 Hierarchical Paging

 Hashed Page Tables

 Inverted Page Tables

Operating System Concepts – 8th Edition 8.36 Silberschatz, Galvin and Gagne ©2009
 Hierarchical Page Tables
 Break up the logical address space into multiple page tables

 A simple technique is a two-level page table

 We then page the page table

Operating System Concepts – 8th Edition 8.37 Silberschatz, Galvin and Gagne ©2009
 Two-Level Page-Table Scheme

Operating System Concepts – 8th Edition 8.38 Silberschatz, Galvin and Gagne ©2009
 Two-Level Paging Example
 A logical address (on 32-bit machine with 1K page size) is divided into:
 a page number consisting of 22 bits
 a page offset consisting of 10 bits

 Since the page table is paged, the page number is further divided into:
 a 12-bit page number
 a 10-bit page offset

 Thus, a logical address is as follows:

page number page offset

p1 p2 d
12 10 10
 where p1 is an index into the outer page table, and p2 is the displacement
within the page of the inner page table
 Known as forward-mapped page table

Operating System Concepts – 8th Edition 8.39 Silberschatz, Galvin and Gagne ©2009
 Address-Translation Scheme

Operating System Concepts – 8th Edition 8.40 Silberschatz, Galvin and Gagne ©2009
 64-bit Logical Address Space
 Even two-level paging scheme not sufficient
 If page size is 4 KB (212)
 Then page table has 252 entries
 If two level scheme, inner page tables could be 210 4-byte entries
 Address would look like

outer pageinner page page offset

p1 p2 d
42 10 12
 Outer page table has 242 entries or 244 bytes
 One solution is to add a 2nd outer page table
 But in the following example the 2nd outer page table is still 234 bytes in size
 And possibly 4 memory access to get to one physical memory location

Operating System Concepts – 8th Edition 8.41 Silberschatz, Galvin and Gagne ©2009
 Three-level Paging Scheme

Operating System Concepts – 8th Edition 8.42 Silberschatz, Galvin and Gagne ©2009
 Hashed Page Tables
 Common in address spaces > 32 bits

 The virtual page number is hashed into a page table

 This page table contains a chain of elements hashing to the
same location

 Each element contains (1) the virtual page number (2) the value
of the mapped page frame (3) a pointer to the next element

 Virtual page numbers are compared in this chain searching for a

match
 If a match is found, the corresponding physical frame is
extracted

Operating System Concepts – 8th Edition 8.43 Silberschatz, Galvin and Gagne ©2009
 Hashed Page Table

Operating System Concepts – 8th Edition 8.44 Silberschatz, Galvin and Gagne ©2009
 Inverted Page Table
 Rather than each process having a page table and keeping track of all
possible logical pages, track all physical pages

 One entry for each real page of memory

 Entry consists of the virtual address of the page stored in that real
memory location, with information about the process that owns that page

 Decreases memory needed to store each page table, but increases time
needed to search the table when a page reference occurs

 Use hash table to limit the search to one — or at most a few — page-table
entries
 TLB can accelerate access

 But how to implement shared memory?

 One mapping of a virtual address to the shared physical address

Operating System Concepts – 8th Edition 8.45 Silberschatz, Galvin and Gagne ©2009
 Inverted Page Table Architecture

Operating System Concepts – 8th Edition 8.46 Silberschatz, Galvin and Gagne ©2009
 Segmentation
 Memory-management scheme that supports user view of memory

 A program is a collection of segments

 A segment is a logical unit such as:

main program
procedure
function
method
object
local variables, global variables
common block
stack
symbol table
arrays

Operating System Concepts – 8th Edition 8.47 Silberschatz, Galvin and Gagne ©2009
 User’s View of a Program

Operating System Concepts – 8th Edition 8.48 Silberschatz, Galvin and Gagne ©2009
 Logical View of Segmentation
1

4
1

3 2
4

user space physical memory space

Operating System Concepts – 8th Edition 8.49 Silberschatz, Galvin and Gagne ©2009
 Segmentation Architecture
 Logical address consists of a two tuple:
<segment-number, offset>,

 Segment table – maps two-dimensional physical addresses; each

table entry has:
 base – contains the starting physical address where the
segments reside in memory
 limit – specifies the length of the segment

 Segment-table base register (STBR) points to the segment

table’s location in memory

 Segment-table length register (STLR) indicates number of

segments used by a program;
segment number s is legal if s < STLR

Operating System Concepts – 8th Edition 8.50 Silberschatz, Galvin and Gagne ©2009
 Segmentation Architecture (Cont.)

 Protection
 With each entry in segment table associate:
 validation bit = 0  illegal segment
 read/write/execute privileges

 Protection bits associated with segments; code sharing occurs at segment level

 Since segments vary in length, memory allocation is a dynamic storage-allocation

problem

 A segmentation example is shown in the following diagram

Operating System Concepts – 8th Edition 8.51 Silberschatz, Galvin and Gagne ©2009
 Segmentation Hardware

Operating System Concepts – 8th Edition 8.52 Silberschatz, Galvin and Gagne ©2009
 Example of Segmentation

Operating System Concepts – 8th Edition 8.53 Silberschatz, Galvin and Gagne ©2009
 Virtual Memory Background
 Code needs to be in memory to execute, but entire program
rarely used
 Error code, unusual routines, large data structures
 Entire program code not needed at same time
 Consider ability to execute partially-loaded program
 Program no longer constrained by limits of physical memory
 Each program takes less memory while running -> more
programs run at the same time
 Increased CPU utilization and throughput with no increase
in response time or turnaround time
 Less I/O needed to load or swap programs into memory ->
each user program runs faster
Operating System Concepts – 8th Edition 8.54 Silberschatz, Galvin and Gagne ©2009
 Virtual memory

 Virtual memory – separation of user logical memory from physical

memory
 Only part of the program needs to be in memory for
execution
 Logical address space can therefore be much larger than
physical address space
 Allows address spaces to be shared by several processes
 Allows for more efficient process creation
 More programs running concurrently
 Less I/O needed to load or swap processes

Operating System Concepts – 8th Edition 8.55 Silberschatz, Galvin and Gagne ©2009
 Virtual memory (Cont.)
 Virtual address space – logical view of how process is stored in
memory
 Usually start at address 0, contiguous addresses until end of
space
 Meanwhile, physical memory organized in page frames
 MMU must map logical to physical
 Virtual memory can be implemented via:
 Demand paging
 Demand segmentation

Operating System Concepts – 8th Edition 8.56 Silberschatz, Galvin and Gagne ©2009
 Virtual Memory That is Larger Than Physical Memory

Operating System Concepts – 8th Edition 8.57 Silberschatz, Galvin and Gagne ©2009
 Demand Paging
 Could bring entire process into
memory at load time
 Or bring a page into memory only
when it is needed
 Less I/O needed, no
unnecessary I/O
 Less memory needed
 Faster response
 More users
 Similar to paging system with
swapping (diagram on right)
 Page is needed  reference to it
 invalid reference  abort
 not-in-memory  bring to
memory
 Lazy swapper – never swaps a
page into memory unless page
will be needed
 Swapper that deals with pages
is a pager
Operating System Concepts – 8th Edition 8.58 Silberschatz, Galvin and Gagne ©2009
 Page Table When Some Pages Are Not in Main Memory

Operating System Concepts – 8th Edition 8.59 Silberschatz, Galvin and Gagne ©2009
 Page Fault
 If there is a reference to a page, first reference to that
page will trap to operating system:

page fault

1. Operating system looks at another table to decide:

 Invalid reference  abort

 Just not in memory

2. Find free frame

3. Swap page into frame via scheduled disk operation

4. Reset tables to indicate page now in memory

Set validation bit = v

5. Restart the instruction that caused the page fault

Operating System Concepts – 8th Edition 8.60 Silberschatz, Galvin and Gagne ©2009
 Steps in Handling a Page Fault

Operating System Concepts – 8th Edition 8.61 Silberschatz, Galvin and Gagne ©2009
 Aspects of Demand Paging
 Extreme case – start process with no pages in memory
 OS sets instruction pointer to first instruction of process,
non-memory-resident -> page fault
 And for every other process pages on first access
 Pure demand paging
 Actually, a given instruction could access multiple pages ->
multiple page faults
 Consider fetch and decode of instruction which adds 2
numbers from memory and stores result back to memory
 Pain decreased because of locality of reference
 Hardware support needed for demand paging
 Page table with valid / invalid bit
 Secondary memory (swap device with swap space)
 Instruction restart
Operating System Concepts – 8th Edition 8.62 Silberschatz, Galvin and Gagne ©2009
 Performance of Demand Paging
 Stages in Demand Paging (worse case)
1. Trap to the operating system
2. Save the user registers and process state
3. Determine that the interrupt was a page fault
4. Check that the page reference was legal and determine the location of the page
on the disk
5. Issue a read from the disk to a free frame:
1. Wait in a queue for this device until the read request is serviced
2. Wait for the device seek and/or latency time
3. Begin the transfer of the page to a free frame
6. While waiting, allocate the CPU to some other user
7. Receive an interrupt from the disk I/O subsystem (I/O completed)
8. Save the registers and process state for the other user
9. Determine that the interrupt was from the disk
10. Correct the page table and other tables to show page is now in memory
11. Wait for the CPU to be allocated to this process again
12. Restore the user registers, process state, and new page table, and then resume
the interrupted instruction

Operating System Concepts – 8th Edition 8.63 Silberschatz, Galvin and Gagne ©2009
 Performance of Demand Paging (Cont.)
 Three major activities
 Service the interrupt – careful coding means just several hundred instructions
needed
 Read the page – lots of time
 Restart the process – again just a small amount of time
 Page Fault Rate 0  p  1
 if p = 0 no page faults
 if p = 1, every reference is a fault
 Effective Access Time (EAT)

EAT = (1 – p) x memory access

+ p (page fault overhead

+ swap page out

+ swap page in )

Operating System Concepts – 8th Edition 8.64 Silberschatz, Galvin and Gagne ©2009
 What Happens if There is no Free Frame?

 Used up by process pages

 Also in demand from the kernel, I/O buffers, etc
 How much to allocate to each?
 Page replacement – find some page in memory, but not really
in use, page it out
 Algorithm – terminate? swap out? replace the page?
 Performance – want an algorithm which will result in
minimum number of page faults
 Same page may be brought into memory several times

Operating System Concepts – 8th Edition 8.65 Silberschatz, Galvin and Gagne ©2009
 Page Replacement

 Prevent over-allocation of memory by modifying page-fault

service routine to include page replacement
 Use modify (dirty) bit to reduce overhead of page transfers –
only modified pages are written to disk
 Page replacement completes separation between logical
memory and physical memory – large virtual memory can be
provided on a smaller physical memory

Operating System Concepts – 8th Edition 8.66 Silberschatz, Galvin and Gagne ©2009
 Need For Page Replacement

Operating System Concepts – 8th Edition 8.67 Silberschatz, Galvin and Gagne ©2009
 Basic Page Replacement

1. Find the location of the desired page on disk

Find a free frame:

- If there is a free frame, use it
- If there is no free frame, use a page replacement algorithm
to select a victim frame
- Write victim frame to disk if dirty

2. Bring the desired page into the (newly) free frame; update the

page and frame tables

3. Continue the process by restarting the instruction that caused

the trap

Note now potentially 2 page transfers for page fault – increasing

EAT
Operating System Concepts – 8th Edition 8.68 Silberschatz, Galvin and Gagne ©2009
 Page Replacement

Operating System Concepts – 8th Edition 8.69 Silberschatz, Galvin and Gagne ©2009
 Page and Frame Replacement Algorithms
 Frame-allocation algorithm determines
 How many frames to give each process
 Which frames to replace
 Page-replacement algorithm
 Want lowest page-fault rate on both first access and re-
access
 Evaluate algorithm by running it on a particular string of
memory references (reference string) and computing the
number of page faults on that string
 String is just page numbers, not full addresses
 Repeated access to the same page does not cause a page
fault
Operating System Concepts – 8th Edition 8.70 Silberschatz, Galvin and Gagne ©2009

 Graph of Page Faults Versus The Number of Frames

Operating System Concepts – 8th Edition 8.71 Silberschatz, Galvin and Gagne ©2009
 First-In-First-Out (FIFO) Algorithm
 Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1
 3 frames (3 pages can be in memory at a time per process)

15 page faults

 Can vary by reference string: consider 1,2,3,4,1,2,5,1,2,3,4,5

 Adding more frames can cause more page faults!
 Belady’s Anomaly
 How to track ages of pages?
 Just use a FIFO queue

Operating System Concepts – 8th Edition 8.72 Silberschatz, Galvin and Gagne ©2009
 FIFO Illustrating Belady’s Anomaly

Operating System Concepts – 8th Edition 8.73 Silberschatz, Galvin and Gagne ©2009
 Optimal Algorithm
 Replace page that will not be used for longest period of time
 9 is optimal for the example
 How do you know this?
 Can’t read the future
 Used for measuring how well your algorithm performs

Operating System Concepts – 8th Edition 8.74 Silberschatz, Galvin and Gagne ©2009
 Least Recently Used (LRU) Algorithm
 Use past knowledge rather than future
 Replace page that has not been used in the most amount of
time
 Associate time of last use with each page

 12 faults – better than FIFO but worse than OPT

 Generally good algorithm and frequently used
 But how to implement?

Operating System Concepts – 8th Edition 8.75 Silberschatz, Galvin and Gagne ©2009
 LRU Algorithm (Cont.)
 Counter implementation
 Every page entry has a counter; every time page is
referenced through this entry, copy the clock into the
counter
 When a page needs to be changed, look at the counters to
find smallest value
 Search through table needed
 Stack implementation
 Keep a stack of page numbers in a double link form:
 Page referenced:
 move it to the top
 requires 6 pointers to be changed
 But each update more expensive
 No search for replacement
 LRU and OPT are cases of stack algorithms that don’t have
Belady’s Anomaly

Operating System Concepts – 8th Edition 8.76 Silberschatz, Galvin and Gagne ©2009
 Use Of A Stack to Record Most Recent Page References

Operating System Concepts – 8th Edition 8.77 Silberschatz, Galvin and Gagne ©2009
 LRU Approximation Algorithms
 LRU needs special hardware and still slow
 Reference bit
 With each page associate a bit, initially = 0
 When page is referenced bit set to 1
 Replace any with reference bit = 0 (if one exists)
 We do not know the order, however
 Second-chance algorithm
 Generally FIFO, plus hardware-provided reference bit
 Clock replacement
 If page to be replaced has
 Reference bit = 0 -> replace it
 reference bit = 1 then:
– set reference bit 0, leave page in memory
– replace next page, subject to same rules

Operating System Concepts – 8th Edition 8.78 Silberschatz, Galvin and Gagne ©2009
 Second-Chance (clock) Page-Replacement Algorithm

Operating System Concepts – 8th Edition 8.79 Silberschatz, Galvin and Gagne ©2009
 Enhanced Second-Chance Algorithm
 Improve algorithm by using reference bit and modify bit (if
available) in concert
 Take ordered pair (reference, modify)
1. (0, 0) neither recently used not modified – best page to
replace
2. (0, 1) not recently used but modified – not quite as good,
must write out before replacement
3. (1, 0) recently used but clean – probably will be used again
soon
4. (1, 1) recently used and modified – probably will be used
again soon and need to write out before replacement
 When page replacement called for, use the clock scheme
but use the four classes replace page in lowest non-empty
class
 Might need to search circular queue several times

Operating System Concepts – 8th Edition 8.80 Silberschatz, Galvin and Gagne ©2009
 Counting Algorithms
 Keep a counter of the number of references that have been
made to each page
 Not common

 Lease Frequently Used (LFU) Algorithm: replaces page with

smallest count

 Most Frequently Used (MFU) Algorithm: based on the

argument that the page with the smallest count was probably
just brought in and has yet to be used

Operating System Concepts – 8th Edition 8.81 Silberschatz, Galvin and Gagne ©2009
 Page-Buffering Algorithms
 Keep a pool of free frames, always
 Then frame available when needed, not found at fault
time
 Read page into free frame and select victim to evict and
add to free pool
 When convenient, evict victim
 Possibly, keep list of modified pages
 When backing store otherwise idle, write pages there
and set to non-dirty
 Possibly, keep free frame contents intact and note what is
in them
 If referenced again before reused, no need to load
contents again from disk
 Generally useful to reduce penalty if wrong victim frame
selected

Operating System Concepts – 8th Edition 8.82 Silberschatz, Galvin and Gagne ©2009
 Applications and Page Replacement

 All of these algorithms have OS guessing about future

page access
 Some applications have better knowledge – i.e. databases
 Memory intensive applications can cause double buffering
 OS keeps copy of page in memory as I/O buffer
 Application keeps page in memory for its own work
 Operating system can given direct access to the disk,
getting out of the way of the applications
 Raw disk mode
 Bypasses buffering, locking, etc

Operating System Concepts – 8th Edition 8.83 Silberschatz, Galvin and Gagne ©2009
 Allocation of Frames
 Each process needs minimum number of frames
 Example: IBM 370 – 6 pages to handle SS MOVE instruction:
 instruction is 6 bytes, might span 2 pages
 2 pages to handle from
 2 pages to handle to
 Maximum of course is total frames in the system
 Two major allocation schemes
 fixed allocation
 priority allocation
 Many variations

Operating System Concepts – 8th Edition 8.84 Silberschatz, Galvin and Gagne ©2009
 Fixed Allocation
 Equal allocation – For example, if there are 100 frames
(after allocating frames for the OS) and 5 processes, give
each process 20 frames
 Keep some as free frame buffer pool

 Proportional allocation – Allocate according to the size of

process
 Dynamic as degree of multiprogramming, process sizes
change
si  size of process pi
S   si
m  total number of frames
s
ai  allocation for pi  i  m
S

Operating System Concepts – 8th Edition 8.85 Silberschatz, Galvin and Gagne ©2009
 Priority Allocation
 Use a proportional allocation scheme using priorities
rather than size

 If process Pi generates a page fault,

 select for replacement one of its frames
 select for replacement a frame from a process with
lower priority number

Operating System Concepts – 8th Edition 8.86 Silberschatz, Galvin and Gagne ©2009
 Global vs. Local Allocation
 Global replacement – process selects a replacement
frame from the set of all frames; one process can take a
frame from another
 But then process execution time can vary greatly
 But greater throughput so more common

 Local replacement – each process selects from only its

own set of allocated frames
 More consistent per-process performance
 But possibly underutilized memory

Operating System Concepts – 8th Edition 8.87 Silberschatz, Galvin and Gagne ©2009
 Non-Uniform Memory Access
 So far all memory accessed equally
 Many systems are NUMA – speed of access to memory
varies
 Consider system boards containing CPUs and memory,
interconnected over a system bus
 Optimal performance comes from allocating memory “close
to” the CPU on which the thread is scheduled
 And modifying the scheduler to schedule the thread on
the same system board when possible
 Solved by Solaris by creating lgroups
 Structure to track CPU / Memory low latency groups
 Used my schedule and pager
 When possible schedule all threads of a process and
allocate all memory for that process within the
lgroup

Operating System Concepts – 8th Edition 8.88 Silberschatz, Galvin and Gagne ©2009
 Thrashing
 If a process does not have “enough” pages, the page-fault
rate is very high
 Page fault to get page
 Replace existing frame
 But quickly need replaced frame back
 This leads to:
 Low CPU utilization
 Operating system thinking that it needs to increase
the degree of multiprogramming
 Another process added to the system

 Thrashing  a process is busy swapping pages in and out

Operating System Concepts – 8th Edition 8.89 Silberschatz, Galvin and Gagne ©2009
 Thrashing (Cont.)

Operating System Concepts – 8th Edition 8.90 Silberschatz, Galvin and Gagne ©2009
 End

Operating System Concepts – 8th Edition Silberschatz, Galvin and Gagne ©2009