Main Memory

Unit – 3

1. Main Memory
 Swapping
 Contiguous Memory Allocation
 Paging
 Structure of the Page Table
 Segmentation

2. Virtual Memory
 Demand Paging
 Process Creation
 Page Replacement
 Allocation of Frames
 Thrashing

Operating System Concepts – 7th Edition, Feb 22, 2005 8.2 Silberschatz, Galvin and Gagne ©2005
 Objectives

 To provide a detailed description of various ways of

organizing memory hardware.

 To discuss various memory-management techniques,

including paging and segmentation.

Operating System Concepts – 7th Edition, Feb 22, 2005 8.3 Silberschatz, Galvin and Gagne ©2005
 Logical vs. Physical Address Space

 The concept of a logical address space that is bound to a

separate physical address space is central to proper memory
management
 Logical address – generated by the CPU; also referred to
as virtual address
 Physical address – address seen by the memory unit
 Logical and physical addresses are the same in compile-time
and load-time address-binding schemes; logical (virtual) and
physical addresses differ in execution-time address-binding
scheme

Operating System Concepts – 7th Edition, Feb 22, 2005 8.4 Silberschatz, Galvin and Gagne ©2005
 Memory-Management Unit (MMU)

 Hardware device that maps virtual to physical address

 In MMU scheme, the value in the relocation register is added to

every address generated by a user process at the time it is sent to
memory

 The user program deals with logical addresses; it never sees the
real physical addresses

Operating System Concepts – 7th Edition, Feb 22, 2005 8.5 Silberschatz, Galvin and Gagne ©2005
 Swapping

 A process can be swapped temporarily out of memory to a backing store,

and then brought back into memory for continued execution

 Backing store – fast disk large enough to accommodate copies of all

memory images for all users; must provide direct access to these memory
images

 Roll out, roll in – swapping variant used for priority-based scheduling

algorithms; lower-priority process is swapped out so higher-priority process
can be loaded and executed

 Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped

 Modified versions of swapping are found on many systems (i.e., UNIX,

Linux, and Windows)
 System maintains a ready queue of ready-to-run processes which have
memory images on disk

Operating System Concepts – 7th Edition, Feb 22, 2005 8.6 Silberschatz, Galvin and Gagne ©2005
 Schematic View of Swapping

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 Contiguous Allocation

 Main memory usually into two partitions:

 Resident operating system, usually held in low memory with
interrupt vector
 User processes then held in high memory

 Relocation registers used to protect user processes from each

other, and from changing operating-system code and data
 Base register contains value of smallest physical address
 Limit register contains range of logical addresses – each
logical address must be less than the limit register
 MMU maps logical address dynamically

Operating System Concepts – 7th Edition, Feb 22, 2005 8.8 Silberschatz, Galvin and Gagne ©2005
 CPUs two modes:
supervisor mode: The supervisor mode is used by
the operating system's kernel for low level tasks
that need unrestricted access to hardware, such
as controlling how memory is written and erased,
and communication with devices like graphics
cards.
protected mode : Protected mode, in contrast, is
used for almost everything else. Applications
operate within protected mode, and can only use
hardware by communicating with the kernel, which
controls everything in supervisor mode

Operating System Concepts – 7th Edition, Feb 22, 2005 8.9 Silberschatz, Galvin and Gagne ©2005
 Contiguous Allocation (Cont.)

Partitioning :
1. Fixed Sized Partitioning
2. Variable Sized Partitioning

100KB

50KB
375KB
150KB

75KB

Operating System Concepts – 7th Edition, Feb 22, 2005 8.10 Silberschatz, Galvin and Gagne ©2005
 Fragments - Holes
Internal Fragmentation – Within a partition the left out memory after
placing a process in the partition is said to be “Internal
Fragmentation”

P1 = 50KB
P1 100KB
100KB
Hole=50KB

P2 100KB 100KB

Operating System Concepts – 7th Edition, Feb 22, 2005 8.11 Silberschatz, Galvin and Gagne ©2005
 Fragments - Holes
External Fragmentation – total memory space exists to satisfy a
request, but it is not contiguous is said to be “External
Fragmentation”

P1 = 50KB IF a process p3 is to be stored in the

p1 memory with 100KB. Even

Hole=50KB though the total memory space

available is 100KB, it cannot be
used since it is not contiguous
P2 = 50KB

p2
Hole=50KB

Operating System Concepts – 7th Edition, Feb 22, 2005 8.12 Silberschatz, Galvin and Gagne ©2005
 Compaction or Garbage Collection
Compaction: Collecting all internal fragments to form a free block
which is contiguous is called compaction or Garbage Collection.
Holes or Internal fragments can be used only after compaction

P1 = 50KB P1 = 50KB

p1 Allocated
Partitions
Hole=50KB P2 = 50KB

P2 = 50KB
Contiguous Free
p2 block of contiguous
100KB Block
Hole=50KB

Operating System Concepts – 7th Edition, Feb 22, 2005 8.13 Silberschatz, Galvin and Gagne ©2005
 Dynamic Storage-Allocation Problem

How to satisfy a request of size n from a list of free holes

 First-fit: Allocate the first hole that is big enough
 Best-fit: Allocate the smallest hole that is big enough; must
search entire list, unless ordered by size
 Produces the smallest leftover hole
 Worst-fit: Allocate the largest hole; must also search entire
list
 Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of

speed and storage utilization

Operating System Concepts – 7th Edition, Feb 22, 2005 8.14 Silberschatz, Galvin and Gagne ©2005
 Dynamic Storage-Allocation Problem

 Given Memory Partitions of 100KB, 500KB, 200KB, 300KB, & 600KB(in order), how would each of the

(i)First – fit

(ii)Best – fit

(iii)Worst – fit

algorithms place processes of 212KB, 417KB,112KB & 426KB (in order)?. Which algorithm makes the most

efficient use of memory?

Operating System Concepts – 7th Edition, Feb 22, 2005 8.15 Silberschatz, Galvin and Gagne ©2005
 Problems

1.Given memory partition of 180 KB, 200 KB,

350 KB, 400KB & 600 KB (in order). Show
with neat sketch how would each of the first-
fit, best-fit and worst fit algorithms place
processes of 412 KB, 170 KB, 112 KB and
526KB (in order). Which algorithm is most
efficient in memory allocation? List out the
Internal Fragmentation in each partition for
each algorithm.

Operating System Concepts – 7th Edition, Feb 22, 2005 8.16 Silberschatz, Galvin and Gagne ©2005
 Fragmentation

 External Fragmentation – total memory space exists to satisfy a

request, but it is not contiguous
 Internal Fragmentation – allocated memory may be slightly larger
than requested memory; this size difference in memory internal to a
partition, but not being used
 Reduce external fragmentation by compaction
 Shuffle memory contents to place all free memory together in
one large block
 Compaction is possible only if relocation is dynamic, and is
done at execution time

Operating System Concepts – 7th Edition, Feb 22, 2005 8.17 Silberschatz, Galvin and Gagne ©2005
 Paging

 Logical address space of a process can be noncontiguous;

process is allocated physical memory whenever the latter is
available
 Divide physical memory into fixed-sized blocks called frames
(size is power of 2, between 512 bytes and 8,192 bytes)
 Divide logical memory into blocks of same size called pages
 Keep track of all free frames
 To run a program of size n pages, need to find n free frames
and load program
 Set up a page table to translate logical to physical addresses
 No External fragmentation but there may be Internal
fragmentation.

Operating System Concepts – 7th Edition, Feb 22, 2005 8.18 Silberschatz, Galvin and Gagne ©2005
 No External fragmentation but there may be Internal
fragmentation.

Example:
Page Size = 2,048 Bytes
Process Size = 72,766 Bytes
Frames Required = 72,766 / 2,048
= 35 + 1,086 Bytes
Total Frames needed = (35 + 1) = 36
Internal Fragmentation in 36th Frame ?
= 2048 – 1086 = 962Bytes

Operating System Concepts – 7th Edition, Feb 22, 2005 8.19 Silberschatz, Galvin and Gagne ©2005
 Address Translation Scheme

 Address generated by CPU is Logical Address which is divided into:

 Page number (p) – used as an index into a page table which

contains base address of each page in physical memory

 Page offset (d) – combined with base address to define the

physical memory address that is sent to the memory unit

page number page offset

p d

 For given logical address space 2m and page size 2n

Operating System Concepts – 7th Edition, Feb 22, 2005 8.20 Silberschatz, Galvin and Gagne ©2005
 Paging Hardware

Operating System Concepts – 7th Edition, Feb 22, 2005 8.21 Silberschatz, Galvin and Gagne ©2005
 Paging Model of Logical and Physical Memory

Operating System Concepts – 7th Edition, Feb 22, 2005 8.22 Silberschatz, Galvin and Gagne ©2005
 Paging Example

Eg: For a reference ‘f’ the

mapping is done as follows
f – page1
Reference value in index 1 = 6
6 x 4 = 24 + offset of ‘f’
= 24 + 1 = 25

32-byte memory and 4-byte pages

Operating System Concepts – 7th Edition, Feb 22, 2005 8.23 Silberschatz, Galvin and Gagne ©2005
 Segmentation

 Memory-management scheme that supports user view of memory

 A program is a collection of segments. A segment is a logical unit
such as:
main program,
procedure,
function,
method,
object,
local variables, global variables,
common block,
stack,
symbol table, arrays

Operating System Concepts – 7th Edition, Feb 22, 2005 8.24 Silberschatz, Galvin and Gagne ©2005
 User’s View of a Program

Operating System Concepts – 7th Edition, Feb 22, 2005 8.25 Silberschatz, Galvin and Gagne ©2005
 Logical View of Segmentation

4
1

3 2
4

user space physical memory space

Operating System Concepts – 7th Edition, Feb 22, 2005 8.26 Silberschatz, Galvin and Gagne ©2005
 Segmentation Architecture

 Logical address consists of a two tuple:

<segment-number, offset>,
 Segment table – maps two-dimensional physical addresses;
each table entry has:
 base – contains the starting physical address where the
segments reside in memory
 limit – specifies the length of the segment

Operating System Concepts – 7th Edition, Feb 22, 2005 8.27 Silberschatz, Galvin and Gagne ©2005
 Segmentation Hardware

Operating System Concepts – 7th Edition, Feb 22, 2005 8.28 Silberschatz, Galvin and Gagne ©2005
 Example of Segmentation
1. Segment 2 is 400 bytes long
and begins at location 4300.
Thus a reference to a byte 53
of segment 2 is mapped on to
the location 4300+53 = 4353
2. Segment 3 – Reference 852
Is mapped to 3200 + 852 =
4052

3. A Reference to byte 1222 of

segment 0 results in a trap to
the operating system as this
segment is only 1,000 bytes
long.

Operating System Concepts – 7th Edition, Feb 22, 2005 8.29 Silberschatz, Galvin and Gagne ©2005
 Free Frames

Before allocation After allocation

Operating System Concepts – 7th Edition, Feb 22, 2005 8.30 Silberschatz, Galvin and Gagne ©2005
 Memory Protection

 Memory protection implemented by associating protection bit

with each frame

 Valid-invalid bit attached to each entry in the page table:

 “valid” indicates that the associated page is in the process’
logical address space, and is thus a legal page
 “invalid” indicates that the page is not in the process’
logical address space

Operating System Concepts – 7th Edition, Feb 22, 2005 8.31 Silberschatz, Galvin and Gagne ©2005
 Valid (v) or Invalid (i) Bit In A Page Table

Operating System Concepts – 7th Edition, Feb 22, 2005 8.32 Silberschatz, Galvin and Gagne ©2005
 Shared Pages

 Shared code

 One copy of read-only (reentrant) code shared among

processes (i.e., text editors, compilers, window systems).

 Shared code must appear in same location in the logical

address space of all processes

Operating System Concepts – 7th Edition, Feb 22, 2005 8.33 Silberschatz, Galvin and Gagne ©2005
 Shared Pages Example

Operating System Concepts – 7th Edition, Feb 22, 2005 8.34 Silberschatz, Galvin and Gagne ©2005
 Implementation of Page Table

 Page table is kept in main memory

 Page-table base register (PTBR) points to the page table
 Page-table length register (PRLR) indicates size of the
page table
 In this scheme every data/instruction access requires two
memory accesses. One for the page table and one for the
data/instruction.
 The two memory access problem can be solved by the use
of a special fast-lookup hardware cache called associative
memory or translation look-aside buffers (TLBs)
 Some TLBs store address-space identifiers (ASIDs) in
each TLB entry – uniquely identifies each process to provide
address-space protection for that process

Operating System Concepts – 7th Edition, Feb 22, 2005 8.35 Silberschatz, Galvin and Gagne ©2005
 Associative Memory

 Associative memory – parallel search

Page # Frame #

Address translation (p, d)

 If p is in associative register, get frame # out
 Otherwise get frame # from page table in memory

Operating System Concepts – 7th Edition, Feb 22, 2005 8.36 Silberschatz, Galvin and Gagne ©2005
 Paging Hardware With TLB

Operating System Concepts – 7th Edition, Feb 22, 2005 8.37 Silberschatz, Galvin and Gagne ©2005
 Effective Access Time

 Associative Lookup =  time unit

 Assume memory cycle time is 1 microsecond
 Hit ratio – percentage of times that a page number is found
in the associative registers; ratio related to number of
associative registers
 Hit ratio = 
 Effective Access Time (EAT)
EAT = (1 + )  + (2 + )(1 – )
=2+–

Operating System Concepts – 7th Edition, Feb 22, 2005 8.38 Silberschatz, Galvin and Gagne ©2005
 Structure of the Page Table

 Hierarchical Paging

 Hashed Page Tables

 Inverted Page Tables

Operating System Concepts – 7th Edition, Feb 22, 2005 8.39 Silberschatz, Galvin and Gagne ©2005
 Hierarchical Page Tables

 Break up the logical address space into multiple page tables

 A simple technique is a two-level page table

Operating System Concepts – 7th Edition, Feb 22, 2005 8.40 Silberschatz, Galvin and Gagne ©2005
 Two-Level Page-Table Scheme

Operating System Concepts – 7th Edition, Feb 22, 2005 8.41 Silberschatz, Galvin and Gagne ©2005
 Two-Level Paging Example

 A logical address (on 32-bit machine with 1K page size) is divided into:
 a page number consisting of 22 bits
 a page offset consisting of 10 bits
 Since the page table is paged, the page number is further divided into:
 a 12-bit page number
 a 10-bit page offset
 Thus, a logical address is as follows:

page number page offset

pi p2 d

12 10 10
where pi is an index into the outer page table, and p2 is the displacement within
the page of the outer page table

Operating System Concepts – 7th Edition, Feb 22, 2005 8.42 Silberschatz, Galvin and Gagne ©2005
 Address-Translation Scheme

Operating System Concepts – 7th Edition, Feb 22, 2005 8.43 Silberschatz, Galvin and Gagne ©2005
 Three-level Paging Scheme

Operating System Concepts – 7th Edition, Feb 22, 2005 8.44 Silberschatz, Galvin and Gagne ©2005
 Hashed Page Tables

 Common in address spaces > 32 bits

 The virtual page number is hashed into a page table. This page
table contains a chain of elements hashing to the same location.

 Virtual page numbers are compared in this chain searching for a

match. If a match is found, the corresponding physical frame is
extracted.

Operating System Concepts – 7th Edition, Feb 22, 2005 8.45 Silberschatz, Galvin and Gagne ©2005
 Hashed Page Table

Operating System Concepts – 7th Edition, Feb 22, 2005 8.46 Silberschatz, Galvin and Gagne ©2005
 Inverted Page Table

 One entry for each real page of memory

 Entry consists of the virtual address of the page stored in
that real memory location, with information about the
process that owns that page
 Decreases memory needed to store each page table, but
increases time needed to search the table when a page
reference occurs
 Use hash table to limit the search to one — or at most a
few — page-table entries

Operating System Concepts – 7th Edition, Feb 22, 2005 8.47 Silberschatz, Galvin and Gagne ©2005
 Inverted Page Table Architecture

Operating System Concepts – 7th Edition, Feb 22, 2005 8.48 Silberschatz, Galvin and Gagne ©2005