Unit-4
Microprogrammed Control
✓ Outline
Loopin
g • Control Memory
• Address Sequencing
• Microinstruction Code
Format
• Questions asked in GTU
exam
Control Memory
Section - 1
Microprogrammed Control Organization
Extern Contro
al Next- l
input address Control Control Control word
generator address memory data
(Sequenc register (ROM) register
er)
Next-address
information
Control Memory
🞂 A computer that employs a microprogrammed control unit will have two separate
memories: a main memory and a control memory.
🞂 The control memory holds a fixed microprogram that can not be altered by the occasional
user.
🞂 The microprogram consists of microinstructions that specify various internal control signals
for execution of register microoperation.
🞂 Microinstructions generates the microoperations to fetch instruction from main memory; to
evaluate the effective address, to execute the operation specified by the instruction, and to
return control to the fetch of next instruction.
Address Sequencing
Section - 2
Address Sequencing
🞂 Microinstructions are stored in control memory in groups, with each group specifying a
routine.
🞂 The transformation from the instruction code bits to an address in control memory where
the routine is located is referred to as a mapping process.
🞂 The address sequencing capabilities required in a control memory are:
1. Incrementing of the control address register.
2. Unconditional branch or conditional branch, depending on status bit conditions.
3. A mapping process from the bits of the instruction to an address for control memory.
4. A facility for subroutine call and return.
Address Sequencing
Instruction code
Mappin
g
logic
Statu Branch Mux
s selec Multiplexer
logic
bits t Subrouti
ne
register
Control address (SBR)
Cloc register
k (CAR) Increment
er
Control memory
Select a
Branch status bit
address Microoperatio
ns
Microinstruction Code
Format
Section - 3
Microinstruction Code Format
3 3 3 2 2 7
F1 F2 F3 CD BR AD
🞂 F1, F2, F3: Microoperation fields
🞂 CD: Condition for branching
🞂 BR: Branch field
🞂 AD: Address field
Symbols & Binary Code for Microinstruction Fields
F1 Microoperati Symbol F2 Microoperati Symbol
on on
000 None NOP 000 None NOP
001 AC AC + DR ADD 001 AC AC - DR SUB
010 AC 0 CLRAC 010 AC AC DR OR
011 AC AC + 1 INCAC 011 AC AC DR AND
100 AC DR DRTAC 100 DR M[AR] READ
101 AR DR(0-10) DRTAR 101 DR AC ACTDR
110 AR PC PCTAR 110 DR DR + 1 INCDR
111 M[AR] DR WRITE 111 DR(0-10) PC PCTDR
Symbols & Binary Code for Microinstruction Fields
F3 Microoperati Symbol
on
000 None NOP
CD Symbol Comments
001 AC AC + DR XOR
00 U - 1 Unconditional branch
010 AC AC’ COM
01 I - DR(15) Indirect address bit
011 AC shl AC SHL
10 S - AC(15) Sign bit of AC
100 AC shr AC SHR
11 Z - AC = 0 Zero value in AC
101 PC PC + 1 INCPC
110 PC AR ARTPC
111 Reserved
BR Symb Function
ol
00 JMP CAR AD if condition = 1, CAR CAR+1 if condition = 0
01 CALL CAR AD, SBR CAR+1 if condition=1, CAR CAR+1 if condition=0
10 RET CAR SBR (Return from subroutine)
11 MAP CAR(2-5) DR(11-14), CAR(0,1,6) 0