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Module 1 - Register Transfer Language

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0% found this document useful (0 votes)
23 views62 pages

Module 1 - Register Transfer Language

Uploaded by

rohanvijjapu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

CSEN2011: COMPUTER

ORGANIZATION A N D
ARCHITECTURE
MODULE 1: REGISTER TRANSFER A N D MICRO
OPERATIONS

Department of Computer Science and Engineering, GST, GITAM,


Visakhapatnam
1
TOPIC
S
• Register Transfer
Language
• Register transfer
• Bus and memory
Transfers
• Arithmetic micro-
operations
• Logic Micro-operations
• Shift Micro-operations
• Arithmetic Logic and Shift
Unit

Department of Computer Science and Engineering, GST, GITAM,


Visakhapatnam
2
SIMPLE DIGITAL SYSTEMS

• Combinational and sequential circuits (learned in Chapters


1 and 2) can be used to create simple digital systems.

• These are the low-level building blocks of a digital


computer.

• Simple digital systems are frequently characterized in


terms of
• the registers they contain, and
• the operations that they perform.

• Typically,
• What operations are performed on the data in the registers
• What information is passed between registers
Register Transfer Language

MICROOPERATIONS (1)

• The operations on the data in registers are called


microoperations.
• The functions built into registers are examples of
microoperations
• Shift
• Load
• Clear
• Increment
• …
Register Transfer Language

MICROOPERATION (2)

An elementary operation performed


(during one clock pulse), on the
information stored in one or more
registers

Registers ALU
(R) (f) 1 clock cycle

R  f(R, R)
f: shift, load, clear, increment, add, subtract,
complement,
and, or, xor, …
Register Transfer Language

ORGANIZATION O F A DIGITAL SYSTEM

• Definition of the (internal) organization of a


computer
- Set of registers and their functions

- Microoperations set

Set of allowable microoperations provided


by the organization of the computer

- Control signals that initiate the sequence of


microoperations (to perform the functions)
Register Transfer Language

REGISTER TRANSFER LEVEL

• Viewing a computer, or any digital system, in this way it is called as the


register transfer level

• This is because we’re focusing on


• The system’s registers
• The data transformations in them, and
• The data transfers between them.
Register Transfer Language

REGISTER TRANSFER
LANGUAGE

• Rather than specifying a digital system in words, a specific


notation is used,
register transfer language

• For any function of the computer, the register transfer language


can be
used to describe the (sequence of) microoperations

• Register transfer language


• A symbolic language
• A convenient tool for describing the internal organization of digital
computers
• Can also be used to facilitate the design process of digital systems.
Register Transfer Language

DESIGNATION OF REGISTERS

• Registers are designated by capital letters, sometimes followed


by numbers (e.g., A, R13, IR)
• Often the names indicate function:
• MAR - memory address
• PC register
- program counter
• IR - instruction
register

• Registers and their contents can be viewed and represented in


various ways
• A register can be viewed as aMAR
single entity:

• Registers may also be represented showing the bits of data


they contain
Register Transfer Language

DESIGNATION OF REGISTERS

• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits


R1 7 6 5 4 3 2 1
0
15 8 7
15
R2 PC(H) 0 PC(L)
0
Numbering of bits Subfields
Register Transfer

REGISTER TRANSFER

• Copying the contents of one register to another is a register


transfer

• A register transfer is indicated as


R2  R1
• In this case the contents of register R1 are copied (loaded) into
register R2
• A simultaneous transfer of all bits from the source
R1 to the destination register R2, during one
clock pulse
• Note that this is a non-destructive; i.e. the contents
of R1 are not altered by
copying (loading) them to R2
Register Transfer

REGISTER TRANSFER

• A register transfer such as

R3  R5

Implies that the digital system has

• the data lines from the source register (R5) to the destination
register (R3)
• Parallel load in the destination register (R3)
• Control lines to perform the action
Register Transfer

CONTROL FUNCTIONS

• Often actions need to only occur if a certain condition is true


• This is similar to an “if” statement in a programming language
• In digital systems, this is often done via a control signal,
called a control function
• If the signal is 1, the action takes place

• This is represented as:


P: R2  R1

Which means “if P = 1, then load the contents of register R1 into


register R2”, i.e., if (P = 1) then (R2  R1)
REGISTE
RS

R R
2 1

Department of Computer Science and Engineering, GST, GITAM,


Visakhapatnam
1
Register Transfer

HARDW ARE IMPLEMENTATIO N OF


C O N TRO LLED TRANSFERS

Implementation of controlled transfer


P: R2  R1

Block diagram Control P Load


R2 Clock
Circuit
n
R1

Timing diagram t t+1


Clock

Load
Transfer occurs here

• The same clock controls the circuits that generate the control function
and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
Register Transfer

SIMULTANEOUS OPERATIONS

• If two or more operations are to occur


simultaneously, they are separated with
commas

P: R3  R5, MAR  IR

• Here, if the control function P = 1, load the


contents of R5 into R3, and at the same time
(clock), load the contents of register IR into
register MAR
Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples


Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2  R1
Colon Denotes termination of control function P:
: Separates two micro-operations A  B, B  A
Comma

,
Register Transfer

CONNECTING REGISTRS

• In a digital system with many registers, it is impractical to


have data and control lines to directly allow each register
to be loaded with the contents of every possible other
registers

• To completely connect n registers  n(n-1) lines


• O(n2) cost
• This is not a realistic approach to use in a large digital system

• Instead, take a different approach


• Have one centralized set of circuits for data transfer
• Have control circuits to select which register is the source,
and which
is the destination
4 TO 1 LINE
MULTIPLEXER:

Department of Computer Science and Engineering, GST, GITAM,


Visakhapatnam
1
Bus and Memory Transfers

BUS A N D BUS TRANSFER


Bus is a path(of a group of wires) over which information is
transferred, from any of several sources to any of several destinations.
From a register to bus: BUS  R
Register A Register B Register C Register D

Bus lines
Bus and Memory Transfers

BUS USING THREE STATE BUS


BUFFERS

Three-State Bus Buffers


Output Y=A if C=1
Normal input A
High-impedence if C=0
Control input
C

Bus line with three-state buffers


Bus line for bit 0
A0

B0

C0
S0 0
Select 1
D0 2
Enable S1 3

2 to 4
decoder
2 TO 4 BINARY
DECO DER

Department of Computer Science and Engineering, GST, GITAM,


Visakhapatnam
2
Bus and Memory Transfers

TRANSFER FRO M BUS TO A


DESTIN ATIO N REGISTER
Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D0 D1 D2 D3
Select z E (enable)
w 2x4
Decoder
Bus and Memory Transfers

BUS TRANSFER IN
RTL

• Depending on whether the bus is to be mentioned


explicitly or not, register transfer can be indicated as
either
R2  R1
or
BUS  R1, R2  BUS

• In the former case the bus is implicit, but in the latter, it is


explicitly indicated
Bus and Memory Transfers

MEMORY (RAM)

• Memory (RAM) can be thought as a sequential circuits


containing some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the
data input lines
following
• n data input n
lines address lines
• n data output k RAM
lines Read
unit
• k address lines Write

• A Read control n
line data output lines
• A W rite control
Bus and Memory Transfers

MEMORY TRANSFER

• Collectively, the memory is viewed at the register level as a


device, M.
• Since it contains multiple locations, we must specify which
address in memory we will be using
• This is done by indexing memory references

• Memory is usually accessed in computer systems by


putting the desired
address in a special register, the Memory Address Register
(MAR, or AR)
• When memory is accessed, the contents of the MAR get
Read
sent to the memory unit’s
AR address linesMemory
unit Write
M
Data out Data in
Bus and Memory Transfers

MEMORY
READ

• To read a value from a location in memory and load it into


a register, the register transfer language notation looks
like this:
R1  M[MAR]

• This causes the following to occur


• The contents of the MAR get sent to the memory address lines
• A Read (= 1) gets sent to the memory unit
• The contents of the specified address are put on the memory’s
output data lines
• These get sent over the bus to be loaded into register R1
Bus and Memory Transfers

MEMORY WRITE

• To write a value from a register to a location in memory looks


like this in register transfer language:
M[MAR]  R1

• This causes the following to occur


• The contents of the MAR get sent to the memory address lines
• A W rite (= 1) gets sent to the memory unit
• The values in register R1 get sent over the bus to the data input lines of
the memory
• The values get loaded into the specified address in the memory
Bus and Memory Transfers

SUMMARY OF [Link] MICROOPERATIONS

AB Transfer content of reg. B into reg. A


AR  DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A Transfer a binary constant into reg. A
constant Transfer content of R1 into bus A and, at the same time,
ABUS  R1, transfer content of bus A into R2
R2  ABUS Address register
AR Data register
DR Memory word specified by reg. R
M[R] Equivalent to M[AR]
M Memory read operation:
DR transfers content of
 memory word specified by AR into DR
Memory write operation: transfers content of
M DR into memory word specified by
AR
M
Arithmetic Microoperations

MICROOPERATIONS

• Computer system microoperations are of four


types:

- Register transfer microoperations


- Arithmetic microoperations
- Logic microoperations
- Shift microoperations
Arithmetic Microoperations

ARITHMETIC
MICROOPERATIONS
• The basic arithmetic
microoperations are
• Addition
• Subtraction

• Decrement
Increment

• The additional arithmetic microoperations are


• Add with carry
• Subtract with borrow
• Transfer/Load
• etc. …
Summary of Typical Arithmetic Micro-Operations
R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
Arithmetic Microoperations

BINARY
ADDER / SUBTRAC TO R / INCREMENTER
B3 A3 B2 A2 B1 A1 B0 A0
Binary Adder
FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B 3 A3 B 2 A2 B 1 A1 B 0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

A 2 A 1 A 0 1
Binary Incrementer A 3

x x y x x y
y H A y H A
H A H A
C S C S
C S C S

C 4 S 3 S 2 S 1 S 0
Arithmetic Microoperations

ARITHMETIC
CIRCUIT Cin
S1
S0
X0 C0
A0 S1 D0
S0 FA
B0 0 Y0 C1
1
2
3 4x1
MUX
A1 X1 C1
S1 FA D1
S0
B1 0 Y1 C2
1
2
3 4x1
MUX
A2 X2 C2
S1 FA D2
B2 S0
0 Y2 C3
1
2
3 4x1
A3 MUX X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Micro-operation


0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
Logic Microoperations

LOGIC MICROOPERATIONS

• Specify binary operations on the strings of bits in registers


• Logic microoperations are bit-wise operations, i.e., they work on the individual
bits of data
• useful for bit manipulations on binary data
• useful for making logical decisions based on the bit value

• There are, in principle, 16 different logic functions that can be


defined over
B F0 F1 F2 … F13 F F
two binary inputAvariables 14 15

0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement


four of these
• AN D (), OR (), X OR (), C omplement/NOT

• The others can be created from combination


of these
Logic Microoperations

LIST OF LOGIC MICROOPERATIONS


• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
- n binary vars → 2 n functions
2

• Truth tables for 16 functions of 2 variables and the


corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
Logic Microoperations

HARDWARE IMPLEMENTATION OF
LOGIC MICROOPERATIONS
Ai 0

1
4X1
Bi
2

F i MUX
3 Select

S1

S0

Function table
S1 Output -operation
S0
0 F=AB AND
0 F=AB OR
0 F=A XOR
1 B Comple
1 F = A’ ment
0
1
Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Logic microoperations can be used to manipulate


individual bits or a portions of a word in a register

• Consider the data in a register A. In another register, B, is


bit data that will be used to modify the contents of A

• Selective-set A A + B
• Selective- A A 
complement B A A
• Selective-clear • B’ A 
• Mask (D elete) A•B A
• Clear A B
• Insert A  (A •
• Compare B) + C
• ... A A 
Logic Microoperations

SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to set


certain bits in A

1100 At
1
1011
10 B
(A  A +
At+
0 B)
1
• If a bit in B is set to 1, that same position in A gets set to 1, otherwise
that bit in A keeps its previous value
Logic Microoperations

SELECTIVE COMPLEMENT

• In a selective complement operation, the bit pattern in B


is used to
complement certain bits in A

1100 At
1
0011
10 B
(A  A 
At+
0 B)
1
• If a bit in B is set to 1, that same position in A gets
complemented from its original value, otherwise it is
unchanged
Logic Microoperations

SELECTIVE CLEAR

• In a selective clear operation, the bit pattern in B is used to


clear certain bits in A

1100 At

1 0 1 0B
010 (A  A 
At+
0 1
B’)

• If a bit in B is set to 1, that same position in A gets set to 0,


otherwise it is unchanged
Logic Microoperations

MASK OPERATION

• In a mask operation, the bit pattern in B is used to clear


certain bits in A

1100 At
1
1001
00 (A  A B
At+
0 B)
1
• If a bit in B is set to 0, that same position in A gets set to 0,
otherwise it is unchanged
Logic Microoperations

CLEAR OPERATION

• In a clear operation, if the bits in the same position in A


and B are the same, they are cleared in A, otherwise
they are set in A

1100 At

11
0 01
10 (A  A B

At+
0 1
B)
Logic Microoperations

INSERT OPERATION
• An insert operation is used to introduce a specific bit
pattern into A register, leaving the other bit positions
unchanged
• This is done as
• A mask operation to clear the desired bit positions, followed
by
• An OR operation to introduce the new bits into the desired
positions
• Example
• Suppose you wanted to introduce 1010 into the low order
four bits of A:
• 1101 1000 1011 0001 A (Original)
1101 1000 1011 0001 A (Original)
1111 1111 1111 0000 Mask
1101 1000 1011 1010 A (Desired)
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)
Shift Microoperations

SHIFT MICROOPERATIONS
• There are three types of shifts
• Logical shift
• Circular shift
• Arithmetic shift

• What differentiates them is the information that goes into


the serial input

•A right shift operation


Serial
input

•A left shift Serial


operation input
Shift Microoperations

LOGICAL SHIFT
• In a logical shift the serial input to the
shift is a 0.

• A right logical shift operation:


0

• A left logical shift


0
operation:

• In a Register Transfer Language, the following


notation is used
• shl for a logical shift left
• shr for a logical shift right
• Examples:
• R2  shr R2
• R3  shl R3
Shift Microoperations

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out of
the other end of the register.

• A right circular shift operation:

• A left circular shift


operation:

• In a RTL, the following notation


is used
• cil for a circular shift left
• cir for a circular shift right
• Examples:
• R2  cir R2
• R3  cil R3
Shift Microoperations

ARITHMETIC SHIFT
• An arithmetic shift is meant for signed binary numbers
(integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep
the sign of the number the same as it performs the
multiplication or division

sign
• A right arithmetic shift operation:
bit

0
• A left arithmetic
sign
shift
operation: bit
Shift Microoperations

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the
overflow
sign
bit
0

Before the shift, if the leftmost two


V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used


– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT


MICROOPERATIONS

Serial 0 for shift right (down)


Select 1 for shift left (up)
input (IR)

S
MUX H0

0
A0 1

A1 S
MUX H1

A2 0
1
A3
S
MUX H2
0
1

S
MUX H3

0
1
Serial
input (IL)
Shift Microoperations

ARITHMETIC LOGIC
SHIFT UNIT S3
S2
S1 Ci
S0
Arithmetic Di
Circuit
Select
0 4x1
Ci+1 1 Fi
2
3
MUX
Logic Ei
Bi
Ai
Ai-1 Circuit shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function


0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+ Addition
0 0 0 1 1 B Add with
0 0 1 0 0 F=A+ carry
0 0 1 0 1 B+1 Subtract with borrow
0 0 1 1 0 F=A+ Subtraction
0 0 1 1 1 B’ Decrement A
0 1 0 0 X F = A + B’+ TransferA
0 1 0 1 1 F=A-1 AND
0 1 1 0 X F=A OR
0 1 1 1 F=AB XOR
1 0 X X X F=AB Complement A
1 1 X X F = A  Shift right A into
X B F = A’ F Shift left A into
F = shr A F
X
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Visakhapatnam
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Department of Computer Science and Engineering, GST, GITAM,
Visakhapatnam
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Department of Computer Science and Engineering, GST, GITAM,
Visakhapatnam
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REGISTER TRANSFER
LANGUAGE

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REGISTER
TRANSFER

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BUS A N D MEMORY
TRANSFERS

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ARITHMETIC MICRO
OPERATIONS

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LOGIC MICRO-
OPERATIONS

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SHIFT MICRO-
OPERATIONS

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ARITHMETIC LOGIC A N D SHIFT
UNIT

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SUMMARY --
OUTCO MES

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