CPU-MEMORY COMMUNICATION
The CPU addresses the memory both for a memory
read operation and a write operation
Memory Read Operation
1. The CPU sends the address of the location
2. The CPU sends the memory read signal
3. On receiving the memory read signal, the
memory starts reading from the memory location
pointed by the address, the time taken for the
read operation is the access time.
4. After the access time, the memory puts the
content of the location on the data lines
CPU OPERATION Contd
Fetch phase: An
instruction is fetched
Fetch instruction
from memory
Execute phase: the
instruction is Execute instruction
analysed and
relevant operations
are performed
Figure 5. Instruction Cycle Phases
CPU-MEMORY COMMUNICATION
Address
Memory read
CPU Memory
Data
Figure 1. Memory Read Operation
Example
Example 1
A CPU has a 12-bit address for memory addressing:
(a) What is the memory addressability of the CPU?
(b) If the memory has a total of 16KB, what is the word
length of the memory?
Solution
No. of address bits = ?
Memory addressability = 2? =
Memory capacity = 16 KB
Word length = ?
CPU-MEMORY COMMUNICATION
Memory Write Operation
1. The CPU sends the address of the location
2. The CPU sends the data to be written
3. The CPU sends the memory write signal
4. On receiving the memory write signal, the memory
starts writing operation in the location corresponding
to the address, till the access time is over, as in Figure
2
Communication Registers in Memory R/W Operations
The CPU puts the memory address in the Memory
Address Register (MAR)
The CPU stores the data in the Memory Buffer Register (MBR)
during a write operation, as shown in Figure 3, while
The memory stores data in the MBR during a read operation
CPU-MEMORY COMMUNICATION
Memory Write Operation
Address
Memory write
CPU Memory
Data
Figure 2. Memory Write Operation
ECE 3252
COMPUTER
ARCHITECTURE
Engr. Professor Alice
Oluwafunke Oke
Department of Computer Engineering, ACU, Oyo
CPU OPERATION Contd
Fetch
Operation code Operand instruction
Decode
Figure [Link] format instruction
Fetch
Consider an ADD instruction Operands
whose instruction format is as
Do
shown addition
Store
ADD opcode I operand address II operand address Result
Figure 6b. ADD Instruction format Figure 6c. Instruction
Cycle steps
CPU-MEMORY COMMUNICATION
Address
MAR
Memory
CPU
Data
MBR
Figure 3. CPU Registers for Memory access
CPU-MEMORY COMMUNICATION
Synchronous and Asynchronous Memory Interface
There are two types of CPU-memory interfaces
implemented in different computer systems:
Synchronous Interface
Asynchronous Interface
Synchronous Interface
The time taken by the memory for read/write operations is fixed
and always the same. Hence, there is no feedback from memory
to the CPU for the completion of the read/write operation
Asynchronous Interface
The time taken by the memory for read/write operations is not
fixed. Hence, there is a feedback from memory to the CPU
through the status signal of Memory Function Complete (MFC) or
Memory Operation Complete (MOC)
CPU-MEMORY COMMUNICATION
Synchronous and Asynchronous Memory Interface
Address
Memory read
CPU Memory write Memory Figure 4a. Synchronous
Memory Interface
Data
Address
Memory read
CPU Memory write Memory Figure 4b. Asynchronous
Memory Interface
Data
MFC
CPU OPERATION
The function of the CPU is to execute the program
stored in the memory
It executes the program: fetches one instruction at a
time, executes it, and takes up the next instruction.
This action is done repeatedly and is known as the
instruction cycle, as shown in Figure 5.
The instruction cycle consists of two phases:
Fetch phase and
Execute phase
CPU OPERATION Contd
Instruction Fetch: The control unit is responsible for this
action though external to it, fetches instruction from the
main memory.
Instruction Decode: The control unit is responsible for this
action, it is internal to it, analyses the opcode pattern in the
instruction and identifies the exact operation specified.
Operand Fetch: The control unit is responsible for this
action, it can be external or internal depending on the
location of the operands, fetches the operands one by one
from the main memory or registers and supply them to ALU
Execute ADD: The action is performed by the ALU, the
specified arithmetic or logical operation is done
Result store: It is the control unit’s action (external or
internal), stores the result in memory or register.
