Chapter 3

Intel 8086 PROCESSOR PROGRAMING &

INSTRUCTION SETS

It is never too late to be what you might have been.

se instructor : Dugasa Getac

Your time is limited, so don’t waste it living someone else’s life.
1
Outline of the chapter
Introduction

8086 Addressing Modes

Introduction to Assembly
Language Programming

Instruction Set of 8086

DTM 2
 Introduction

• The 8086 has about 117 different instructions

with about 300 opcodes.
• The 8086 instruction sets can contain no operand,
single operand, and two operand instructions.
• The 8086 instructions do not permit memory to
memory operations except for string instructions
which involve array operations.
• The processor can access memory in different
ways that are collectively called addressing mode.

DTM 3
 8086 Addressing Modes
• The addressing modes describe the types of operands
and the way they are accessed for executing an
instruction.
• The number of addressing modes is determined when the
microprocessor is designed and cannot be changed. The
8086 provides a total of seven distinct addressing modes:
1. Register 5. Based relative
2. Immediate 6. Indexed relative
3. Direct 7. Based indexed
4. Register indirect relative
MOV instructions are used to explain
addressing modes.
DTM 4
 8086 Addressing Modes
A)Register Addressing Mode: MOV reg1,
reg2;
Relatively fast transfer since memory is not
accessed. Examples:
– MOV BX, DX ; copy the contents of DX into BX
– MOV ES, AX ; copy the contents of AX into ES
– ADD AL, BH ; add the contents of BH to Contents
of AL.
The size of reg1 and reg2 must be the same. MOV
CL, AX is illegal for instance.DTM 5
 8086 Addressing Modes
B) Immediate Addressing Mode: MOV reg,
constant;
It can be used to load info into any of the registers
except the segment registers and flag register.
Examples:
– MOV AX, 2550H ; move 2550H into AX
– MOV CX, 625 ; load the decimal value 625 into CX
– MOV BL, 40H ; load 40H into BL
MOV DS, 0123H; is illegal! Instead we can use: MOV AX, 0123H followed
by MOV DS, AX

DTM 6
 8086 Addressing Modes

C) Direct Addressing Mode: MOV reg,

[constant] or MOV [constant], reg; here
constant is not operand but it is an offset or
EA in memory of operand. Example:
MOV DL, [2400H]; move contents of DS: 2400H into DL
Exercise 3-1: Find the physical address of the memory location and its
contents after the execution of the following, assuming that DS = 1512H.
MOV AL, 99H
MOV [3518H], AL

DTM 7
 8086 Addressing Modes

D) Register indirect Addressing Mode: MOV reg1,

[reg2] or MOV [reg2], reg1; here the address of the
memory location where the operand resides is held
by a register, reg2.
• reg1 can be any general purpose register and
reg2 can be either of SI, DI, or BX
Example: MOV AL, [BX] ; moves into AL the contents of the memory
location pointed to by DS:BX
MOV CL, [SI] ; move contents of DS:SI into CL
MOV [DI], AH; move contents of AH into DS:DI
MOV DX, [BX]; move contents of DS:BX into DL and contents of DS:BX+1 into DH

DTM 8
 8086 Addressing Modes

Exercise 3-2: Assume that DS = 1120H, SI = 2498H, and AX = 17FEH.

Show the contents of memory locations after the execution of MOV [SI],
AX

Solution: The contents of AX are moved into memory locations with logical
address DS: SI and DS: SI + 1;
therefore, the physical address starts at DS (shifted left) + SI = 13698.
According to the little endian convention, low address I3698H contains FE, the
low byte, and high address 13699H will contain 17, the high byte.

DTM 9
 8086 Addressing Modes
E) Based relative Addressing Mode: MOV reg1,
[reg2]+const or MOV [reg2]+const, reg1; const is
an 8-bit displacement value.
• reg1 can be any general purpose register and
reg2 can only be either of BP or BX
• The default segments used for the calculation
of the physical address (PA) are DS for BX and
SS for BP. PA= DS*10H+BX+const; EA=BX + const
or PA=SS*10H+BP+const and EA= BP + const

DTM 10
 8086 Addressing Modes
Examples:
MOV CX, [BX]+10 ; move DS:BX+10 and DS:BX+10+1 into CX. PA = DS*10H+ BX +
10,
MOV AL, [BP]+5 ;PA = SS*10H + BP + 5
Alternative codings for MOV reg1, [reg2]+const is
MOV reg1, [reg2+const] or
MOV reg1, const[reg2]
for instance, MOV CX, [BX]+10 is same as
"MOV CX, [BX+10]" or
"MOV CX, 10[BX]"

DTM 11
 8086 Addressing Modes
F) Indexed relative Addressing Mode: MOV reg1, [reg2]+const or
MOV [reg2]+const, reg1; const is an 8-bit displacement value.
• reg1 can be any general purpose register and reg2 can only be
either of DI or SI
• PA= DS*10H+DI+const; EA=DI+ const or PA=DS*10H+SI+const and
EA= SI + const
• Examples: MOV DX, [SI]+5
;PA = DS (shifted left) + SI + 5
MOV CL, [DI]+20 ;PA = DS (shifted left) + DI + 20

DTM 12
 8086 Addressing Modes
Exercise 3-3: Assume that DS = 4500, SS = 2000, BX = 2100,
SI = 1486, DI = 8500, BP = 7814, and AX = 2512. Show the
exact physical memory location where AX is stored in each of
the following. All values are in hex.
a)MOV [BX]+20,AX c)MOV [DI]+4,AX
b)MOV [SI]+10,AX d)MOV [BP]+12,AX
Solution: In each case PA = segment register (shifted left) + offset
register + displacement.
(a) DS:BX+20 location 47120 = (12) and 47121 =(25)
(b) DS:SI+10 location 46496 = (12) and 46497 = (25)
(c) DS:DI+4 location 4D504 = (12) and 4D505 = (25)
(d) SS:BP+12 location 27826 = (12) and 27827 = (25)

DTM 13
 8086 Addressing Modes
G) Based Indexed Addressing Mode: MOV reg1, [reg2]
[reg3]+const or MOV [reg2][reg3]+const, reg1; const is an 8-
bit displacement value.
• reg1 can be any general purpose register and reg2 can
only be either of DI or SI and reg3 can only be either of BX
or BP.
• PA= DS*10H+BX+DI+const; EA=DI+BX+ const or
PA=SS*10H+BP+SI+const and EA= SI +BP+ const
Examples:
MOV CL,[BX][DI]+8 ;PA = DS (shifted left) + BX + DI +
8
MOV CH,[BX][SI]+20 ;PA = DS (shifted left) + BX + SI +
20
MOV AH,[BP][SI]+29 ;PA = SS (shifted left) + BP + SI +
29 DTM 14
Note that "MOV AX, [SI][DI]+displacement" is illegal.
 8086 Addressing Modes

Summary of addressing modes

DTM 15
 8086 Addressing Modes

Summary of addressing modes

DTM 16
 8086 Addressing Modes
Summary of addressing modes

DTM 17
 Introduction to Assembly Language Programming

• Program execution in any microprocessor system

consists of fetching binary information from memory
and decoding that information to determine the
instruction represented.
• For us it is much easier to remember the mnemonic
SUB AX,AX than the corresponding machine code
2BC0.
• For this reason, we write source files containing all the
instruction mnemonics needed to execute a program.

DTM 18
 Introduction to Assembly Language
Programming

• The source file is converted into an object file, containing

the actual binary information the machine will understand,
by a special program called an assembler.
• Some assemblers allow the entire source file to be written
and assembled at one time.
• Other assemblers, called single-line assemblers, work with
one source line at a time and are restricted in operation.
• The DEBUG utility that comes with DOS and Windows (up
to Windows XP) contains a built-in, single-line assembler.

DTM 19
 Introduction to Assembly Language
Programming
• We use a cross-assembler instead of single-line assembler.
• Figure 3.1 shows source program assembling process.
• The source file in the example, TOTAL.ASM, is presented as
input to the assembler. The assembler will convert all source
statements into the correct binary codes and place these into
the object file TOTAL.OBJ.
• A second file created by the assembler is the list file,
TOTAL.LST, which contains all the original source file text plus
the additional code generated by the assembler. The list file
may be displayed on the screen, or printed. The object file
may not be printed or displayed, since it is just code. next

DTM 20
Introduction to Assembly Language
Programming

DTM 21
 Introduction to Assembly Language
Programming

• The sample source file, a subroutine

designed to find the sum of 16 bytes
stored in memory.

DTM 22
 Introduction to Assembly Language
Programming

• The list file for our example subroutine

looks like this:

DTM 23
 Introduction to Assembly Language
Programming

• Assembler Directives ORG, SEGMENT, ENDS, ASSUME, and END

• When writing 8086 source files, we separate code

areas from data areas.
• We may even have a separate area reserved for
the stack.
• The new source file for TOTAL, which includes
separate areas called segments, contains many
new pseudo codes to help the assembler generate
the correct machine code for the object file.

DTM 24
Introduction to Assembly Language
Programming

DTM 25
 Introduction to Assembly Language
Programming

• Most assemblers now accept simplified

segment directives and automatically
generate the necessary code to manage
segments.
• The TOTAL source file, rewritten with
simplified segment directives, now looks
like:

DTM 26
Introduction to Assembly Language
Programming

DTM 27
 Introduction to Assembly Language
Programming

• The first directive, .MODEL, instructs the assembler that

the type of program being created falls into a category
called SMALL.
• All of the programs in this course are small programs.
Other models are as indicated in Table 3.4.
• The .DATA directive indicates the beginning of a data
segment. There is no need to indicate the end of the data
segment. This is automatically assumed when the .CODE
directive is encountered, which begins the code segment.

DTM 28
Introduction to Assembly Language
Programming

DTM 29
 Introduction to Assembly Language
Programming

• When a large program must be written by a team of people, each

person will be assigned a few subroutines to write.
• They must all assemble and test their individual sections to
ensure the code executes correctly.
• When all portions of the program (called modules, after a
technique called modular programming) are assembled and
tested, their object files are combined into one large object file
via a program called a linker.
• Figure 3.2 represents this process. The linker examines each
object file, determining its length in bytes, its proper place in the
final object file, and what modifications should be made to it.
• In addition, a special collection of object files is sometimes
available in a library file.

DTM 30
Introduction to Assembly Language
Programming

DTM 31
 Introduction to Assembly Language
Programming
• When the linker is through, the final code is written to a file
called the load module. Another program called a loader takes
care of loading the program into memory.
• Usually the linker and loader are combined into a single
program called a link-loader.
• So, writing the source file is actually only the first step in a long
process.
• But even before a source file can be written, the programmer
must understand the instructions that will be used in the
source file.
• The remaining sections will begin coverage of this important
topic, Instruction Set of 8086.
DTM 32
 Instruction Set of 8086
• The instruction set of the 8086 microprocessor
is divided into seven different groups:
i. Data transfer
ii. Strings
iii. Arithmetic
iv. Bit manipulation
v. Loops and jumps
vi. Subroutine and interrupt
vii. Processor control
DTM 33
 Instruction Set of 8086

i. Data transfer Instructions: This group of instructions

makes it possible to move (copy) data around inside the
processor and between the processor and its memory.
a) MOV; MOV Destination, Source:
• Transfer can be from register to register, register to memory or
from memory to register but not from memory to memory.
• The source and destination must be of same type i.e. either
both must be byte or word.
• MOV instruction does not affect any flags.

DTM 34
Instruction Set of 8086

DTM 35
Instruction Set of 8086

DTM 36
 Instruction Set of 8086
• In MOV [SI], 0 the processor does not know if the 0
should be coded as a byte value, or as word value.
• For cases like this, include some additional
information in the instruction's operand field.
• If you wish to MOV a byte value into memory, use
MOV BYTE PTR [SI], 0. Word values require
MOV WORD PTR [SI], 0.
• The byte ptr, and word ptr assembler directives
stand for "byte pointer," and "word pointer."

DTM 37
 Instruction Set of 8086
i. Data transfer Instructions:
b) PUSH and POP instructions: are used to load to or receive
data from the stack memory.
PUSH Source (Push Data onto Stack): decrements the stack
pointer by 2 and copies a word from a specified source to the
location in the stack segment where the stack pointer then
points.
The source of the word can be a general- purpose register, a
segment register, or memory.
No flags are affected by this instruction.

DTM 38
 Instruction Set of 8086
EXAMPLES:
PUSH BX; Decrement SP by 2, copy BX to stack
PUSH DS; Decrement SP by 2, copy DS to stack
PUSH AL; Illegal, must push a word
PUSH TABLE [BX]; Decrement SP by 2, copy word from memory in
DS at EA = TABLE + [BX] to stack
PUSHA ; Save all 16-bit registers onto the stack in the following
order: AX, CX, DX, BX, SP, BP, SI, DI. The value of the SP is that before the
PUSHA instruction.
PUSHF; copies the contents of the flag register to the stack.

DTM 39
Instruction Set of 8086

DTM 40
Instruction Set of 8086

DTM 41
 Instruction Set of 8086
i. Data transfer Instructions:
d) POP; POP Destination: copies a word from the stack location
pointed to by the stack pointer to a destination specified in the
Instruction.
The destination can be a general-purpose register, a segment
register, or a memory location. The data in the stack is not changed.
After the word is copied to the specified destination, the stack
pointer is automatically incremented by 2 to point to the next word
on the stack.
No flags are affected by the POP instruction.

DTM 42
 Instruction Set of 8086

EXAMPLES:
POP DX; Copy a word from top of stack to DX Increment SP by 2
POP DS; Copy a word from top of stack to DS Increment SP by 2
POP TABLE [BX]; Copy a word from top of stack to memory in
DS with EA = TABLE +[BX]
• NOTE: POP CS Is illegal.

DTM 43
Instruction Set of 8086

DTM 44
 Instruction Set of 8086
POPA Destination (Pop All Registers).
All general purpose registers are popped from the stack in the order indicated in
Table 3-6.
Note that the contents of the SP are not loaded with the data popped off the stack.
This is necessary to prevent the stack from changing locations halfway through the
execution.

DTM 45
 Instruction Set of 8086
Overflow and Underflow of Stack:
PUSH instruction decrements SP by 2. At some point, if
SP=0000H and if there is an attempt to PUSH data on the stack,
Stack overflow will result.
On the other hand, POP instruction increments SP by 2. At
some point, if SP=FFFFH and if there is an attempt to POP data
from the stack, Stack Underflow will result.

DTM 46
 Instruction Set of 8086
IN Accumulator, Port (Input Byte or word from Port):
Data read from an input port always ends up in the accumulator.
IN: copy data from a port. Port can be direct or indirect.
Indirect: If a full 16-bit port address must be specified, the port address is loaded
into register DX, and IN AL,DX or IN AX, DX is used to read the input port.
Direct; If the port number is between 00 and FFH, for instance, to input from port
80H we would use IN AL,80H or IN AX,80H. Using AL in the operand field causes 8
bits of data to be read. Two bytes can be input by using AX in the operand field.

DTM 47
 Instruction Set of 8086

OUT Port, Accumulator (Output Byte or Word to

Port):
With OUT, we can send 8 or 16 bits of data to an
output port.
The port address may be loaded into DX for use
with OUT DX, AL or OUT DX, AX, or specified within
the instruction, as in OUT 80H,AL or OUT 80H, AX.

DTM 48
 Instruction Set of 8086

i. Data transfer Instructions:

LEA Destination, Source (Load Effective Address):
Determines the offset of the variable or memory
location named as the source and loads this address in
the specified 16-bit register.
Flags are not affected by LEA instruction.

DTM 49
 Instruction Set of 8086
i. Data transfer Instructions:
LEA Destination, Source (Load Effective Address):
This instruction is used to load the offset of the source memory
operand into one of the processor's registers.
The memory operand may be specified by any number of addressing
modes. The destination may not be a segment register.
MOV BX, 35h
MOV DI, 12h
LEA SI, [BX+DI] ; SI = 35h + 12h = 47h
Note: The integrated 8086 assembler automatically
replaces LEA with a more efficient MOV where possible. For
example:
org 100h
LEA AX, m ; AX = offset of m
RET
m dw 1234h
END
DTM 50
 Instruction Set of 8086
i. Data transfer Instructions:
XCHG Destination, Source (Exchange Data):
used to swap the contents of two 8-, or 16-bit operands.
One operand must be a processor register (excluding the segment
registers). The other operand may be a register or a memory location.
If a memory location is used as an operand it is assumed to be within a
data segment.
• Example: Registers AL and BL contain 30H and 40H, respectively. What
is the result of XCHG AL, BL?
Solution: After execution, AL contains 40 and BL contains 30.
The machine code for XCHG AL, BL is 86 C3. It may be interesting to note
that the machine code for XCHG BL. AL (which performs the same
operation as XCHG AL, BL) is 86D8.
DTM 51
 Instruction Set of 8086

i. Data transfer Instructions:

XLAT Translate-Table (Translate Byte):
XLAT assumes that a 256-byte data table has been written
into memory at the starting address contained in register BX.
The number in register AL at the beginning of execution is
used as an index into the translation table.
The byte stored at the address formed by the addition of
BX and AL is then copied into AL.
The translation table is assumed to be in the data segment.
AL AL+BX+DS*10H

o Only instruction adding an 8-bit to a 16-bit number.

DTM 52
 Instruction Set of 8086

Example for XLAT Instruction

– Assume DS=0300H, BX=0100h and AL=0DH, ODH represents the ASCII code
of the character CR.
– The execution of XLAT replaces the contents of AL by the content of the
memory location with the physical address: Ph. A= DS*10H+BX
+AL=03000+0100+0DH=0310DH; Thus AL  [0310DH].
– Assuming this memory locations contains 52H (EBCDIC code for CR) this
value is placed in AL; Thus AL= 52H
– Therefore, XLAT Performs the direct table lookup technique often used to
convert one code to another .
 Extended Binary Coded Decimal Interchange Code (EBCDIC) is an 8-bit
character encoding used mainly on IBM mainframe and IBM midrange computer operating
systems

DTM 53
 Instruction Set of 8086

i. Data transfer Instructions:

Reading Assignment:
LDS
LES
LAHF and
SAHF

DTM 54
 Instruction Set of 8086
ii. String Instructions:
– A particularly nice feature of the 8086 is its ability to handle
strings.
– A string is a collection of bytes, or words that can be up to
64KB in length.
– An example of a string might be a sequence of ASCII character
codes that constitute a password, or the ASCII codes for “Good
Morning!.“
– The common operations that we can perform on any string are
copying, comparing and scanning.

DTM 55
 Instruction Set of 8086

ii. String Instructions:

– A special instruction called the repeat prefix can be used to repeat the copy,
compare, or scan.
– Register CX contains the repeat count necessary for the repeat prefix. CX is
decremented during the string operation, which terminates when CX reaches 0.
– SI register points to the first element of the source string, which must be
located in the data segment. The destination string is located in a similar way
via the DI register and must reside in the extra segment.
– Direction flag (DF) is used to control the way SI and DI are adjusted during a
string instruction. They are automatically incremented or decremented by 1, or
2, based on the value of the direction flag and the size of the string elements.

DTM 56
 Instruction Set of 8086

DTM 57
 Instruction Set of 8086
• Initializing the String Pointers
– Before we can use any string instruction, we have to set up the SI, DS, DI,
and ES registers. The source string (SHOPPER) in Figure 3-8 could be
pointed to by these instructions:
• MOV AX, 510H ; string segment-address
MOV DS, AX
MOV SI, 0 ; string offset within segment
• When the contents of SI and DS are combined to form an effective address,
05100H will be the first byte accessed in the data segment.
– A similar technique is used to initialize the destination string (SHOPPING):
• MOV AX, 4A8H ; string segment - address
MOV ES, AX
MOV DI, 0 ; string offset within segment

DTM 58
 Instruction Set of 8086
REP/ REPE/ REPZ/ REPNE/ REPNZ: are available for use by the
programmer to control the way a string operation is repeated. They are all
recognized by the assembler as prefix instructions for string operations.
– MOVS (move string) and STOS (store string) make use of the REP
prefix.
– When preceded by REP, these string operations repeat until CX
decrements to 0.
– REPE and REPZ operate the same way, but are used for SCAS (scan
string) and CMPS (compare string). Each time SCAS or CMPS
completes its operation, the zero flag is tested and execution continues
(repeats) as long as the zero flag is set.
– REPNE and REPNZ also repeat as long as CX does not equal 0 but
require that the zero flag be cleared to continue.

DTM 59
 Instruction Set of 8086
So, we have three ways to repeat string
operations:
1. Repeat while CX does not equal 0. (REP)
2. Repeat while CX does not equal 0 and the zero
flag is set. (REPE and REPZ
3. Repeat while CX does not equal 0 and the zero
flag is cleared. (REPNE and REPNZ)

DTM 60
 Instruction Set of 8086
– In each of the string instructions, the operand
can be a byte or a word.
– They are distinguished by the letters B (byte) and
W (word) in the instruction mnemonic.•

DTM 61
• MOVS Destination-string, Source-String (Move String).
This instruction is used to make a copy of the source string in
the destination string.
STRINGX DB 'SHOPPER', ODH
• MOVSB/ MOVSW (Move String). These two mnemonics can
be used in place of MOVS and cause identical execution.
Because they explicitly inform the assembler of the string size,
there is no need to include the string operands in the instruction.
Example 3-15
What instructions are necessary to make a copy of the SHOPPER
string from Figure 3-8? We want the destination string to have a
starting address of 3000H, and the index registers should auto-
increment during the string operation.

DTM 62
DTM 63
• CMPS Destination-String, Source-String (Compare String).
This instruction is used to compare two strings.
• The compare operation, as we have already seen, is
accomplished by an internal subtraction of the destination and
source operands.
• So, in this case, a byte or word from the destination string is
subtracted from the corresponding element of the source string.
If the two elements are equal, the zero flag will be set.
Different elements cause the zero flag to be cleared.
• The REPZ prefix will allow strings to be checked to see if they
are identical.

DTM 64
Example 3-16 Assume that DS:SI and ES:DI have been initialized to the starting
addresses of the two strings from Figure 3-8. If REPZ CMPS STRINGA, STRINGB is
executed with CX equal to 4, do the strings match? Do they match if CX equals 8? What
state must the direction flag be in?

Solution: The direction flag must be cleared so that SI and DI auto-increment during the
compare. When CX equals 4, the processor compares only the first 4 bytes of each
string. Because each string begins with "SHOP," the zero flag remains set throughout
the compare and we get a match. When CX equals 8, CMPS will repeat until SI and DI
point to the sixth byte in each string. Then the comparison fails due to the "E" in
"SHOPPER" and the "I" in "SHOPPING." The zero flag is then cleared and the instruction
terminates, even though CX has not yet decremented to 0. This indicates that the
strings are different.

DTM 65
SCAS Destination-String (Scan String). This instruction is used to
scan a string by comparing each string element with the value saved
in AL, or AX. AL is used for byte strings, and AX for word strings.

The string element pointed to by ES:DI is internally subtracted from

the accumulator and the flags adjusted accordingly. Once again the
zero flag is set if the string element matches the accumulator, and
cleared otherwise.

The accumulator and the string element remain unchanged. If

REPNZ is used as the prefix to SCAS, the string is effectively
searched for the item contained in the accumulator. Alternately, if
REPZ is used, a string can be scanned until an element differs from
the accumulator.
DTM 66
Example 3-17
Suppose that the ES and DI registers are initialized to point to the
starting address of the "SHOPPING" string in Figure 3-8. What is
the result of REPNZ SCAS if CX contains 9 and AL contains 4EH?

Solution: With CX set to 9, the processor will be able to scan each

element of the "SHOPPING" string. However, the REPNZ prefix
will allow the scan to continue only as long as the current string
element does not match the byte stored in AL. There is no match
between the accumulator until ES:DI points to address 04A86H. At
that point, the accumulator matches the contents of memory and the
scan terminates with the zero flag set.

DTM 67
LODS Source-String (Load String). This instruction is used to load the current
string element into the accumulator and automatically advance the SI register to
point to the next element. It is assumed that DS:SI have already been set up prior
to execution of LODS.
The direction flag determines whether SI is incremented or decremented.

Example 3-18
Refer to Figure 3-8 once again. Assume that DS:SI currently point to address
05105H and that the direction flag is set. What is the result of executing LODS
with a byte-size operand?

Solution: LODS copies the byte from the current address indicated by DS:SI
(which is 45H) into AL and then decrements SI by 1 to point to the next element.
SI is decremented because the direction flag is set. The next string element is at
address 05104H.

DTM 68
STOS Destination-String (Store String). This instruction is
used to write elements of a string into memory. The contents of
AL, or AX are written into memory at the address pointed to by
ES:DI and then DI is adjusted accordingly depending on the state
of the direction flag and the size of the string elements.

Example 3-19
We wish to modify the "SHOPPING" string of Figure 3-8 by
adding the word "MALL" to it. The carriage return code ODH
will be replaced by a blank, and the character codes for "MALL"
and another carriage return will be added. How should STOS be
used to accomplish this modification?

DTM 69
Solution: Because the modification represents 6 bytes to write
into memory, we will use the word version of STOS to write two
codes into memory at a time. First, we will write the blank code
and the letter "M." Then the codes for "A" and "L," and finally
the code for "L" and the carriage return. The direction flag will
be cleared to allow auto-incrementing of DI, and ES:DI must be
initialized to address 04A88H to begin. The necessary
instructions are as follows:

DTM 70
DTM 71
 Instruction Set of 8086
Example: Using string instructions, write a program
that transfers a block of 20 bytes of data.
.MODEL SMALL
.DATA
DATA1 DB ‘ABCDEFGHIJKLMNOPQRST’
DATA2 DB 20 DUP(?)
.CODE
;WRITE THE CODE

DTM 72
 Instruction Set of 8086
Example: write a program that uses STOSB to store
byte AAH into 100 memory locations. and uses STOSB
to change 10th memory location to 0DH.
.MODEL SMALL
.DATA
mem_location DB 100 (?)
.CODE
;WRITE THE CODE

DTM 73
 Instruction Set of 8086
Assuming that there is a spelling of “teff" in an
electronic dictionary and a user types in “teaf", write a
program that compares these two and displays the
following message, depending on the result:
1 . If they are equal, display "The spelling is correct".
2. If they are not equal, display "Wrong spelling".
.MODEL SMALL
.DATA
DATA_DICT DB "teff"
DATA_TYPED DB "teef"
MESSAGE1 DB "The spelling is correct",'$'
MESSAGE2 DB "Wrong spelling",'$'
.CODE
;write the code here
DTM 74
 Instruction Set of 8086

iii. Arithmetic Instruction

• This group of instructions provides the 8086 with
its basic integer math skills.
• Floating point math operations are handled by a
separate group of instructions.
• Addition, subtraction, multiplication, and
division can all be performed on different sizes
and types of numbers.

DTM 75
 Instruction Set of 8086

• Addition Instructions: includes

– ADD: Addition
– ADC: Addition with carry
– INC: Increment (Add 1)

DTM 76
 Instruction Set of 8086
 ADD/ADC Instruction: ADD destination, source /ADC
destination, source.
– These instructions add a number from some source to a number
from some destination and put the result in the specified
destination.
– ADC also adds the status of the carry flag into the result.
– The source may be an immediate number, a register, or a memory
location. The destination may also be a register or a memory
location.
– The source and the destination in an instruction cannot both be
memory locations.
– The source and the destination must be of the same type.
– All Flags are affected: AF, CF, OF, PF, SF, ZF.
DTM 77
Instruction Set of 8086

DTM 78
 Instruction Set of 8086
INC Instruction: INC Destination
– The INC instruction adds 1 to a specified register or
to a memory location.
– AF, OF, PF, SF, and ZF are affected (updated) by this
instruction.
– Note that the carry flag (CF) is not affected. This
means that if an 8-bit destination containing FFH
or a 16-bit destination containing FFFFH is
incremented, the result will be all 0's with no carry.

DTM 79
Instruction Set of 8086

DTM 80
 Instruction Set of 8086

Example:
Write a program that adds the following two
multiword numbers and saves the result: DATA1
= 548FB9963CE7H and DATA2 =
3FCD4FA23B8DH. The result should be saved in
DATA3.

DTM 81
 Instruction Set of 8086
 Subtraction Instructions: This group of instructions
consist of the following group of instructions.
 SUB: Subtraction
 SBB: Subtraction with borrow
 DEC: Decrement
 NEG: 2’s Complement of a number

DTM 82
 Instruction Set of 8086
 SUB/SBB Instruction: SUB destination, Source ;
SBB destination, and Source.
 These instructions subtract the number in the
source from the number in the destination put
result in the destination. The SBB, instruction
also subtracts the status of CF from the result.
 The source my be an immediate number, a
register, or a memory location. The destination
may be a register or a memory location. The
source and destination both must be word or
byte.
 Flags Affected: AF, CF, OF, PF, SF, and ZF.
DTM 83
Instruction Set of 8086

DTM 84
 Instruction Set of 8086
 DEC Instruction: DEC destination.
 The DEC instruction subtract 1 from the
specified destination.
 The destination may be a register or a memory
location.
 The AF, OF, PF, SF and ZF flags are affected.
 Note that: The CF is not affected. If the contents
of 8-bit register are 00H and 16-bit register are
0000H, after DEC instruction contents of
registers will be FFH and FFFFH respectively
without affecting CF.

DTM 85
 Instruction Set of 8086
 NEG This Instruction: Form 2’s complement;
NEG Destination
 This instruction replaces the number in a
destination with the 2’s complement of that
number.
 The destination can be a register or a
memory location. instruction can be
implemented by inverting each bit and
adding 1 to it.
 The flags that can be affected are: AF, CF,
SF, PF, ZF and OF.

DTM 86
 Instruction Set of 8086
 CMP (Comparison instruction): CMP Destination,
Source
 This instruction compares a byte from the specified
source with a byte from the specified destination, or
a word from the specified source with a word from
the specified destination.
 The source can be an immediate number, a register,
or a memory location. The destination can be a
register or a memory location.

DTM 87
 Instruction Set of 8086
 The comparison is actually done by subtracting the
source byte or word from the destination byte or
word.
 The source and the destination are not changed, but
the flags are set to indicate the results of the
comparison.
 AF, OF, SF, ZF, PF, and CF are updated by the CMP
instruction.

DTM 88
Instruction Set of 8086

DTM 89
 Instruction Set of 8086

 Multiplication Instructions: This group of

instructions consist of following group of instructions:
• MUL: Unsigned Multiplication
• IMUL: Signed Multiplication

DTM 90
 Instruction Set of 8086
 MUL Instruction: MUL source
 This instruction multiplies an unsigned byte from
source and unsigned byte in AL register or unsigned
word from source and unsigned word in AX register.
 The source can be a register or a memory location.
 When the byte is multiplied by the contents of AL,
the result is stored in AX. The most significant byte
is stored in AH and least significant byte is stored in
AL.
 When the word is multiplied by the contents of AX,
the most significant word of result is stored in DX
and least significant word of result is stored in AX.
 Flags: MUL affect AF, PF, SF, and ZF flags.
DTM 91
Instruction Set of 8086

DTM 92
 Instruction Set of 8086
 IMUL Instruction: IMUL source
 This instruction multiplies an signed byte from source and signed
byte in AL register or signed word from source and signed word in
AX register.
 The source can be a register or a memory location.
 When the signed byte is multiplied by AL, the signed result is
stored in AX. The most significant byte is stored in AH and least
significant byte is stored in AL.
 When the signed word is multiplied by AX, the most significant
word of result is stored in DX and least significant word of result
is stored in AX.

DTM 93
 Instruction Set of 8086
 If the magnitude of the product does not require all
the bits of the destination, the, unused bits will be
filled with copies of the sign bit.
 If the upper byte of a 16-bit result or the upper word
of a 32-bit result contains only copies of the sign bit
(all 0's or all 1's), then CF and the OF will both be 0.
 If the upper byte of a 16-bit result or the upper word
of a 32-bit result contains part of the product, CF and
OF will both be 1.
 You can use the status of these flags to determine
whether the upper byte or word of the product needs
to be kept. AF, PF, and ZF are undefined after IMUL.

DTM 94
Instruction Set of 8086

DTM 95
 Instruction Set of 8086
 Division Instructions: This group consists of the following group of
instructions
• DIV
• IDIV

[READING ASSINGEMENT]

DTM 96
 Instruction Set of 8086

 BCD and ASCII arithmetic instructions

 The 8086 allows arithmetic manipulation of both BCD
and ASCII data.
 This is accomplished by instructions that adjust the
numbers for BCD and ASCII arithmetic.

DTM 97
 Instruction Set of 8086
 BCD Arithmetic: Intel 8086 provides two instructions to support
BCD arithmetic.
 The DAA (Decimal Adjust after Addition) instruction that follows
BCD addition &
 The DAS (Decimal Adjust after Subtraction) which follows BCD
subtraction.
Both instructions correct the result of the addition or subtraction
so that it is a BCD number.

DTM 98
 Instruction Set of 8086
 The DAA (Decimal Adjust after Addition)
this instruction works as follows:
1. If the value of the low-order four bits (D3-D0) in the AL is greater
than 9 or if AF is set, the instruction adds 6 (06) to the low-order
four bits.
2. If the value of the high-order four bits (D7-D4) in the AL is greater
than 9 or if carry flag is set, the instruction adds 6 (60) to the
high-order four bits.

DTM 99
Instruction Set of 8086

DTM 100
 Instruction Set of 8086
 The DAS (Decimal Adjust after Subtraction)
This instruction works as follows:
1. If the value of the low-order four bits (D3-DO) in the AL is greater
than 9 or if AF is set, the instruction subtracts 6 (06) from the
low-order four bits.
2. If the value of the high-order four bits (D7-D4) in the AL is greater
than 9 or if carry flag is set, the instruction subtracts 6 (60) from
the high-order four bits.

DTM 101
Instruction Set of 8086

DTM 102
 Instruction Set of 8086
 ASCII Arithmetic: Numerical data coming into a computer from a
terminal is usually in ASCII code. In this code, the numbers 0 to 9 are
represented by the ASCII codes 30H to 39H. The 8086 provides four
instructions for ASCII arithmetic.
 AAA: ASCII adjust after addition
 AAS: ASCII adjust after subtraction
 AAM: ASCII adjust after multiplication
 AAD: ASCII adjust before division

DTM 103
 Instruction Set of 8086
 AAA: ASCII adjust after addition
 Used to add the ASCII codes for two decimal digits without
masking off the "3" in the upper nibble of each.
 After the addition, the AAA Instruction is used to make sure
the result is the correct unpacked BCD.

DTM 104
 Instruction Set of 8086
Example 3.35 Register AX is loaded with 0033H. Register BL is loaded
with 39H. ADD AL, BL is executed, giving AL a new value of 6CH. What
happens if AAA is executed next?

Solution: AAA will see the C part of 6CH and correct it to 2 (by adding 6).
Next, the upper 4 bits of AL will be cleared. Now AL contains 02. Because
the lower 4 bits of AL (prior to execution of AAA) were greater than 9, 1
will be added to AH, making its final value 01. We end up with AX
containing 0102H. If we now add 30H to each byte in AX, we will get
3132H, the two ASCII digits that represent 12.

DTM 105
 Instruction Set of 8086
 AAS: ASCII adjust after subtraction
 This instruction performs the same correction procedure that AAA does, except it is used
after SUB or SBB to modify the results of a subtraction. Also, if the number in the lower 4
bits of AL is greater than 9, 1 will be subtracted from AH.

 Used to subtract the ASCII codes for two decimal digits without masking the
"3" in the upper nibble of each.
 The AAS instruction leaves the correct unpacked BCD result in the low
nibble of AL and resets the upper nibble of AH to all 0's.
 If you want to send the result back to a CRT terminal, you can OR AL with
30H to produce the correct ASCII code for the result.
 If multiple-digit numbers are being subtracted, the CF can be taken into
account by using the SBB instruction when subtracting the next digits.
 The AAS instruction works only on the AL register. It updates AF and CF, but OF, PF,
SF, and ZF are left undefined.

DTM 106
 Instruction Set of 8086
Example 3-36 AX is loaded with 0037H and BL is loaded with 32H. SUB AL,
BL is executed and the processor replaces the contents of AL with 05H. What
happens if AAS is now executed? What are the results if BL was initially loaded
with 39H?

Solution: Because the number in the lower 4 bits of AL (5) is not greater than 9,
AAS does not change it. The upper 4 bits of AL are cleared. Because no change
was needed, there is no need to add 1 to AH.
The final value of AX is 0005H. Adding 30H to each byte in AX gives 3035H, the
two ASCII codes for the number 05. If BL is initially loaded with 39H, the result
of SUB AL, BL is FEH, which is placed in AL.

When this value is examined by AAS, the E in FEH will be changed to 8 (by
subtracting 6) and the upper 4 bits will be cleared. AL now contains 08H. Note
that 7 minus 9 is -8 using 10s complement BCD arithmetic. AL now contains the
8 part of the answer. Because AL required modification, AH will be decremented.
The final value of AX is FF08H (-2 in BCD). The FFH in AH indicates that a
borrow occurred (and so does the carry flag). Adding .30H to AL results in the
correct ASCII code for 8 (which is 38H).DTM 107
 Instruction Set of 8086
 AAM: ASCII adjust after multiplication
 After the two unpacked BCD digits are multiplied, the AAM
instruction is used to adjust the product to two unpacked BCD
digits in AX.

DTM 108
 Instruction Set of 8086
 AAD: ASCII adjust before division
 AAD converts two unpacked BCD digits in AH and
AL to the equivalent binary number in AL.
 This adjustment must be made before dividing the
two unpacked BCD digits in AX by an unpacked
BCD byte.
 After the division, AL will contain the unpacked
BCD quotient and AH will contain the unpacked
BCD remainder.
 PF, SF, and ZF are updated. AF, CF, and OF are
undefined after AAD.

DTM 109
Instruction Set of 8086

DTM 110
 Instruction Set of 8086
iv. Bit manipulation Instructions
– The instructions in this group are used to perform
Boolean (logical) operations on binary data, shift or
rotate bits left or right in register or memory
operands.
– These operations are very useful when converting
data from one form to another or for manipulating
specific patterns, such as a single bit that moves
through each position of a register.
– These instructions include: NOT, AND, OR, XOR, TEST, SHL/SAL, SHR, SAR,
ROL, ROR, RCL, & RCR
DTM 111
 Instruction Set of 8086
 NOT Instruction; NOT Destination
o The NOT instruction inverts each bit (forms the 1's complement)
of the byte or word at the specified destination.
o The destination can be a register or a memory location.
o No flags are affected by the NOT Instruction.
 EXAMPLES:
NOT BX ; Complement contents of BX register
NOT BYTE PTR [BX] ;Complement memory byte at
offset [BX] in data segment

DTM 112
 Instruction Set of 8086
 AND Instruction: AND Destination, Source

• ANDs each bit in a source byte or word with the same number bit in a
destination byte or word. The result is put in the specified destination.
• The contents of the specified source will not be changed.
• A bit can be masked (reset) by ANDing it with 0.
• The source operand can be an immediate number, the contents of a
register, or the contents of a memory location.
• The destination can be a register or a memory location.
• The source and the destination cannot both be memory locations in
the same instruction.
• Flags: CF and OF are both 0 after AND. PF, SF, and ZF are updated by
AND. AF is undefined. Note that PF has meaning only for an 8-bit
operand.

DTM 113
 Instruction Set of 8086
EXAMPLES :
AND CX, [SI] ;AND word in DS at offset [SI] with word in CX
register ;Result in CX register
AND BH, CL ;AND byte in CL with byte in BH Result in BH
AND BX, 00FFH ;AND word in BX with immediate 00FFH.
Masks upper byte, leaves lower byte unchanged
If BX = 10110011 01011110 then AND BX, 00FFH Mask out
upper 8 bits of BX and the Result: BX = 00000000 01011110 CF,
OF, PF, SF, ZF = 0

DTM 114
 Instruction Set of 8086
 OR Instruction; OR Destination, Source
• This instruction ORs each bit in a source byte or word with the
corresponding bit in a destination byte or word. The result is put in the
specified destination.
• The contents of the specified source will not be changed.
• A bit in the destination operand can be set to a 1 by simply ORing that bit
with a 1 in the same bit of the source operand. A bit ORed with 0 is not
changed.
• The source operand can be an immediate number, the contents of a register,
or the contents of a memory location .
• The destination can be a register or a memory location.
• The source and the destination cannot both be memory locations in the same
instruction.
• Flags: CF and OF are both 0 after OR. PF, SF, and ZF are updated by the OR
instruction. AF is undefined after OR.

DTM 115
 Instruction Set of 8086

EXAMPLES (SYNTAX):
OR AH, CL ; CL ORed with AH, result in AH. CL not changed
OR BP, SI ; SI ORed with BP, result in BP. SI not changed
OR SI, BP ; BP ORed with SI, result in SI. BP not changed
OR BL, 80H ; BL ORed with immediate 80H. Set MSB of BL to a 1
OR CX, TABLE [BX][SI] ; CX ORed with word from effective address
TABLE[BX][SI] in ;data segment.
OR CX, 0FF00H ; If CX = 00111101 10100101 then OR CX with
immediate
;FF00H, Result in CX = 11111111 10100101
;CF=0,OF=0,PF= 1,SF= 1,ZF=0.

DTM 116
 Instruction Set of 8086
 XOR Instruction; XOR Destination, source
• This instruction Exclusive-ORs each bit in a source byte or word
with the same number bit in a destination byte or word.
• The result replaces the contents of the specified destination. The
contents of the specified source will not be changed.
• A bit Exclusive-ORed with a 1 will be inverted. A bit Exclusive-
ORed with a 0 will not be changed.
• The source operand can be an immediate number, the contents of a
register, or the contents of a memory .
• The destination can be a register or a memory location. The source
and destination cannot both be memory locations in the same
instruction.
• Flags: CF and OF are both 0 after XOR. PF, SF, and ZF are
updated. PF has meaning only for an 8-bit operand. AF is
undefined after XOR.
DTM 117
 Instruction Set of 8086

EXAMPLES:
XOR CL,BH ;Byte in BH Exclusive-ORed with byte in CL. Result in CL.
;BH not chanced
XOR BP,DL ;Word in DI Exclusive-ORed with word in BP. Result
;in BP. DI not changed
XOR WORD PTR [BX], 00FFH ;Exclusive-OR immediate number
;OOFFH with word at offset [BXI in data
;segment. Result in memory location [BX]
; If BX = 0011110 01101001 , CX = 00000000 11111111
XOR BX,CX ; Result: BX = 0011110110010110 Note bits in lower
;byte are inverted CF,OF,SF,ZF = 0, PF = 1, AF

DTM 118
 Instruction Set of 8086
 TEST Instruction; TEST Destination, source

• This instruction ANDs the contents of a source byte or word with the
contents of the specified destination word.
• Flags are updated, but neither operand is changed.
• The TEST instruction is often used to set flags before a Conditional
Jump instruction.
• The source operand can be an immediate number, the contents of a
register, or the contents of a memory .
• The destination operand can be in a register or in a memory location.
The source and the destination cannot both be memory locations in an
instruction.
• Flags: CF and OF are both 0's after TEST. PF, SF, and ZF will be
updated to show the results of the ANDing. PF has meaning only for
the lower 8 bits of the destination. AF will be undefined.
DTM 119
Instruction Set of 8086

DTM 120
 Instruction Set of 8086
 Shift and rotate instructions
 PF, SF and ZF flags are affected by shift instructions but left unchanged by the
rotate instructions
 Shift Instructions: (SHL, SHR, SAL, SAR)
• SHL Shift Logical Left Instruction : SHL Target , Coun t ;
o SHL Targ et , 1 ;
o SHL Targ et , CL ;
• SH L m u l t i p l i e s t h e n u m b e rs i g n e d or u n s i g n e d by 2 on
each shift
• The target can be a register or a memory

DTM 121
• SHR Shift Logical Right Instruction : Targe t,
SH R C ou n t ;
o SH R Ta rget , 1 ;
o SH R Ta rget ,
CL ; o r u n s i g by 2 on e a
number
SH L d i v i d e st s i g nn e d ch
shi f t he ed
T h e t a rge t be a regi st e r o r a
ca n … memo r y
…
Carry
SHR 0

Ex: MOV AL,8 Target

SHR AL,1
MOV
BL,16
MOV CL,3 ;
SHR
BL,CL DTM 122
Shift Instruction

• SAL Shift Arithmetic left Instruction :

o S AL Ta rget , 1 ;
o S AL Ta rget , C L ;
S A L di v i de s a si gn e d n u mb e r 2 o n shi f t
by
T h e t a rge t ca n be regi st e r o r ea c h a
a memo r y
… …
Carry
SAL 0
Ex: MOV AL,8 Target

SAL AL,1
MOV BL,16
MOV CL,3
SAL BL,CL ;

123
Shift Instruction

• SAR Shift Arithmetic Right Instruction :

o S AR Ta rget , 1 ;
o S AR Ta rget , C L ;

S A L d i v i d a s i g n e n u m b by 2 o n e a c s h i f t ( T M
es d er h he SB
rema i n s sa me )
Tt h e t a rge t be a regi st e r o r A memo r y
ca n … …
Carry
SAR

Ex: MOV AL,6 Target

SAR AL,1
MOV BL,-
16 MOV
CL,3 SAR ;
BL,CL
DTM 124
Example: A 16-bit unsigned number X is
present in AX register. Write a program to
compute 10*X (ten multiplied by X), assuming
that final result can be filled in 16 bits.

DTM 125
Rotate
Instruction
• ROL/ROR Rotate Left (Right) Instruction :
o ROL/RO R Ta rget , 1 ;
o ROL/RO R Ta rget , C L ;
All except immediate and registe
segment rs.
Carry … … … … Carry
ROR
ROL
Target Target

Ex: MOV
AL,BCh
ROL AL,1
ROL AL,1
ROR
ROR AL,1

DTM 126
Rotate Instruction
• RCL/RCR Rotate Through Carry Left (Right) Instruction :
o RC L/RC R Ta rget , 1 ;
o RC L/RC R Ta rget , C L ;
All except immediate and segment
registers.
Carry … … … … Carry
RCL RCR
Target Target

Ex: Consider a 64-bit number X=X63X62…X0 located in DXCXBXAX

registers. Write an assembly code to shift X one position left.

DTM 127
Rotate
Instruction
• RCL Shift Arithmetic Right Instruction :
o S AR Ta rget , 1 ;
o S AR Ta rget , C L ;
All except immediate and registe
segment rs.
or CL
Count must
be 1 .
Ex: MOV AL,6
SAR AL,1
MOV BL,-16
MOV CL,3
SAR BL,CL ;

DTM 128
 Instruction Set of 8086
v. Loops and Jumps:
When there is a need to change the path of
program execution by forcing the processor to
fetch its next instruction from a new location we
can use Jump instructions.
When there is a need to execute some portion of
the program more than one times we can use
loop instructions.

DTM 129
 Instruction Set of 8086
• Jump instructions are classified as
– Unconditional Jump (JMP)
– Conditional Jump (J cond)

DTM 130
 Instruction Set of 8086
 JMP-Unconditional jump to Specified Destination
 This instruction will always cause the 8086 to fetch its next
Instruction from the location specified in the instruction rather than
from the next location after the JMP instruction.
 If the destination is in the same code segment as the JMP
instruction, then only the instruction pointer will be changed to get
to the destination location. This is referred to as a near jump.
 If the destination for the jump instruction is in a segment with a
name different from that of the segment containing the JMP
instruction, then both the instruction pointer and the code segment
register contents will be changed to get to the destination location.
This is referred to as a far jump.
 The JMP instruction affects no flags.
DTM 131
Instruction Set of 8086

DTM 132
Instruction Set of 8086

DTM 133
 Instruction Set of 8086
Conditional Jump Instructions
 Conditional jumps are always short jumps in the 8086.
 These instructions will cause a jump to a label given in the
instruction if the desired conditions occurs in the program
before the execution of the instruction.
 The destination must be in the range of -128 bytes to +127
bytes from the address of the instruction after the
conditional transfer instruction.
 If the jump is not taken (jump condition is not fulfilled),
execution simply goes on to the next instruction.

DTM 134
Instruction Set of 8086

DTM 135
 Instruction Set of 8086
• Example: Write an assembly language program
that adds two numbers from memory in data
segment at offsets of 1100H and 1101H and
stores the result at an offset of (1102H if it is
positive, 1103H if it is negative and 1104H if it
is zero.

DTM 136
 Start

N1+N2

Store
Result<0 Yes result in
1103H

No

Store
Result=0 result in
Yes 1104H

No
Store
result in
1102H

End
DTM 137
 Instruction Set of 8086
Solution:
MOV AL, [1100H] ; AL=N1
ADD AL, [1101H] ; AL=N1+N2
JS NEGATIVE
JZ NULL
MOV [1102H],AL; POSITIVE
; RESULT
JMP END
NEGATIVE: MOV [1103H], AL; NEGATIVE
;RESULT
JMP END
NULL: MOV [1104H], AL; NULL RESULT
END: HLT

DTM 138
 Instruction Set of 8086
 Loop: LOOP Label
 This instruction is used to repeat a series of instruction
some number of times. The number is specified in the
CX register.
 The CX register is automatically decremented by one,
each time after execution of LOOP instruction. Until
CX=0, execution will jump to a destination specified by
a label in the instructions.
 The destination address for the jump must be in the
range of -128 bytes to +127 bytes from the address of
the instruction after the iteration control instruction.
DTM 139
 Instruction Set of 8086
• For LOOPE/LOOPZ and LOOPNE/LOOPNZ
instructions there is one more condition for
exit from loop, which is given below.

DTM 140
 Instruction Set of 8086

Examples
MOV BX, OFFSET PRICE ;Point BX at first element in array
MOV CX, 40 ;Load CX with number of elements in
array
NEXT: MOV AL, [BX] ; Get elements from array
ADD AL, 07H ;Add correction factor
DAA ;decimal adjust result
MOV [BX], AL ; Put result back in array
LOOP NEXT ; Repeat until all elements
adjusted.

MOV BX, OFFSET ARRAY ;point BX at start of the array

DEC BX
MOV CX, 100 ;put number of array
elements in CX
NEXT: INC BX DTM ;point to next element in 141
 Instruction Set of 8086

vi. Subroutine and interrupt Instructions

CALL– call a procedure:
The CALL instruction is used to transfer
execution to a subprogram or procedure.
There are two basic types of calls, near and
far.

DTM 142
 Instruction Set of 8086
A near call is a call to a procedure, which is in the same
code segment as the CALL instruction.
When the 8086 executes a near CALL instruction, it
decrements the stack pointer by 2 and copies the offset of
the next instruction after the CALL onto the stack. This
offset saved on the stack is referred to as the return
address.
A near CALL instruction will also load the instruction pointer
with the offset of the first instruction in the procedure.
A RET instruction at the end of the procedure will return
execution to the instruction after the call by copying the
offset saved on the stack back to IP.
DTM 143
 Instruction Set of 8086
 A far call is a call to a procedure, which is in a different segment
from the one that contains the CALL instruction.
 When the 8086 executes a far call, it decrements the stack pointer
by 2 and copies the contents of the CS register to the stack. It
then decrements the stack pointer by 2 again and copies the offset
of the instruction after the CALL instruction to the stack.
 Finally, it loads CS with the segment base of the segment, which
contains the procedure, and loads IP with the offset of the first
instruction of the procedure in that segment.
 A RET instruction at the end of the procedure will return
execution to the next Instruction after the CALL by restoring the
saved values of CS and IP from the stack.

DTM 144
Instruction Set of 8086

DTM 145
 Instruction Set of 8086
RET-Return Execution from Procedure to
Calling Program
 The RET instruction will return execution from a procedure
to the next instruction after the CALL instruction which was
used to CALL the procedure.
 If the procedure is a near procedure (in the same code
segment as the CALL instruction), then the return will be
done by replacing the instruction pointer with a word from
the top of the stack.

DTM 146
 Instruction Set of 8086
 If the procedure is a far procedure, then the instruction
pointer will be replaced by the word at the top of the stack.
The stack pointer will then be incremented by 2. The code
segment register is then replaced with a word from the
new top of the stack.
 A RET instruction can be followed by a number, for example,
RET 6. In this case the stack pointer will be incremented by
an additional six addresses after the IP or the IP and CS are
popped off the stack. This form is used to increment the
stack pointer over parameters passed to the procedure on
the stack.
 The RET instruction affects no flags.

DTM 147
 Instruction Set of 8086
 INT-interrupt Program Execution-INT Type
 ‘Interrupt’ is an instruction that breaks the normal sequence
of execution of instructions, diverts its execution to some
other program called Interrupt Service Routine (ISR).
 After executing ISR, the control is transferred back again to
the main program which was being executed at the time of
interruption.
 Normal program can be interrupted by three ways:
 By external signal
 By a special instruction in the program or
 By the occurrence of some condition.

DTM 148
 Instruction Set of 8086
 Therefore, there are two major types of
interrupts
Hardware generated (derived from a
hardware signal or external signal)
Software generated (internally derived from
the execution of an instruction which could
be by special instruction in the program or
condition produced by instruction)

DTM 149
 Instruction Set of 8086
External Signal (Hardware Interrupt)
 In case of 8086, there are two interrupt pins, viz. NMI and
INTR.
 The NMI is a non-maskable interrupt input pin, which
means that any interrupt request at NMI input cannot be
masked, or disabled by any means.
 The INTR interrupt, however, may be masked using the
interrupt flag (IF).

DTM 150
 Instruction Set of 8086
Special Instruction (software Interrupt)
 Intel 8086 supports special instruction for interrupt, called
INT, to execute special program.
 Example: INT 21H, INT 10H
Condition Produced by Instruction (software
Interrupt)
 Intel 8086 can be interrupted by some condition produced
by execution of an instruction.
 Example: MOV BL, 00H then DIV BX ; divide by zero ISR is
executed

DTM 151
 Instruction Set of 8086
At the end of each instruction cycle. the 8086
checks to see if any interrupts have been
requested.
If an interrupt has been requested, the 8086
responds to the interrupt by stepping through
the following series of major actions.
 It decrements the stack pointer by 2 and pushes the flag
register on the stack.
 It disables the 8086 INTR interrupt input by clearing the
interrupt flag (IF) in the flag register.
DTM 152
Instruction Set of 8086
 It resets the trap flag (TF) in the flag register.
 It decrements the stack pointer by 2 and pushes the
current code segment register contents on the stack.
 It decrements the stack pointer again by 2 and pushes
the current instruction pointer contents on the stack.
 It does an indirect far jump to the start of the
procedure you wrote to respond to the Interrupt.

DTM 153
Instruction Set of 8086

DTM 154
 Instruction Set of 8086
 Interrupt Vector
 This vector gives us information about the
location of an I.S.R. in the memory.
 An interrupt vector is a 4-byte number. The first
two bytes give us the value of IP (offset) for the
I.S.R, where the last two bytes contain the value of
CS register.
 The physical address (20 bits) is defined by :
CS*10h + IP

DTM 155
 Instruction Set of 8086
 The interrupt vectors are located in the first 1K
byte area of the memory
 Intel reserves the first 32 interrupt vectors for
the present and features microprocessor
products
 The remaining interrupt vectors (32-255) are
available for the user.

DTM 156
Instruction Set of 8086

DTM 157
 Instruction Set of 8086
• Examples:
– INT 35; New IP from 0008CH, new CS from
0008EH
• Example of MS-DOS interrupts
 INT 21h /AH=1 read character from standard input,
with echo, result is stored in AL. If there is no
character in the keyboard buffer, the function waits
until any key is pressed.
Example: MOV AH,1
INT 21h
DTM 158
 Instruction Set of 8086
• Example of MS-DOS interrupts
 INT 21h /AH=2 write character to standard
output entry. DL register contains the
character to write, after execution AL = DL.
Example: MOV AH,2
MOV DL, ‘B’
INT 21h

DTM 159
 Instruction Set of 8086
• Example of MS-DOS interrupts
 INT 21h / AH=9 - output of a string at DS:DX. String

must be terminated by ‘$’.

Example:
.model small
.data
msg db “Hello word $”
.code
MOV DX, OFFSET msg
MOV AH, 9
INT 21h
hlt

DTM 160
 Instruction Set of 8086
• Example of BIOS interrupt
 INT 16H/ AH=00H –get keystroke from keyboard (no
echo).
AH= BIOS scan code.
AL= ASCII character.
(if a keystroke is present, it is removed from the keyboard
buffer).

DTM 161
 Instruction Set of 8086
vii. Processor control instructions
• Flag Set/clear Instructions:
– STC: sets the carry flag, STC doesn’t affect any
other flag.
– CLC: resets the carry flag to zero. CLC doesn’t
affect any other flag.
– CMC: complements the carry flag. CMC doesn’t
affect any other flag.

DTM 162
 Instruction Set of 8086
– STD: sets the direction flag. It doesn’t affect any
other flag.
– CLD: reset the DF. It doesn’t affect any other flag.
– STI: sets the interrupt flag to one. This enables INTR
interrupt of the 8086. It doesn’t affect any other flag.
– CLI: resets the interrupt flag to zero. Due to this 8086
will not respond to an interrupt signal on its INTR
input. It doesn’t affect any other flag.

DTM 163
 Instruction Set of 8086

External hardware synchronization instructions:

 These instructions include: HLT, WAIT, ESC, LOCK, NOP
 HLT instruction:
• The HLT instruction will cause the 8086 to stop fetching and
executing instructions. The 8086 will enter a halt state.
• The only ways to get the processor out of the halt state are
with an interrupt signal on the INTR pin, an interrupt signal
on the NMI pin, or a reset signal on the RESET input.

DTM 164
 Instruction Set of 8086
 WAIT-Wait for Test Signal or interrupt Signal
– When this instruction executes, the 8086 enters an idle condition in
which it is doing no processing.
– The 8086 will stay in this idle state until the 8086 TEST input pin is
made low or until an interrupt signal is received on the INTR or the
NMI interrupt input pins.
– If a valid interrupt occurs while the 8086 is in this idle state, the
8086 will return to the idle state after the interrupt service procedure
executes.
– It returns to the idle state because the address of the WAIT
instruction is the address pushed on the stack when the 8086
responds to the interrupt

DTM 165
 Instruction Set of 8086
ESC-Escape
– This instruction is used to pass instructions to a
coprocessor, such as the 8087-math coprocessor, which
shares the address and data bus with an 8086.
– Instructions for the coprocessor are represented by a 6-
bit code embedded in the escape instruction.
– As the 8086 fetches instruction bytes, the coprocessor
also catches these bytes from the data bus and puts
them in its queue. However, the coprocessor treats all
the normal 8086 instructions as NOPs.

DTM 166
 Instruction Set of 8086

– When the 8086 fetches an ESC instruction, the

coprocessor decodes the instruction and carries
out the action specified by the 6-bit code
specified in the instruction.
– In most cases the 8086 treats the ESC instruction
as a NOP.
– In some cases the 8086 will access a data item in
memory for the coprocessor.

DTM 167
 Instruction Set of 8086

 LOCK-Assert Bus Lock Signal

– Many microcomputer systems contain several
microprocessors.
– The LOCK prefix allows a microprocessor to make sure
that another processor does not take control of the
system bus while it is in the middle of a critical
instruction which uses the system bus.
– The LOCK prefix is put in front of the critical instruction.

DTM 168
 Instruction Set of 8086
– When an instruction with a LOCK prefix executes,
the 8086 will assert its bus lock signal output. This
signal is connected to an external bus controller
device, which then prevents any other processor from
taking over the system bus.
– LOCK affects no flags.
EXAMPLE:
LOCK XCHG SEMAPHORE, AL ;
The XCHG instruction requires two bus accesses. The LOCK prefix prevents
another processor from taking control of the system bus between the two
accesses.

DTM 169
 Instruction Set of 8086
 NOP-Perform No Operation
– This instruction simply uses up three clock cycles
and Increments the instruction pointer to point
to the next instruction.
– NOP affects no flags. The NOP instruction can be
used to increase the delay of a delay loop.
– When hand coding a NOP can also be used to
hold a place in a program for an instruction that
will be added later.

DTM 170
End of Chapter
Three!

DTM 171