（南京观海微电子）——GH7002-01_HKC 7.0_QD070AS02-1_1024RGBx600_MIPI_LVDS_RGB原理及代码介绍

原创已于 2024-11-16 17:08:51 修改 · 1.1k 阅读

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#材质

于 2024-11-16 17:01:19 首次发布

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一、原理

1. MIPI

2. LVDS

3. RGB

二、代码

//---------------------------------------------------------------------------
// Example:
// Model - HKC Qp070AS02
// IC - GH7002-01
// Width - 1024
// Height - 600
// REV: - V0.1
// DATA - 20240819
// INTERFACE- MIPI

//"Vfp" value="16" />
//"Vbp" value="8" />
//"Vsync" value="8" />
//"Hfp" value="80" />
//"Hbp" value="40" />
//"Hsync" value="40" />
//2POWER IOVCC=3.3V VCI=3.3/

// Disclaimer:
// This C source code is intended as a design reference
// which illustrates how these types of functions can be implemented.
// It is the user's responsibility to verify their design for
// consistency and functionality through the use of formal
// verification methods. LCD Studio provides no warranty regarding the use
// or functionality of this code.
//---------------------------------------------------------------------------

/**************************************************/
// I2C power module controller
/**************************************************/
//
void DisplayOn()
{
   Set_POWER(1,1,1,1);//1.8V ON, 2.8V ON, 5V ON, BL ON
}
//

void PowerOffSequence()
{
   DCS_Short_Write_NP(0x28);
   Delay(200);
    DCS_Short_Write_NP(0x10);

   Delay(100);
   Set_STANDBY();//Video transfer stop
   Delay(50);

   Set_RESET(1,0);//MIPI RESET 1, LCD RESET 0
   Delay(50);
   Set_RESET(0,0);//MIPI RESET 0, LCD RESET 0
   Delay(50);

   Set_POWER(1,1,0,1);//1.8V ON, 2.8V ON, 5V OFF, BL ON
   Delay(150);
   Set_BOOST(5.5, 5.5, 0x81, 50);//VDD, VEE, OFF:VDD->VEE, 10ms
   Delay(50);

   Set_POWER(1,0,0,1);//1.8V ON, 2.8V OFF, 5V OFF, BL ON
   Delay(150);
   Set_POWER(0,0,0,0);//1.8V OFF, 2.8V OFF, 5V OFF, BL OFF

}

/**************************************************/
// Read function (Option)
/**************************************************/
//
void ReadOperation()
{
   //Clean memory: BUFFER
   memset(0);//BUFFER size: 8 Bytes

//Read value to BUFFER
//DCS_Short_Read_NP(0xF0, 1, BUFFER+0);
}

void main()
{

   Set_POWER(1,0,0,0);//1.8V ON, 2.8V OFF, 5V OFF, BL OFF
   Delay(50);
   Set_POWER(1,1,1,0);//1.8V ON, 2.8V ON, 5V ON, BL OFF
   Delay(50);
   Set_RESET(1,1);//MIPI RESET 1, LCD RESET 1
   Delay(20);

//Set_RESET(0,0);//MIPI RESET 0, LCD RESET 0
//Delay(50);

   Set_RESET(1,1);//MIPI RESET 1, LCD RESET 1
   Delay(10);
   Set_BOOST(5.7, 5.7, 0x01, 50);//VDD, VEE, ON:VDD->VEE, 10ms
   Delay(50);
//Set_DC2DC(10.0, 0, 0); // avdd vgh vcom

   //Tips:   Set_BOOST([0], [1], [2], [3])
   //       [0]   VDD
   //       [1]   VEE
   //       [2]   Power On:   0x01 VDD On -> Delay -> VEE On
   //                   0x02 VEE On -> Delay -> VDD On
   //                   0x03 Both On Together
   //           Power Off:   0x81 VDD Off -> Delay -> VEE Off
   //                   0x82 VEE Off -> Delay -> VDD Off
   //                   0x83 Both Off Together
   //       [3]   Delay: Unit 200uS

   /*************************************************/
   //SSD2828 initial setting - LP mode
   /*************************************************/

SSD_LANE(4, 0);

   //Tips:   SSD_LANE([0], [1])
   //       [0]   Lane Select:   1 - 1 Lane
   //                       2 - 2 Lane
   //                       3 - 3 Lane
   //                       4 - 4 Lane
   //       [1]   Lane Speed:   0 - Auto setting (Only for Non-burst mode)
   //                       x - User setting (Mbps per lane)

   /**************************************************/
   //LCDD (Peripheral) Setting
/**************************************************/

Generic_Short_Write_1P(0xee,0x01); // ENTER PAGE1
Generic_Short_Write_1P(0xea,0x07);
Generic_Short_Write_1P(0xeb,0x12);
Generic_Short_Write_1P(0x05,0x13);
Generic_Short_Write_1P(0x0a,0x42); // vcom
Generic_Short_Write_1P(0x0c,0x70);
Generic_Short_Write_1P(0x13,0x14);
Generic_Short_Write_1P(0x15,0x58);
Generic_Short_Write_1P(0x16,0xc3);
Generic_Short_Write_1P(0x17,0x32);
Generic_Short_Write_1P(0x1d,0x44); // vghpump
Generic_Short_Write_1P(0x2d,0x44); // vghpump
Generic_Short_Write_1P(0x21,0x01);
Generic_Short_Write_1P(0x28,0x24); //vgh 15V
Generic_Short_Write_1P(0x29,0x23); //vgl -13V
Generic_Short_Write_1P(0x2a,0x03); // 63
Generic_Short_Write_1P(0x2b,0x30);
//Generic_Short_Write_1P(0x2f,0xf3); // 6121
Generic_Short_Write_1P(0x45,0x00);

Generic_Short_Write_1P(0xee,0x02); // ENTER PAGE2
Generic_Short_Write_1P(0x39,0xC0); //VSPNR

//gamma2.2 2024/08/30
Generic_Short_Write_1P(0x00,0x00);//0
Generic_Short_Write_1P(0x01,0x0d);//4
Generic_Short_Write_1P(0x02,0x12);//8
Generic_Short_Write_1P(0x03,0x08);//12
Generic_Short_Write_1P(0x04,0x0E);//28
Generic_Short_Write_1P(0x05,0x31);//52
Generic_Short_Write_1P(0x06,0x0D);//76
Generic_Short_Write_1P(0x07,0x0F);//100
Generic_Short_Write_1P(0x08,0x10);//131
Generic_Short_Write_1P(0x09,0x0D);//155
Generic_Short_Write_1P(0x0A,0x11);//179
Generic_Short_Write_1P(0x0b,0x4D);//203
Generic_Short_Write_1P(0x0c,0x13);//227
Generic_Short_Write_1P(0x0d,0x19);//243
Generic_Short_Write_1P(0x0e,0x2e);//247
Generic_Short_Write_1P(0x0f,0x33);//251
Generic_Short_Write_1P(0x10,0x3F);//255

Generic_Short_Write_1P(0x20,0x00);
Generic_Short_Write_1P(0x21,0x0d);
Generic_Short_Write_1P(0x22,0x12);
Generic_Short_Write_1P(0x23,0x08);
Generic_Short_Write_1P(0x24,0x0E);
Generic_Short_Write_1P(0x25,0x31);
Generic_Short_Write_1P(0x26,0x0D);
Generic_Short_Write_1P(0x27,0x0F);
Generic_Short_Write_1P(0x28,0x10);
Generic_Short_Write_1P(0x29,0x0D);
Generic_Short_Write_1P(0x2A,0x11);
Generic_Short_Write_1P(0x2b,0x4D);
Generic_Short_Write_1P(0x2c,0x13);
Generic_Short_Write_1P(0x2d,0x19);
Generic_Short_Write_1P(0x2e,0x2e);
Generic_Short_Write_1P(0x2f,0x33);
Generic_Short_Write_1P(0x30,0x3F);

Generic_Short_Write_1P(0xee,0x03); // ENTER PAGE3
Generic_Short_Write_1P(0x0e,0x02); //
Generic_Short_Write_1P(0x0f,0xa8); //

Generic_Short_Write_1P(0xee,0x04); // ENTER PAGE4
Generic_Short_Write_1P(0x00,0x05); // 05=512 SOURCE chane
Generic_Short_Write_1P(0x01,0x01); // GAT
Generic_Short_Write_1P(0x02,0x2C); // GAT
Generic_Short_Write_1P(0x03,0x04); // SOURCE H
Generic_Short_Write_1P(0x04,0x00); // SOURCE H
Generic_Short_Write_1P(0x06,0x06);
Generic_Short_Write_1P(0x07,0x05); // sstp 05
Generic_Short_Write_1P(0x08,0x15); //15
Generic_Short_Write_1P(0x09,0x20); // pol
Generic_Short_Write_1P(0x0a,0x08);
Generic_Short_Write_1P(0x0b,0x00); // chop 2 dot 0417=10
Generic_Short_Write_1P(0x0f,0x0a);
Generic_Short_Write_1P(0x20,0x00);
Generic_Short_Write_1P(0x21,0x07);
Generic_Short_Write_1P(0x24,0x08);
Generic_Short_Write_1P(0x40,0x80); //80 bist=10、00

Generic_Short_Write_1P(0x29,0x00);
Generic_Short_Write_1P(0x30,0x1d); // te
Generic_Short_Write_1P(0x24,0x08); // te
Generic_Short_Write_1P(0x31,0x1d);
Generic_Short_Write_1P(0x37,0x22); // te
Generic_Short_Write_1P(0x19,0xcc); // te
Generic_Short_Write_1P(0x1a,0xcc); // te

Generic_Short_Write_1P(0xee,0x05); // ENTER PAGE5
//STVA STAB
Generic_Short_Write_1P(0x00,0x01); //Stva
Generic_Short_Write_1P(0x01,0x07);
Generic_Short_Write_1P(0x02,0x05); //微调
Generic_Short_Write_1P(0x03,0x05);

Generic_Short_Write_1P(0x07,0xB7); //Stvb
Generic_Short_Write_1P(0x08,0xBD);
Generic_Short_Write_1P(0x09,0x44);

Generic_Short_Write_1P(0x0a,0xB8); //Stvc
Generic_Short_Write_1P(0x0b,0xBE);
Generic_Short_Write_1P(0x0c,0x44);

//CLK
Generic_Short_Write_1P(0x10,0x03); //CLKA
Generic_Short_Write_1P(0x11,0x07);
Generic_Short_Write_1P(0x12,0x05);
Generic_Short_Write_1P(0x13,0x05);

Generic_Short_Write_1P(0x19,0xBB);
Generic_Short_Write_1P(0x1a,0x74);
Generic_Short_Write_1P(0x43,0x03);
Generic_Short_Write_1P(0x40,0x66); //
Generic_Short_Write_1P(0x41,0x44);
Generic_Short_Write_1P(0x44,0x01);
Generic_Short_Write_1P(0x45,0x81);
Generic_Short_Write_1P(0x46,0x06);
Generic_Short_Write_1P(0x47,0x00);

Generic_Short_Write_1P(0xee,0x06); //PAGE6 GIP back
Generic_Short_Write_1P(0x00,0x45);
Generic_Short_Write_1P(0x02,0x01);
Generic_Short_Write_1P(0x04,0xc8);

Generic_Short_Write_1P(0x08,0x23);
Generic_Short_Write_1P(0x09,0x01);
Generic_Short_Write_1P(0x0a,0x67);
Generic_Short_Write_1P(0x0b,0x45);

Generic_Short_Write_1P(0xee,0x07); //PAGE7

//GIP LEFT 1-22
Generic_Short_Write_1P(0x00,0x16);
Generic_Short_Write_1P(0x01,0x15);
Generic_Short_Write_1P(0x02,0x17);
Generic_Short_Write_1P(0x03,0x14);
Generic_Short_Write_1P(0x04,0x04);
Generic_Short_Write_1P(0x05,0x13);
Generic_Short_Write_1P(0x06,0x05);
Generic_Short_Write_1P(0x07,0x08);

Generic_Short_Write_1P(0x08,0x3c);
Generic_Short_Write_1P(0x09,0x12);
Generic_Short_Write_1P(0x0A,0x11);
Generic_Short_Write_1P(0x0b,0x10);
Generic_Short_Write_1P(0x0c,0x00);
Generic_Short_Write_1P(0x0d,0x01);
Generic_Short_Write_1P(0x0e,0x3c);
Generic_Short_Write_1P(0x0f,0x3c);

Generic_Short_Write_1P(0x10,0x3c);
Generic_Short_Write_1P(0x11,0x3c);
Generic_Short_Write_1P(0x12,0x3c);
Generic_Short_Write_1P(0x13,0x3c);
Generic_Short_Write_1P(0x14,0x3c);
Generic_Short_Write_1P(0x15,0x3c);
//GIP RIGHT 1-22
Generic_Short_Write_1P(0x20,0x16);
Generic_Short_Write_1P(0x21,0x15);
Generic_Short_Write_1P(0x22,0x17);
Generic_Short_Write_1P(0x23,0x14);
Generic_Short_Write_1P(0x24,0x04);
Generic_Short_Write_1P(0x25,0x13);
Generic_Short_Write_1P(0x26,0x05);
Generic_Short_Write_1P(0x27,0x08);

Generic_Short_Write_1P(0x28,0x3c);
Generic_Short_Write_1P(0x29,0x12);
Generic_Short_Write_1P(0x2A,0x11);
Generic_Short_Write_1P(0x2b,0x10);
Generic_Short_Write_1P(0x2c,0x00);
Generic_Short_Write_1P(0x2d,0x01);
Generic_Short_Write_1P(0x2e,0x3c);
Generic_Short_Write_1P(0x2f,0x3c);

Generic_Short_Write_1P(0x30,0x3c);
Generic_Short_Write_1P(0x31,0x3c);
Generic_Short_Write_1P(0x32,0x3c);
Generic_Short_Write_1P(0x33,0x3c);
Generic_Short_Write_1P(0x34,0x3c);
Generic_Short_Write_1P(0x35,0x3c);

Generic_Short_Write_1P(0xee,0x08); //PAGE8
Generic_Short_Write_1P(0x20,0x00);
Generic_Short_Write_1P(0x10,0x00);
Generic_Short_Write_1P(0x12,0xdA); //VDDH
Generic_Short_Write_1P(0x18,0x30);
Generic_Short_Write_1P(0x13,0xEB); //eq 低频
Generic_Short_Write_1P(0x21,0x2c); // ecc off

Generic_Short_Write_1P(0xee,0x0f); //PAGEf
Generic_Short_Write_1P(0x00,0x01); // dualgate en
Generic_Short_Write_1P(0x01,0x00);
Generic_Short_Write_1P(0x03,0x95); // ZIGZAG

Generic_Short_Write_1P(0xee,0x08); // ENTER PAGE1
Generic_Long_Write_2P(0xea,0x7a,0xaa); // read enable
Generic_Short_Read_1P(0x12, 1, BUFFER+1); //

Generic_Short_Write_1P(0xee,0x00); // ENTER PAGE0
Generic_Short_Write_1P(0xea,0x00);
Generic_Short_Write_1P(0xeb,0x00);
Generic_Short_Write_1P(0x36,0x00); // 03 ok
Generic_Short_Write_1P(0x35,0x00);

DCS_Short_Write_NP(0x11); // sleep out
Delay (600); // delay 120 ms
DCS_Short_Write_NP(0x29); // display on

//.......OTP........//
/*

Generic_Short_Write_1P(0x28,0x00);
Generic_Short_Write_1P(0xee,0x0a); // ENTER PAGEa
Generic_Short_Write_1P(0xea,0x07); // WRITE enable
Generic_Short_Write_1P(0xeb,0x12);

Generic_Short_Write_1P(0x30,0x78); //reg_otp_prgm_cycle_set[7:0]
Generic_Short_Write_1P(0x31,0x82); // ternal vpp program en
Generic_Short_Write_1P(0x35,0x03); //reg_otp_vghl_rt[1:0]
Generic_Short_Write_1P(0x36,0x02); // votp 电压设置 8.0V-8.5V reg_otp_vgh_set[5:0]
Generic_Short_Write_1P(0x37,0x01); //otp_vgh_sel=1 内部votp
Delay(600);//120ms

Generic_Short_Write_1P(0x00,0x80); // program all
Generic_Short_Write_1P(0x05,0x40); // dbma1
Generic_Short_Write_1P(0x06,0x41); //reg_prgm_pwrgas1 reg_prgm_pwr_int1
Generic_Short_Write_1P(0x08,0x15); //LVDS dsi mipi page8 reg
Generic_Short_Write_1P(0x09,0x40); //reg_prgm_misc1

Generic_Short_Write_1P(0xea,0x78); // program en
Generic_Short_Write_1P(0xeb,0x69);
Delay(3000); //240
Generic_Short_Write_1P(0xee,0x0a);

Generic_Short_Write_1P(0xea,0x07); // WRITE enable
Generic_Short_Write_1P(0xeb,0x12);
Generic_Short_Write_1P(0x31,0x02); // internal vpp program dis
Generic_Short_Write_1P(0x37,0x00); // vgh sel frome pahe1

Generic_Short_Write_1P(0xee,0x00); // ENTER PAGE0
Generic_Short_Write_1P(0xea,0x00);
Generic_Short_Write_1P(0xeb,0x00);
Generic_Short_Write_1P(0x29,0x00);
*/

/*************************************************/
//SSD2828 initial setting - HS mode

SSD_MODE(2, 1);

   //Tips:   SSD_MODE([0], [1])
   //       [0]   Video Mode:   0 - Non burst mode with sync pulses
   //                       1 - Non burst mode with sync events
   //                       2 - Burst mode
   //                       3 - Command mode
   //       [1]   HS Mode:       0 - No operation
   //                       1 - Enable HS mode
}