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ORCIDVLSI-DAT 2019: Hsinchu, Taiwan
- International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019. IEEE 2019, ISBN 978-1-7281-0655-7
- Deng-Kai Lin, Chih-Chan Tu, Shih-Kai Kuo, Tsung-Hsien Lin:
An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-µm CMOS Process. 1-4 - Yi-Chia Chen, Shao-Yung Lu, Jui-Hsiang Tsai, Yu-Te Liao
:
A Power-Efficient, Bi-Directional Readout Interface Circuit for Cyclic-Voltammetry Electrochemical Sensors. 1-3 - Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Volker Kiefer:
A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms. 1-4 - Pai-Hsiang Hsu, Yueh-Ru Lee, Chung-Chih Hung:
10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme. 1-4 - Sebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb:
A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application. 1-4 - Arnaud Furnémont:
New Memory Technology, Design and Architecture Co-Optimization to Enable Future System Needs. 1 - Chuan-Cheng Cheng, Jeremy Dunworth, Sriram Kalpat, Haitao Cheng, Gang Liu, Ming-Ta Yang, Wing Sy, Joseph Wang, Kamal Sahota, P. R. Chidi Chidambaram:
Silicon Process Impact on 5G NR mmWave Front End Design and Performance. 1-2 - Yuan Xie:
CRISP: Center for Research on Intelligent Storage and Processing-in-Memory. 1 - Takashi Dateki:
R&D Activities for Capacity Enhancement Using 5G Ultra High-Density Distributed Antenna Systems. 1 - Jianxiong Yin:
Scalable AI Computing Lifecycle. 1 - Yun-Wen Lu, Antoon Purnal, Simon Vandenhende, Chen-Yi Lee, Ingrid Verbauwhede, Hsie-Chia Chang:
A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR. 1-4 - Lih-Yih Chiou, Chi-Ray Huang, Chang-Chieh Cheng, Jing-Yu Huang, Wei-Suo Ling:
A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs. 1-4 - Yining Zhang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang:
Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK Modulation. 1-4 - Pei-Kuei Tsung, Tung-Chien Chen, Chien-Hung Lin, Chih-Yu Chang, Jih-Ming Hsu:
Heterogeneous Computing for Edge AI. 1-2 - Hsinchung Chen, Subramanian Meenakshi, Ali Heydarigorji, Seyede Mahya Safavi, Pai H. Chou, Cheng-Ting Lee, Ruey-Kang Chang:
BlueBox: A Complete Recorder for Code-Blue Events in Hospitals. 1-4 - Ya-Chin Chung, Po-Hsiang Cheng, Chih-Wei Liu:
Energy Efficient CNN Inference Accelerator Using Fast Fourier Transform. 1-4 - Hyung-Il Kim:
Beyond Digital Neuromorphic Hardware: Time-Based and Flash-Based Designs. 1 - Fatih Hamzaoglu:
Embedded Memories for Silicon-In-Package: Optimization of Memory Subsystem from IoT to Machine Learning. 1 - Shih-Lien Lu, Cheng-En Lee, Peter Noel, Saman Adham, Ted Wong, Jonathan Chang:
A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective Filtering. 1-4 - Haoyan Liu, Takashi Ohsawa:
User- Friendly Compact Model of Magnetic Tunnel Junctions for Circuit Simulation Based on Switching Probability. 1-4 - You-Shin Chen, Tzu-Hsiang Hsu, Chien-Wen Chen, Chih-Cheng Hsieh:
A Current-Mode Differential Sensing CMOS Imager for Optical Linear Encoder. 1-2 - Chia-Chih Jack Yen:
Failure Root Cause Analysis Automation on Functional Simulation Regressions. 1 - Katsuhiko Hoya, Kosuke Hatsuda, Kenji Tsuchida, Yohji Watanabe, Yusuke Shirota, Tatsunori Kanai:
A perspective on NVRAM technology for future computing system. 1-2 - Tom Munk, Hillel Kugler, Ofir Maori, Adam Teman:
TEMPO: Thermal-Efficient Management of Power in High-Throughput Network Switches. 1-4 - Chia-Kai Chan, Hong-Ke Lin, Chih-Wei Liu:
High-Throughput 64K-point FFT Processor for THz Imaging Radar System. 1-4 - Yujun Li:
Semiconductor for 5G. 1 - Tom Walker:
Using a Complete Flow for Photonic Integrated Circuits to Improve Product Development Time. 1 - Yu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang:
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs. 1-4 - Feng-Min Lee:
Embedded Memory: The Future of Emerging Memories. 1 - Jing Wang, Hirofumi Shinohara:
A CMOS 0.85-V 15.8-nW Current and Voltage Reference without Resistors. 1-4 - Yasushi Maruta:
Development and Evaluation of Low-SHF-Band C-RAN Massive MIMO System for 5G. 1 - Tsung-Ching Huang, Ting Lei, Leilai Shao, Sridhar Sivapurapu, Madhavan Swaminathan, Sicheng Li, Zhenan Bao, Kwang-Ting Cheng, Raymond G. Beausoleil:
Process Design Kit and Design Automation for Flexible Hybrid Electronics. 1-2 - Yukihiko Okumura:
R&D Activities for 5G Radio Access Technologies Using SHF Bands and Co-Creation of New Services Using 5G. 1 - Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar:
High-Performance NoC Simulation Acceleration Framework Employing the Xilinx DSP48E1 Blocks. 1-4 - Chao-Jun Shang, Cheng-Hung Wu, Kuen-Jong Lee, Yu-Hsiang Chen:
A Novel Test Generation Method for Small-Delay Defects with User-Defined Fault Model. 1-4 - Wei-Fen Lin, Cheng-Tao Hsieh, Cheng-Yi Chou:
ONNC-Based Software Development Platform for Configurable NVDLA Designs. 1-2 - Ming-Wei Lin:
TSRI Silicon Photonics Design Platform: Standardization and Collaboration. 1 - Mike Davies:
Progress in Neuromorphic Computing : Drawing Inspiration from Nature for Gains in AI and Computing. 1 - Yuan-Hsi Chou, Shih-Lien Lu:
A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology. 1-4 - Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar:
Design of an Adaptive and Reliable Network on Chip Router Architecture Using FPGA. 1-4 - Ghavam G. Shahidi:
Slow-Down in Power Scaling and the End of Moore's Law? 1 - Shien-Chun Luo:
Customization of a Deep Learning Accelerator. 1-2 - Ahmed Wahba, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa:
Primitive Concept Identification In A Given Set Of Wafer Maps. 1-4 - Kai-Chieh Yang, Ming-Ting Lee, Chen-Hung Wu, James Chien-Mo Li:
ATPG and Test Compression for Probabilistic Circuits. 1-4 - Chee-Kit Ng, Yu-Chun Lin, Shyh-Jye Jou:
A 50 Gb/s Adaptive ADFE with SNR Based Power Management for 2-PAM Systems. 1-4 - Yan Li:
Evolution and Advances of the Nonvolatile Memories and Applications. 1 - Thomas Ernst:
Future of Computing and Sensing Systems for Embedded Applications. 1 - Takafumi Uemura:
Ultraflexible Amplification Circuits for Imperceptible Brain Monitoring System. 1 - Bo-Ya Chen, Bo-En Chen, Bo-Cheng Lai:
Efficient Write Scheme for Algorithm-Based Multi-Ported Memory. 1-4 - Yih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai:
Clocking for HPC Design: Challenges and Experience Sharing. 1-2 - Yi-Che Lee, Ting-Shuo Hsu, Chun-Tse Chen, Jing-Jia Liou, Juin-Ming Lu:
NNSim: A Fast and Accurate SystemC/TLM Simulator for Deep Convolutional Neural Network Accelerators. 1-4 - Shankaran Janardhanan:
Silicon Technologies for Next Generation 5G Architectures and Applications. 1 - Jia-Ching Wang, Tsung-Chih Hung, Tai-Haur Kuo:
A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with Averaging Correlated Level Shifting Technique. 1-3 - Peter Hsieh:
Autonomous Driving Technologies and Computing Platform. 1 - Yu-Ting Lin, Chiao-Yun Hsiao, Pei-Ling Chi, Chien-Nan Kuo:
A 39 GHz Reflection-Type Phase Shifter for Reflectarray Antenna Application. 1-3 - Kang-Yi Fan, Shigeru Yamashita, Juinn-Dar Huang:
Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips Using Network Flow Models. 1-4 - San-Liang Lee:
Research Status of Silicon Photonic Integration in Taiwan's Academia. 1 - Jun Matsui, Hisakatsu Yamaguchi:
Event-Driven Model for High Speed End-to-End Simulations of Transmission System with Non-Linear Optical Elements and Cascaded Clock-and-Data Recovery Circuits. 1-4 - Yongpan Liu:
Flexible Circuits and Systems for Smart Biomedical Applications. 1 - Li-Fung Chang:
Journey to 5G. 1 - Yueh-Chi Wu, Chih-Tsun Huang:
Efficient Dynamic Fixed-Point Quantization of CNN Inference Accelerators for Edge Devices. 1-4 - Mingoo Seok, Minhao Yang, Zhewei Jiang, Aurel A. Lazar, Jae-sun Seo:
Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks. 1-2 - Peng-Chang Huang, Tai-Haur Kuo:
A Light Energy Harvesting Single-Inductor Dual-Input Dual-Output Converter for WSN. 1-4 - Zhonghua Zhou, Sunmeet Chahal, Tsung-Yi Ho, André Ivanov:
Supervised-Learning Congestion Predictor For Routability-Driven Global Routing. 1-4 - Chung-Yi Kao, Cheng-Ting Lee, Yu-Hung Yeh, Jui-Feng Sung, Pai H. Chou:
EcoSim: A Smartphone-Based Sensor-Node Emulator with Native Sensors and Protocol Stack. 1-4 - Laura Wang, Matt Luo:
Machine Learning Applications and Opportunities in IC Design Flow. 1-3 - Yuguang Liu, Haixin Song, Kunnong Zeng, Woogeun Rhee, Zhihua Wang:
A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile Connectivity. 1-4 - Winfried Kaiser:
EUVL Optics: Status and Future Perspectives. 1 - Yu Huang, Szczepan Urban, Wu-Tung Cheng, Manish Sharma, Fengju Niu, Junna Zhong, Wen-Lung Hsu:
Reversible Scan Based Diagnostic Patterns. 1-4
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