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ORCIDJournal of Systems Architecture, Volume 47
Volume 47, Number 1, January 2001
- S. K. Tsasakou, Nikos S. Voros
, Alexios N. Birbas, M. V. Koziotis, D. G. Papadopoulos:
High-level co-simulation based on the extension of processor simulators. 1-13 - Marek A. Perkowski, Lech Józwiak, William Zhao:
Symbolic two-dimensional minimization of strongly unspecified finite state machines. 15-28 - Stan Grygiel, Marek A. Perkowski:
Labeled rough partitions - a new general purpose representation for multiple-valued functions and relations. 29-59 - Stergios Papadimitriou, Anastasios Bezerianos, Tassos Bountis, Georgios Pavlides:
Secure communication protocols with discrete nonlinear chaotic maps. 61-72 - Yuh-Shyan Chen, Tong-Ying Juang, Ying-Ying Shen:
Congestion-free embedding of 2(n-k) spanning trees in an arrangement graph. 73-86
Volume 47, Number 2, February 2001
- Robert H. Klenke, James H. Aylor, Moshe Meyassed, William W. Dungan:
Interfaces for mixed-level simulation with sequential elements. 87-101 - Takamasa Koshizen:
The architecture of a Gaussian mixture Bayes (GMB) robot position estimation system. 103-117 - Chong H. Lee, Douglas V. Hall, Marek A. Perkowski, David S. Jun:
Self-repairable GALs. 119-135 - Mariusz Rawski, Lech Józwiak, Tadeusz Luba:
Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures. 137-155 - Anil Khatri, David C. Rine:
Validation of Patient Headache Care Education System (PHCES) using a software reuse reference model. 157-162 - Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Reachability analysis of large circuits using disjunctive partitioning and partial iterative squaring. 163-179 - Aaron Harwood, Hong Shen:
Using fundamental electrical theory for varying time quantum uni-processor scheduling. 181-192 - Alexander B. Romanovsky, Paul D. Ezhilchelvan:
Conversations with fixed and potential participants. 193-196
Volume 47, Numbers 3-4, April 2001
- Lech Józwiak:
Modern methods and tools in digital system design. 197-200 - Lech Józwiak:
Quality-driven design in the system-on-a-chip era: Why and how? 201-224 - Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, Ahmed Hemani:
Grammar-based design of embedded systems. 225-240 - Krzysztof Kuchcinski:
Constraints-driven design space exploration for distributed embedded systems. 241-261 - Asheesh Khare, Ashok Halambi, Nicolae Savoiu, Peter Grun, Nikil D. Dutt, Alex Nicolau:
V-SAT: A visual specification and analysis tool for system-on-chip exploration. 263-275 - Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh:
Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing. 277-292 - Apostolos A. Kountouris, Christophe Wolinski, Jean-Christophe Le Lann:
High-level synthesis using hierarchical conditional dependency graphs in the CODESIS system. 293-313 - Shaori Guo, Wayne Luk:
An integrated system for developing regular array designs. 315-337 - Fabian Wolf, Rolf Ernst:
Execution cost interval refinement in static software analysis. 339-356 - Irith Pomeranz, Sudhakar M. Reddy:
Design-for-testability to achieve complete coverage of delay faults in standard full scan circuits. 357-373 - Nadine Azémard, Daniel Auvergne:
POPS: A tool for delay/power performance optimization. 375-382
Volume 47, Number 5, May 2001
- Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta:
Theory and application of non-group cellular automata for message authentication. 383-404 - Sumit Ghosh:
Fundamental principles of modeling timing in hardware description languages. 405-426 - Wan Kwon Lee, In Sang Chung, Gwang Sik Yoon, Yong Rae Kwon:
Specification-based program slicing and its applications. 427-443 - Ji Yeon Lee, Yon Dohn Chung, Yoon-Joon Lee, Myoung-Ho Kim:
Gray code clustering of wireless data for partial match queries. 445-458 - Luis Piñuel, Rafael A. Moreno, Francisco Tirado:
Analysing value substitution and confidence estimation for value prediction. 459-475
Volume 47, Number 6, June 2001
- Karen M. Dill, Marek A. Perkowski:
Baldwinian learning utilizing genetic and heuristic algorithms for logic synthesis and minimization of incompletely specified data with Generalized Reed-Muller (AND-EXOR) forms. 477-489 - Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski:
Strategies for solving the Boolean satisfiability problem using binary decision diagrams. 491-503 - Tsung-Chuan Huang, Liang-Cheng Shiu, Jui-Hsiang Huang:
Efficient local memory sequence generation for data parallel programs using permutations. 505-515 - Edwin Naroska, Feipei Lai, Rung-Ji Shang, Uwe Schwiegelshohn:
Efficient parallel timing simulation of synchronous models on networks of workstations. 517-528 - Ivan Hanuliak:
Buffer management control in data transport network node. 529-541 - Jen-Chih Lin, Tzong-Heng Chi, Huan-Chao Keh, Ay-Hwa Andy Liou:
Embedding of complete binary tree with 2-expansion in a faulty Flexible Hypercube. 543-548 - Deo Prakash Vidyarthi, Anil Kumar Tripathi:
Maximizing reliability of distributed computing system with task allocation using simple genetic algorithm. 549-554
Volume 47, Number 7, July 2001
- Uday K. Chakraborty:
Special issue on Evolutionary computing. 555 - Ivan Tanev, Takashi Uozumi, Koichi Ono:
Scalable architecture for parallel distributed implementation of genetic programming on network of workstations. 557-572 - Manu Ahluwalia, Larry Bull:
Coevolving functions in genetic programming. 573-585 - Byoung-Tak Zhang, Dong-Yeon Cho:
System identification using evolutionary Markov chain Monte Carlo. 587-599 - Jun He, Xinghuo Yu:
Conditions for the convergence of evolutionary algorithms. 601-612 - Rudi Lutz:
Evolving good hierarchical decompositions of complex systems. 613-634 - Huiming Yu, Chia-Jung Chi, Tong Su, Qiang Bi:
Hybrid evolutionary motion planning using follow boundary repair for mobile robots. 635-647 - Hartmut Surmann, Michail Maniadakis:
Learning feed-forward and recurrent fuzzy systems: A genetic approach. 649-662 - Rajib Bandyopadhyay, Uday K. Chakraborty, D. Patranabis:
Autotuning a PID controller: A fuzzy-genetic approach. 663-673
Volume 47, Number 8, December 2001
- Oum-El-Kheir Benkahla:
Host-diagnosis algorithms for parallel systems. 675-695 - M. Watheq El-Kharashi, F. Elguibaly, Kin F. Li:
A robust stack folding approach for Java processors: an operand extraction-based algorithm. 697-726 - Fleur L. Steven, Colin Egan, Richard D. Potter, Gordon B. Steven:
Adding static data dependence collapsing to a high-performance instruction scheduler. 727-745 - Geyong Min, Mohamed Ould-Khaoua:
Modelling adaptive routing in circuit switched networks. 747-757
Volume 47, Number 9, March 2002
- Vijayan K. Asari, Thambipillai Srikanthan:
Segmenting endoscopic images using adaptive progressive thresholding: a hardware perspective. 759-761 - Andrea Bondavalli, Silvano Chiaradonna, Felicita Di Giandomenico, J. Xu:
An adaptive approach to achieving hardware and software fault tolerance in a distributed computing environment. 763-781 - Jehad Al-Sadi, Khaled Day, Mohamed Ould-Khaoua:
Unsafety vectors: a new fault-tolerant routing for the binary n-cube. 783-793 - Samia Loucif, Mohamed Ould-Khaoua:
On the merits of hypermeshes and tori with adaptive routing. 795-806 - Ehud Finkelstein, Shlomo Weiss:
A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations. 807-819
Volume 47, Number 10, April 2002
- Giuseppe Biasoli, Fabrizio Ferrandi, Alessandro Fin, Franco Fummi, Donatella Sciuto:
Behavioral test generation for the selection of BIST logic. 821-829 - Seok-Bum Ko, Yu-Yau Guo, Jien-Chung Lo:
Studies of the SEMATECH IDDq test data. 831-846 - Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil:
A prototype of a VHDL-based fault injection tool: description and application. 847-867 - Xiaohong Jiang, Yue Hao, Susumu Horiguchi:
A new approach for critical area estimation in VLSI. 869-881 - Nohpill Park, Fred J. Meyer, Fabrizio Lombardi:
Quality-effective repair of multichip module systems. 883-900 - Naotake Kamiura, Takashi Kodera, Nobuyuki Matsui:
A fault tolerant multistage interconnection network with partly duplicated switches. 901-916
Volume 47, Number 11, May 2002
- Yan-Qing Zhang:
Folded-crossed hypercube: a complete interconnection network. 917-922 - Jong-Hoon Kim, Se-Woong Eom, Sam H. Noh, Yoo-Hun Won, Bok-Gyu Joo:
Studies on striping and buffer caching issues for the software RAID file system. 923-936 - Luigi Palopoli, Luigi Pontieri, Giorgio Terracina, Domenico Ursino:
A novel three-level architecture for large data warehouses. 937-958
Volume 47, Number 12, June 2002
- Olga Peñalba, José M. Mendías, Román Hermida:
A global approach to improve conditional hardware reuse in high-level synthesis. 959-975 - Scott C. Smith, Ronald F. DeMara, Jiann-Shiun Yuan, M. Hagedorn, Dennis Ferguson:
NULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation. 977-998
Volume 47, Number 13, July 2002
- Nen-Chung Wang, Tzung-Shi Chen, Chih-Ping Chu:
Dual-tree-based multicasting on wormhole-routed irregular switch-based networks. 999-1015 - Martti Forsell:
Architectural differences of efficient sequential and parallel computers. 1017-1041
Volume 47, Numbers 14-15, August 2002
- Valery Sklyarov:
Reconfigurable models of finite state machines and their implementation in FPGAs. 1043-1064 - Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems:
A banked-promotion translation lookaside buffer system. 1065-1078 - Giuseppe Alia, Enrico Martinelli:
Fast modular exponentiation of large numbers with large exponents. 1079-1088 - Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti:
Configurable parallel memory architecture for multimedia computers. 1089-1115 - Paul E. Dunne, Paul H. Leng, Gerald F. Nwana:
Demand-driven logic simulation using a network of loosely coupled processors. 1117-1128
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