default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSIGARCH Computer Architecture News, Volume 37
Volume 37, Number 1, March 2009
- Mary Lou Soffa, Mary Jane Irwin:
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009. ACM 2009, ISBN 978-1-60558-406-5 [contents]
Volume 37, Number 2, May 2009
- Norman P. Jouppi, Rakesh Kumar, Dean M. Tullsen:
Introduction to the special issue on the 2008 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP'08). 1 - Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev:
MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. 2-9 - Matteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi:
How to simulate 1000 cores. 10-19 - Jianwei Chen, Murali Annavaram, Michel Dubois:
SlackSim: a platform for parallel simulations of CMPs on CMPs. 20-29 - Madhura Purnaprajna, Mario Porrmann
, Ulrich Rückert:
Run-time reconfigurability in embedded multiprocessors. 30-37 - Chris R. Jesshope, Mike Lankamp, Li Zhang:
The implementation of an SVP many-core processor and the evaluation of its memory architecture. 38-45 - Karan Singh, Major Bhadauria, Sally A. McKee:
Real time power estimation and thread scheduling via performance counters. 46-55 - Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz:
Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design. 56-65
- Mark Thorson:
Internet nuggets. 66-69
Volume 37, Number 3, June 2009
- Stephen W. Keckler, Luiz André Barroso:
36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA. ACM 2009, ISBN 978-1-60558-526-0 [contents]
Volume 37, Number 4, September 2009
- Alexander Thomasian:
Publications on storage and systems research. 1-26 - Enric Musoll:
Mesh-based many-core performance under process variations: a core yield perspective. 27-34 - Angel V. Nikolov:
Queuing theoretic model for a multiprocessor with private caches and shared memory. 35-44
- Mark Thorson:
Internet nuggets. 45-51
Volume 37, Number 5, December 2009
- Enric Musoll:
Leakage-saving opportunities in mesh-based massive multi-core architectures. 1-7 - Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch:
Scalability of relaxed consistency models in NoC based multicore architectures. 8-15 - Sandeep Sharma, Karanjeet Singh Kahlon, P. K. Bansal:
Reliability and path length analysis of irregular fault tolerant multistage interconnection network. 16-23
- Mark Thorson:
Internet nuggets. 24-30
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-11-09 23:12 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
