Mehul Raval, Ph.D

The chapter will introduce industrial silicon solar cell manufacturing technologies with its current status. Commercial p-type and high efficiency n-type solar cell structures will be discussed and compared so that the reader can get a head-start in industrial solar cells. A brief over-view of various process steps from texturing to screen-printed metallization is presented. Texturing processes for mono-crystalline and multi-crystalline silicon wafers have been reviewed with the latest… Mehr anzeigen

The chapter will introduce industrial silicon solar cell manufacturing technologies with its current status. Commercial p-type and high efficiency n-type solar cell structures will be discussed and compared so that the reader can get a head-start in industrial solar cells. A brief over-view of various process steps from texturing to screen-printed metallization is presented. Texturing processes for mono-crystalline and multi-crystalline silicon wafers have been reviewed with the latest processes. An over-view of the thermal processes of diffusion and anti-reflective coating deposition has been presented. The well-established screen-printing process for solar cell metallization is introduced with the fast-firing step for sintering of the contacts. I-V testing of solar cells with various parameters for solar cell characterization is introduced. Latest developments in various processes and equipment manufacturing are also discussed along with the expected future trends. Weniger anzeigen

Low temperature oxidation of silicon in plasma ambient is a potential candidate for replacing thermally grown SiO2films for surface passivation of crystalline silicon solar cells. In this work, we report the growth of silicon oxy-nitride (SiOxNy) film in N2O plasma ambient at 380 °C. However, this process results in trapping of interstitial oxygen within silicon. The impact of this trapped interstitial oxygen on the surface passivation quality is investigated. The interstitial oxygen trapped in… Mehr anzeigen

Low temperature oxidation of silicon in plasma ambient is a potential candidate for replacing thermally grown SiO2films for surface passivation of crystalline silicon solar cells. In this work, we report the growth of silicon oxy-nitride (SiOxNy) film in N2O plasma ambient at 380 °C. However, this process results in trapping of interstitial oxygen within silicon. The impact of this trapped interstitial oxygen on the surface passivation quality is investigated. The interstitial oxygen trapped in silicon was seen to decrease for larger SiOxNyfilm thickness. Effective minority carrier lifetime (τeff) measurements on n-type float zone silicon wafers passivated by SiOxNy/silicon nitride (SiNv:H) stack showed a decrease in τeff from 347 μs to 68 μs, for larger SiOxNyfilm thickness due to degradation in interface properties. From high frequency capacitance-voltage measurements, it was concluded that the surface passivation quality was governed by the interface parameters (fixed charge density and interface state density). High temperature firing of the SiOxNy/SiNv:H stack resulted in a severe degradation in τeff due to migration of oxygen across the interface into silicon. However, on using the SiOxNy/SiNv:H stack for emitter surface passivation in screen printed p-type Si solar cells, an improvement in short wavelength response was observed in comparison to the passivation by SiNv:H alone, indicating an improvement in emitter surface passivation quality. Weniger anzeigen

In this paper we demonstrate that an additional nitrous oxide (N2O) plasma treatment step after the regular SiNx:H anti-reflective coating (ARC) deposition practically eliminates background plating during Ni–Cu contact metallization for c-Si solar cells. This step is relatively simple and could henceforth enable the commercialization of plated Ni–Cu contacts, which is currently inhibited by the creation of localized metal-silicon interfaces due to background plating, among other issues like… Mehr anzeigen

In this paper we demonstrate that an additional nitrous oxide (N2O) plasma treatment step after the regular SiNx:H anti-reflective coating (ARC) deposition practically eliminates background plating during Ni–Cu contact metallization for c-Si solar cells. This step is relatively simple and could henceforth enable the commercialization of plated Ni–Cu contacts, which is currently inhibited by the creation of localized metal-silicon interfaces due to background plating, among other issues like adhesion. The average active area efficiency and fill-factor of reference cells without any plasma treatment are 17.4% and 73.5%, respectively. N2O plasma treatment before ARC deposition leads to an improved average fill-factor of 75.0%. This improvement is attributed to a reduction in the area affected by background plating by approximately 40% due to the formation of a thin silicon oxy-nitride layer. N2O plasma treatment after ARC deposition is even more effective and can overcome background plating with an average active area cell efficiency and fill-factor of 18.5% and 77.5%, respectively. This performance improvement is attributed to oxidation of the ARC surface by the plasma post-treatment. Analysis of background plating losses is complemented by current–voltage curve fits to a 3-diode model with resistance limited recombination, performed by the freely available program “2/3-Diode Fit”. Weniger anzeigen

Exposing a plasma-enhanced chemical vapor deposition-deposited silicon nitride (SiNx) film to an inert gasoxidizing plasma ambient results in a significant reduction in background plating in the case of electroplated Ni-Cu metallization on c-Si solar cells. However, plasma treatment of SiNx is known to result in a degradation of the Si-SiNx interface. In this paper, we investigate the impact of an Ar/N2 O plasma treatment process on the surface passivation properties of SiNx film. Following the… Mehr anzeigen

Exposing a plasma-enhanced chemical vapor deposition-deposited silicon nitride (SiNx) film to an inert gasoxidizing plasma ambient results in a significant reduction in background plating in the case of electroplated Ni-Cu metallization on c-Si solar cells. However, plasma treatment of SiNx is known to result in a degradation of the Si-SiNx interface. In this paper, we investigate the impact of an Ar/N2 O plasma treatment process on the surface passivation properties of SiNx film. Following the plasma treatment, effective minority carrier lifetime (τeff ) is seen to improve from 266 to 864 μs at a minority carrier density of 1015 cm-3. The interface-state density (Dit) at the Si-SiNx interface also decreases by an order of magnitude, following the Ar/N2 O plasma treatment. Enhancement in τeff is found to be stable for annealing temperatures up to 450°C, which is typically used for Ni-Cu contact sintering. Substrate annealing during the post-deposition plasma treatment process is seen to play a major role in improving the τeff . Coupled with its potential for reducing the background plating, the proposed process is a promising candidate for developing the passivation layers for cell technologies with low-temperature metallization schemes. Weniger anzeigen

In this study, the impact of impurities incorporated into plated nickel seed layer on silicide formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells with Ni-Cu contacts is investigated. The silicide growth of electroless plated nickel seed layer is significantly retarded compared with literature data on physical-vapor-deposition (PVD)-based nickel annealed at 550 °C. X-ray photoelectron spectroscopy and X-ray diffraction reveal the presence of SiO2 at… Mehr anzeigen

In this study, the impact of impurities incorporated into plated nickel seed layer on silicide formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells with Ni-Cu contacts is investigated. The silicide growth of electroless plated nickel seed layer is significantly retarded compared with literature data on physical-vapor-deposition (PVD)-based nickel annealed at 550 °C. X-ray photoelectron spectroscopy and X-ray diffraction reveal the presence of SiO2 at the Ni-Si interface and the formation of nickel phosphides in addition to nickel silicide. The retardation in silicide growth is attributed to the presence of (111) planes after the texturing process and contaminants in the seed layer. Varying the annealing temperature of fabricated cells from 350 °C to 425 °C led to a decrease in the average FF from 79.3% to 77.5%. The loss analysis is based on Suns-V oc measurements, illuminated current-voltage parameters, and dark current-voltage curve fitting based on a three-diode model. It reveals that the FF loss is dominated by increased junction recombination, whereas losses due to third-diode component become significant for annealing at 400 °C and higher temperatures. The results highlight the need to carefully tune the seed layer annealing parameters to the interface conditions and junction depth of solar cells. Weniger anzeigen

Electroless nickel plating is a suitable method for seed layer deposition in Ni–Cu-based solar cell metallization. Nickel silicide formation and hence contact resistivity of the interface is largely influenced by the plating process and annealing conditions. In the present work, a thin seed layer is deposited from neutral pH and alkaline electroless nickel baths which are annealed in the range of 400–420∘C for silicide morphology and contact resistivity studies. A minimum contact resistivity of… Mehr anzeigen

Electroless nickel plating is a suitable method for seed layer deposition in Ni–Cu-based solar cell metallization. Nickel silicide formation and hence contact resistivity of the interface is largely influenced by the plating process and annealing conditions. In the present work, a thin seed layer is deposited from neutral pH and alkaline electroless nickel baths which are annealed in the range of 400–420∘C for silicide morphology and contact resistivity studies. A minimum contact resistivity of 7 mΩ cm2 is obtained for seed layer deposited from alkaline bath. Silicide formation for Pd-activated samples leads to uniform surface morphology as compared with unactivated samples due to non-homogeneous migration of nickel atoms at the interface. Formation of nickel phosphides during annealing and the presence of SiO2 at Ni–Si interface creates isolated Ni2Si–Si interface with limited supply of silicon. Such an interface leads to the formation of high resistivity metal-rich Ni3Si silicide phase which limits the reduction in contact resistivity. Weniger anzeigen

During front contact formation for c-Si cells via Ni-Cu plating on patterned SiNx undesirable background plating can lead to a severe efficiency reduction due to shading, increased recombination and shunting losses. In this work, complete cells based on Ni-Cu metallization are fabricated and background plating is analyzed by surface studies and current-voltage (I-V) based characterization. Reduction in Voc and Jsc by up to 25 mV and 4.23 mA/cm2 along with decreased fill factors obtained from… Mehr anzeigen

During front contact formation for c-Si cells via Ni-Cu plating on patterned SiNx undesirable background plating can lead to a severe efficiency reduction due to shading, increased recombination and shunting losses. In this work, complete cells based on Ni-Cu metallization are fabricated and background plating is analyzed by surface studies and current-voltage (I-V) based characterization. Reduction in Voc and Jsc by up to 25 mV and 4.23 mA/cm2 along with decreased fill factors obtained from the illuminated I-V data indicate increased recombination losses and reduced shunt resistance. The local ideality factor variation for dark I-V data indicates presence of an additional defect contribution near the maximum power point. Reliable fitting and parameter extraction was possible for such cells by adding a 3rd diode for the resistance limited recombination to the standard two-diode model. This modification facilitates the quantification of efficiency losses due to background plating and is publicly available in the open-source tool “2/3-Diode Fit”.
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Given the high percentage of metal cost in cell processing and concerns due to increasing Ag prices, alternative metallization schemes are being considered. Ni-Cu based front side metallization offers potential advantages of finer grid lines, lower series resistance, and reduced costs. A brief overview of various front side patterning techniques is presented. Subsequently, working principle of various plating techniques is discussed. For electroless plated Ni seed layer, fill factor values… Mehr anzeigen

Given the high percentage of metal cost in cell processing and concerns due to increasing Ag prices, alternative metallization schemes are being considered. Ni-Cu based front side metallization offers potential advantages of finer grid lines, lower series resistance, and reduced costs. A brief overview of various front side patterning techniques is presented. Subsequently, working principle of various plating techniques is discussed. For electroless plated Ni seed layer, fill factor values nearing 80% and efficiencies close to 17.5% have been demonstrated, while for Light Induced Plating deposited layers, an efficiency of 19.2% has been reported. Various methods for qualifying adhesion and long term stability of metal stack are discussed. Adhesion strengths in the range of 1–2.7 N/mm have been obtained for Ni-Cu contacts tabbed with conventional soldering process. Given the significance of metallization properties, different methods for characterization are outlined. The problem of background plating for Ni-Cu based metallization along with the various methods for characterization is summarized. An economic evaluation of front side metallization indicates process cost saving of more than 50% with Ni-Cu-Sn based layers. Recent successful commercialization and demonstration of Ni-Cu based metallization on industrial scale indicate a potential major role of Ni-Cu based contacts in near future. Weniger anzeigen

Ni-Cu based front contacts for c-Si cells are plated on patterned SiNx and there could be undesirable background plating leading to shading and shunting losses. In this work, background plating from an alkaline Ni bath is analyzed by Suns-Voc and CoreScan studies. It has been observed that for plating interval of two minutes, pseudo fill-factor show variations till 67% and average Rsh value was less than half of unprocessed cells. Decrease in Rsh for plating interval of one minute was not as… Mehr anzeigen

Ni-Cu based front contacts for c-Si cells are plated on patterned SiNx and there could be undesirable background plating leading to shading and shunting losses. In this work, background plating from an alkaline Ni bath is analyzed by Suns-Voc and CoreScan studies. It has been observed that for plating interval of two minutes, pseudo fill-factor show variations till 67% and average Rsh value was less than half of unprocessed cells. Decrease in Rsh for plating interval of one minute was not as severe as for two minute plating. Weniger anzeigen

We report on the investigation of Inductively Coupled Plasma Atomic Emission Spectroscopy (ICP AES), a trace element analysis technique, as a bulk impurity characterization and process monitoring technique in silicon solar cell fabrication. Various impurities may be inherent to the nascent silicon material itself or get introduced during the fabrication process. These may be present at the surface or in the bulk of the silicon wafer and would degrade performance of the solar cells. The… Mehr anzeigen

We report on the investigation of Inductively Coupled Plasma Atomic Emission Spectroscopy (ICP AES), a trace element analysis technique, as a bulk impurity characterization and process monitoring technique in silicon solar cell fabrication. Various impurities may be inherent to the nascent silicon material itself or get introduced during the fabrication process. These may be present at the surface or in the bulk of the silicon wafer and would degrade performance of the solar cells. The distribution of impurities varies throughout the wafer during the solar cell fabrication process. The analysis of the etchant solutions obtained by layer-wise digestion of the solar cell precursor after each step of fabrication using ICP AES elucidates how the distribution of impurities changes during the process. Also monitoring the impurity content in various chemical baths, such as the chemicals used for wafer cleaning, saw damage etching (SDE) or phosphosilicate glass (PSG) removal, after processing batches of wafers offers an insight about performance of chemical processes. Thus it would be a powerful tool for monitoring impurity content in the starting wafers, those introduced during cell processing and hence useful for improving efficiency and yield. Weniger anzeigen