
Table of Contents v
Version 2.02
Table of Contents
Chapter 1. Introduction . . . . . . . . . . 1
1.1 Overview. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Computation modes . . . . . . . . . . . . . 1
1.3 Instruction Mnemonics and Operands1
1.4 Compatibility with the POWER Archi-
tecture . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.5 Document Conventions . . . . . . . . . . 2
1.5.1 Definitions and Notation. . . . . . . . . 2
1.5.2 Reserved Fields and Reserved Val-
ues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5.3 Description of Instruction Operation 4
1.6 Processor Overview . . . . . . . . . . . . . 6
1.7 Instruction formats . . . . . . . . . . . . . . 7
1.7.1 I-Form . . . . . . . . . . . . . . . . . . . . . . 8
1.7.2 B-Form. . . . . . . . . . . . . . . . . . . . . . 8
1.7.3 SC-Form . . . . . . . . . . . . . . . . . . . . 8
1.7.4 D-Form . . . . . . . . . . . . . . . . . . . . . 8
1.7.5 DS-FORM . . . . . . . . . . . . . . . . . . . 8
1.7.6 X-FORM . . . . . . . . . . . . . . . . . . . . 9
1.7.7 XL-FORM . . . . . . . . . . . . . . . . . . . 9
1.7.8 XFX-FORM . . . . . . . . . . . . . . . . . . 9
1.7.9 XFL-FORM . . . . . . . . . . . . . . . . . . 9
1.7.10 XS-FORM . . . . . . . . . . . . . . . . . . 9
1.7.11 XO-FORM . . . . . . . . . . . . . . . . . . 9
1.7.12 A-FORM . . . . . . . . . . . . . . . . . . 10
1.7.13 M-FORM . . . . . . . . . . . . . . . . . . 10
1.7.14 MD-FORM . . . . . . . . . . . . . . . . . 10
1.7.15 MDS-FORM. . . . . . . . . . . . . . . . 10
1.7.16 Instruction Fields . . . . . . . . . . . . 10
1.8 Classes of Instructions . . . . . . . . . . 12
1.8.1 Defined Instruction Class. . . . . . . 12
1.8.2 Illegal Instruction Class . . . . . . . . 12
1.8.3 Reserved Instruction Class . . . . . 12
1.9 Forms of Defined Instructions. . . . . 13
1.9.1 Preferred Instruction Forms. . . . . 13
1.9.2 Invalid Instruction Forms . . . . . . . 13
1.10 Optionality. . . . . . . . . . . . . . . . . . . 14
1.11 Exceptions . . . . . . . . . . . . . . . . . . 14
1.12 Storage Addressing . . . . . . . . . . . 14
1.12.1 Storage Operands . . . . . . . . . . . 14
1.12.2 Effective Address Calculation . . 15
Chapter 2. Branch Processor . . . . 17
2.1 Branch Processor Overview . . . . . . 17
2.2 Instruction Execution Order . . . . . . 17
2.3 Branch Processor Registers. . . . . . 18
2.3.1 Condition Register . . . . . . . . . . . . 18
2.3.2 Link Register . . . . . . . . . . . . . . . . 19
2.3.3 Count Register . . . . . . . . . . . . . . . 19
2.4 Branch Processor Instructions . . . . 20
2.4.1 Branch Instructions . . . . . . . . . . . 20
2.4.2 System Call Instruction . . . . . . . . 26
2.4.3 Condition Register Logical Instruc-
tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.4.4 Condition Register Field
Instruction . . . . . . . . . . . . . . . . . . . . . . . 30
Chapter 3. Fixed-Point Processor .31
3.1 Fixed-Point Processor Overview. . . 31
3.2 Fixed-Point Processor
Registers . . . . . . . . . . . . . . . . . . . . . . . . 31
3.2.1 General Purpose Registers . . . . . 31
3.2.2 Fixed-Point Exception Register . . 32
3.3 Fixed-Point Processor Instructions . 33
3.3.1 Fixed-Point Storage Access Instruc-
tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3.1.1 Storage Access Exceptions. . . . 33
3.3.2 Fixed-Point Load Instructions. . . . 33
3.3.3 Fixed-Point Store Instructions . . . 40
3.3.4 Fixed-Point Load and Store with Byte
Reversal Instructions . . . . . . . . . . . . . . . 44
3.3.5 Fixed-Point Load and Store Multiple
Instructions . . . . . . . . . . . . . . . . . . . . . . 46
3.3.6 Fixed-Point Move Assist Instruc-
tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.7 Other Fixed-Point Instructions . . . 50
3.3.8 Fixed-Point Arithmetic Instructions51
3.3.9 Fixed-Point Compare Instructions 60
3.3.10 Fixed-Point Trap Instructions . . . 62
3.3.11 Fixed-Point Logical Instructions . 65
3.3.12 Fixed-Point Rotate and Shift
Instructions . . . . . . . . . . . . . . . . . . . . . . 71
3.3.12.1 Fixed-Point Rotate Instructions 71
3.3.12.2 Fixed-Point Shift Instructions . 77
3.3.13 Move To/From System Register
Instructions . . . . . . . . . . . . . . . . . . . . . . 81
Chapter 4. Floating-Point Processor.
85
4.1 Floating-Point Processor Overview. 85
4.2 Floating-Point Processor Registers. 86