
HCS12X
Microcontrollers
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MC9S12XEP100
Reference Manual
Covers MC9S12XE Family
MC9S12XEP100RMV1
Rev. 1.22
05/2010

To provide the most up-to-date information, the document revision on the World Wide Web is the most
current. A printed copy may be an earlier revision. To verif, refer to: http://freescale.com/
This document contains information for the complete S12XE-Family and thus includes a set of separate
FTM module sections to cover the whole family. A full list of family members and options is included in
the appendices.
This document contains information for all constituent modules, with the exception of the S12X CPU. For
S12X CPU information please refer to CPU12XV2 in the CPU12/CPU12X Reference Manual.
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Revision History
Date Revision Description
May,2008 1.16
Figure B-3 Θ1 value corrected.
Added LVR minimum assert level
Enhanced RESET pin description.
IIC register name corrected
Corrected D-Flash size reference for XEG128
Changed module revision history tables to a unified format
Corrected corrupted formats
Jul, 2008 1.17
Added Module Run Idd Values
Added 3.3V expansion bus timing
Corrected NVM timing parameters
Changed IIC SCL Divider note
Sep, 2008 1.18
Updated NVM timing parameter section for brownout case
Specified time delay from RESET to start of CPU code execution
Added NVM patch Part IDs
Enhanced ECT GPIO / timer function transitioning description
Dec, 2008 1.19
Updated 208MAPBGA thermal parameters
Revised TIM flag clearing procedure
Corrected CRG register address
Added maskset identifier suffix for ATMC fab
Fixed typos
Aug, 2009 1.20
Added 208MAPBGA disclaimer
Added VREAPI to PT5. Added LVR Note to electricals.
Updates to TIM/ECT/XGATE/SCI/MSCAN (see embedded rev. history)
Apr, 2010 1.21
FTM section (see FTM revision history)
PIM section (see PIM revision history)
May, 2010 1.22
ECT and TIM sections (see ECT, TIM revision history tables)
BDM Alternate clock source defined in device overview

MC9S12XE-Family Reference Manual , Rev. 1.21
Freescale Semiconductor 3
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indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Chapter 1 Device Overview MC9S12XE-Family. . . . . . . . . . . . . . . . . . . . .27
Chapter 2 Port Integration Module (S12XEP100PIMV1) . . . . . . . . . . . . . .89
Chapter 3 Memory Mapping Control (S12XMMCV4). . . . . . . . . . . . . . . .187
Chapter 4 Memory Protection Unit (S12XMPUV1) . . . . . . . . . . . . . . . . .227
Chapter 5 External Bus Interface (S12XEBIV4). . . . . . . . . . . . . . . . . . . .241
Chapter 6 Interrupt (S12XINTV2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .261
Chapter 7 Background Debug Module (S12XBDMV2) . . . . . . . . . . . . . .277
Chapter 8 S12X Debug (S12XDBGV3) Module . . . . . . . . . . . . . . . . . . . .303
Chapter 9 Security (S12XE9SECV2). . . . . . . . . . . . . . . . . . . . . . . . . . . . .345
Chapter 10 XGATE (S12XGATEV3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .351
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1) . . . . . .467
Chapter 12 Pierce Oscillator (S12XOSCLCPV2) . . . . . . . . . . . . . . . . . . . .497
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1) . . . . . . . . . . . .501
Chapter 14 Enhanced Capture Timer (ECT16B8CV3). . . . . . . . . . . . . . . .525
Chapter 15 Inter-Integrated Circuit (IICV3) Block Description. . . . . . . . .577
Chapter 16 Scalable Controller Area Network (S12MSCANV3) . . . . . . . .603
Chapter 17 Periodic Interrupt Timer (S12PIT24B8CV2) . . . . . . . . . . . . . .657
Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2) . . . . . . . . . . . . . .675
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1) . . . . . . . . . . . . . .689
Chapter 20 Serial Communication Interface (S12SCIV5) . . . . . . . . . . . . .721
Chapter 21 Serial Peripheral Interface (S12SPIV5) . . . . . . . . . . . . . . . . . .759
Chapter 22 Timer Module (TIM16B8CV2) Block Description . . . . . . . . . .785
Chapter 23 Voltage Regulator (S12VREGL3V3V1) . . . . . . . . . . . . . . . . . .813
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1) . . . . . . . . . . . .829
Chapter 25 256 KByte Flash Module (S12XFTM256K2V1) . . . . . . . . . . . .889

MC9S12XE-Family Reference Manual , Rev. 1.21
4 Freescale Semiconductor
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Chapter 26 384 KByte Flash Module (S12XFTM384K2V1) . . . . . . . . . . . .951
Chapter 27 512 KByte Flash Module (S12XFTM512K3V1) . . . . . . . . . . .1013
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2) . . . . . . . . . . .1075
Chapter 29 1024 KByte Flash Module (S12XFTM1024K5V2) . . . . . . . . .1137
Appendix A Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . .1199
Appendix B Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1255
Appendix C PCB Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1260
Appendix D Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1265
Appendix E Detailed Register Address Map. . . . . . . . . . . . . . . . . . . . . . .1268
Appendix F Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1319

MC9S12XE-Family Reference Manual Rev. 1.21
Freescale Semiconductor 5
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