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TI-PCMD3140-Q1是一款高性能的脉冲密度调制（PDM）输入至时间分复用（TDM）或I2S输出转换器，设计用于处理汽车音频系统中的多个数字音频通道。该器件支持最多四个PDM麦克风输入通道的同时采样，为汽车主动降噪、车载娱乐系统、数字驾驶舱处理单元以及远程通信控制单元等应用提供了理想的解决方案。该器件的主要特性包括： 1. **四通道同步转换**：PCMD3140-Q1能将4个PDM麦克风信号同时转换为TDM或I2S格式的数字音频输出，确保高保真音频传输。 2. **动态范围**：具有出色的动态范围性能，当采用5阶PDM输入时，动态范围达到127dB；而采用4阶PDM输入时，动态范围为117dB。 3. **通道求和模式**：在4阶PDM输入下，2通道求和模式可实现120dB的动态范围，优化了多通道音频信号的处理。 4. **可编程PDM时钟输出**：支持768kHz到6.144MHz的时钟频率，适应不同应用场景的需求。 5. **可编程输出采样率**：采样率范围从8kHz到768kHz，可灵活调整以匹配各种音频系统的标准。 6. **通道设置**：包括数字音量控制（-100dB至27dB）、0.1dB分辨率的增益校准、163-ns分辨率的相位校准等，确保精细的音频调整。 7. **麦克风偏置或电源电压生成**：提供麦克风工作所需的电压，简化系统设计。 8. **语音活动检测（VAD）**：自动识别并处理语音信号，降低功耗和提高效率。 9. **低延迟信号处理滤波器选择**：内置低延迟滤波器模式，优化实时音频处理。 10. **可编程HPF和biquad数字滤波器**：允许用户根据需求定制滤波器特性，提升音频质量。 11. **I2C控制**：通过I2C接口进行配置和控制，简化系统集成。 12. **高性能音频PLL**：提供稳定的时钟源，确保音频数据的准确传输。 13. **自动时钟分频器设置**：自动配置时钟分频器，确保与外部设备的兼容性。 14. **音频串行数据接口**：支持TDM、I2S和左对齐（LJ）格式，数据宽度可达32位，同时支持主从模式，增强了系统灵活性。 15. **单电源操作**：可在3.3V或1.8V电压下工作，满足低功耗需求。 16. **I/O电源操作**：同样支持3.3V或1.8V的I/O电压，进一步降低系统功耗。 17. **功耗**：在1.8V供电下，16kHz采样率下每个通道的功耗仅为2.8mW，48kHz采样率下为3.6mW，实现了高效能与低能耗的平衡。 TI-PCMD3140-Q1是面向汽车音频应用的高性能转换器，其丰富的功能、高动态范围和低功耗特性使其成为汽车电子系统音频处理的理想选择。通过精确的数字控制和灵活的接口选项，该器件能够适应多种复杂的音频系统设计，确保卓越的音频质量和系统的稳定性。

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PCMD3140-Q1 Quad-Channel, PDM Input to TDM or I

S Output Converter

1 Features

• 4-channel PDM microphones simultaneous

conversion

• PDM input to TDM or I

S output converter

performance:

– 127-dB dynamic range (DR) with high-

performance, 5th-order PDM input

– 117-dB dynamic range (DR) with high-

performance, 4th-order PDM input

• Channel summing mode, DR performance with

high-performance, 4th-order PDM input:

– 120-dB, 2-channel summing

• Programmable PDM clock output:

– 768 kHz to 6.144 MHz

• Programmable output sample rate (f

– 8 kHz to 768 kHz

• Programmable channel settings:

– Digital volume control: –100 dB to 27 dB

– Gain calibration: 0.1-dB resolution

– Phase calibration: 163-ns resolution

• Microphone bias or supply voltage generation

• Voice activity detection (VAD)

• Low-latency signal processing filter selection

• Programmable HPF and biquad digital filters

• I

C control

• Integrated high-performance audio PLL

• Automatic clock divider setting configurations

• Audio serial data interface:

– Format: TDM, I

S, or left-justified (LJ)

– Word length: 16 bits, 20 bits, 24 bits, or 32 bits

– Master or slave interface

• Single-supply operation: 3.3 V or 1.8 V

• I/O-supply operation: 3.3 V or 1.8 V

• Power consumption for 1.8-V supply:

– 2.8mW/channel at 16-kHz sample rate

– 3.6 mW/channel at 48-kHz sample rate

2 Applications

• Automotive Active Noise Cancellation

• Automotive Head Unit

• Rear Seat Entertainment

• Digital Cockpit Processing Unit

• Telematics Control Unit

3 Description

The PCMD3140-Q1 is a high-performance, pulse-

density-modulation (PDM) input to time-division

multiplexing (TDM) or I

S output converter that

supports simultaneous sampling of up to four

digital channels for the PDM microphone input.

The device integrates programable digital volume

control, a microphone bias voltage, a phase-locked

loop (PLL), a programmable high-pass filter (HPF),

biquad filters, low-latency filter modes, and allows

for output sample rates up to 768 kHz. The device

supports time-division multiplexing (TDM), I

S, or left-

justified (LJ) audio formats, and can be controlled

with the I

C interface. Additionally, the PCMD3140-

Q1 supports master and slave mode selection for

the audio bus interface operation. These integrated

high-performance features, along with the ability to

be powered from a single-supply of 3.3 V or 1.8

V, make the device an excellent choice for space-

constrained audio systems in far-field microphone

recording applications.

The PCMD3140-Q1 is specified from –40°C to

+125°C, and is offered in a 20-pin WQFN package.

Device Information

PART NUMBER

(1)

PACKAGE BODY SIZE (NOM)

PCMD3140-Q1 WQFN (20)

3.00 mm × 3.00 mm with

0.5-mm pitch

(1) For all available packages, see the package option

addendum at the end of the data sheet.

Audio Serial

Interface

(TDM, I

S, LJ)

PLL and Clock Generation

C Interface

MICBIAS, Regulators and

Voltage Reference

Programmable

Digital Filters,

Biquads

4-Channel

Digital PDM

Microphones

Simultaneous

Conversion

PDMDIN1_GPI1

PDMCLK_GPO1

PDMDIN2_GPI2

GPIO1

VREF

FSYNC

BCLK

SDOUT

SDA

SCL

AREG

DREG AVSS

Thermal Pad

(VSS)

AVDD

IOVDD

Simplified Block Diagram

ADVANCE INFORMATION

PCMD3140-Q1

SBASAH3 – APRIL 2022

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change

without notice.

Table of Contents

1 Features............................................................................1

2 Applications..................................................................... 1

3 Description.......................................................................1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings........................................ 4

6.2 ESD Ratings............................................................... 4

6.3 Recommended Operating Conditions.........................5

6.4 Thermal Information....................................................5

6.5 Electrical Characteristics.............................................6

6.6 Timing Requirements: I

C Interface............................8

6.7 Switching Characteristics: I

C Interface......................9

6.8 Timing Requirements: TDM, I

S or LJ Interface......... 9

6.9 Switching Characteristics: TDM, I

S or LJ

Interface........................................................................ 9

Timing Requirements: PDM Digital Microphone

Interface...................................................................... 10

6.10 Switching Characteristics: PDM Digial

Microphone Interface...................................................10

6.11 Timing Diagrams..................................................... 10

6.12 Typical Characteristics............................................ 12

7 Detailed Description......................................................15

7.1 Overview................................................................... 15

7.2 Functional Block Diagram......................................... 16

7.3 Feature Description...................................................16

7.4 Device Functional Modes..........................................49

7.5 Programming............................................................ 50

7.6 Register Maps...........................................................53

8 Application and Implementation.................................. 92

8.1 Application Information............................................. 92

8.2 Typical Application.................................................... 92

8.3 What to Do and What Not to Do............................... 95

9 Section 7.4Power Supply Recommendations..............96

10 Layout...........................................................................99

10.1 Layout Guidelines................................................... 99

10.2 Layout Example...................................................... 99

11 Device and Documentation Support........................100

11.1 Documentation Support........................................ 100

11.2 Receiving Notification of Documentation Updates 100

11.3 Support Resources............................................... 100

11.4 Trademarks........................................................... 100

11.5 Electrostatic Discharge Caution............................ 100

11.6 Glossary................................................................ 100

12 Mechanical, Packaging, and Orderable

Information.................................................................. 100

12.1 Tape and Reel Information....................................104

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision * (December 2020) to Revision A (June 2021) Page

• Changed document status from advance information to production data.......................................................... 1

PCMD3140-Q1

SBASAH3 – APRIL 2022

www.ti.com

ADVANCE INFORMATION

2 Submit Document Feedback

Product Folder Links: PCMD3140-Q1

5 Pin Configuration and Functions

19 PDMDIN2_GPI26SDOUT

1NC 14 DREG

18 VREF7BCLK

2NC 13 SCL

17 AREG8FSYNC

3PDMDIN1_GPI1 12 SDA

16 AVDD9IOVDD

4PDMCLK_GPO1 11 GPIO1

Not to scale

Thermal Pad (VSS)

VSS

Figure 5-1. RTE Package, 20-Pin WQFN With Exposed Thermal Pad, Top View

Table 5-1. Pin Functions

TYPE DESCRIPTION

NO. NAME

1 NC No connect No connection

2 NC No connect No connection

3 PDMDIN1_GPI1 Digital input

Digital input 1 (multipurpose functions such as digital microphones data, PLL input clock

source, and so forth).

4 PDMCLK_GPO1 Digital output

General-purpose digital output 1 (multipurpose functions such as digital microphone clock,

interrupt, and so forth).

5 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

6 SDOUT Digital output Audio serial data interface bus output.

7 BCLK Digital I/O Audio serial data interface bus bit clock.

8 FSYNC Digital I/O Audio serial data interface bus frame synchronization signal.

9 IOVDD Digital supply Digital I/O power supply (1.8 V or 3.3 V, nominal).

10 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

11 GPIO1 Digital I/O

General-purpose digital input/output 1 (multipurpose functions such as digital microphones

clock or data, PLL input clock source, interrupt, and so forth).

12 SDA Digital I/O Data pin for I

C control bus.

13 SCL Digital input Clock pin for I

C control bus.

14 DREG Digital supply

Digital regulator output voltage for digital core supply (1.5 V, nominal). Connect a 10-µF

and a 0.1-µF low ESR capacitor in parallel to the device ground (VSS).

15 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

16 AVDD Analog supply Analog power (1.8 V or 3.3 V, nominal).

17 AREG Analog supply

Analog on-chip regulator output voltage for analog supply (1.8 V, nominal) or external

analog power (1.8 V, nominal). Connect a 10-µF and a 0.1-µF low ESR capacitor in parallel

to the analog ground (AVSS).

18 VREF Analog Analog reference voltage filter output. Connect a 1-µF to the analog ground (AVSS).

www.ti.com

PCMD3140-Q1

SBASAH3 – APRIL 2022

ADVANCE INFORMATION

Submit Document Feedback

Product Folder Links: PCMD3140-Q1

Table 5-1. Pin Functions (continued)

TYPE DESCRIPTION

NO. NAME

19 PDMDIN2_GPI2 Analog output/digital input

Digital Input 2. MICBIAS output or general-purpose digital input 2 (multipurpose functions

such as digital microphones data, MICBIAS, PLL input clock source, and so forth). If used

as MICBIAS output, then connect a 1 µF to analog ground (AVSS)

20 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

Thermal Pad

(VSS)

Ground supply

Thermal pad is shorted to the internal device ground. Short the thermal pad directly to the

board ground plane.

6 Specifications

6.1 Absolute Maximum Ratings

over the operating ambient temperature range (unless otherwise noted)

(1)

MIN MAX UNIT

Supply voltage

AVDD to AVSS –0.3 3.9

VAREG to AVSS –0.3 2.0

IOVDD to VSS (thermal pad) –0.3 3.9

Ground voltage differences AVSS to VSS (thermal pad) –0.3 0.3 V

Digital input voltage

Digital input except PDMDINx_GPIx pins voltage to VSS

(thermal pad)

–0.3 IOVDD + 0.3

Digital input PDMDINx_GPIx pins voltage to VSS

(thermal pad)

–0.3 AVDD + 0.3

Temperature

Operating ambient, T

–40 125

°CJunction, T

–40 150

Storage, T

stg

–65 150

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

6.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

(1)

±2000

Charged-device model (CDM), per JEDEC specification JESD22-C101

(2)

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

PCMD3140-Q1

SBASAH3 – APRIL 2022

www.ti.com

ADVANCE INFORMATION

4 Submit Document Feedback

Product Folder Links: PCMD3140-Q1

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