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Determining the stack usage of applications 
AN 316, Spring 2019, V 1.1 
[email protected] 
AN316 – Determining the stack usage of applications     Copyright © 2019 Arm Ltd. All rights reserved 
 
  www.keil.com/appnotes/docs/apnt_316.asp 
1 
Abstract 
Determining the required stack sizes for a software project is a crucial part of the development process. The 
developer aims to create a stable application, while not wasting resources. This application note explains 
methods that help finding the optimal setting while looking specifically on the stack load caused by interrupt 
service routines (ISRs) in RTOS applications running on an Arm Cortex-M based processor. 
Contents 
Abstract ......................................................................................................................................................................1 
Introduction ................................................................................................................................................................2 
Usage of Stack Memory ..............................................................................................................................................2 
Stack usage of Interrupt Service Routines ..............................................................................................................3 
Memory requirement for automatic register stacking .......................................................................................3 
Stack usage of the RTX5 Kernel ..............................................................................................................................4 
Analysis of Stack Usage ..............................................................................................................................................5 
Static analysis ..........................................................................................................................................................5 
Dynamic analysis .....................................................................................................................................................6 
Thread stack watermarking.................................................................................................................................6 
Main stack watermarking ....................................................................................................................................7 
Calculate and configure stack usage ..........................................................................................................................9 
Thread stacks ..........................................................................................................................................................9 
Main stack ............................................................................................................................................................ 10 
Example: AN316.uvprojx ......................................................................................................................................... 11 
Thread stack usage .............................................................................................................................................. 11 
Dynamic stack analysis ..................................................................................................................................... 11 
Static analysis ................................................................................................................................................... 11 
Configure thread stacks ................................................................................................................................... 12 
Main stack usage ................................................................................................................................................. 12 
Static analysis ................................................................................................................................................... 12 
Calculate main stack size .................................................................................................................................. 13 
Summary .................................................................................................................................................................. 13 
References ............................................................................................................................................................... 14 
 
   

www.keil.com/appnotes/docs/apnt_318.asp

Introduction

Stacks are memory regions where data is added or removed in a last-in-first-out (LIFO) manner. In an RTOS,

each thread has a separate memory region for its stack. During function execution, data may be added on top of

the stack; when the function exits, it removes that data from the stack.

In a Cortex-M processor system, two stack memory regions need to be considered:

• The system stack is used before the RTOS kernel starts and by interrupt service routines (ISRs). It is

addressed via the Main Stack Pointer (MSP).

• The thread stack(s) are used by running RTOS threads and are addressed via the Process Stack Pointer

(PSP).

As the memory region for stack is constrained in size, allocating more memory on the stack than is available, can

result in a program crash or stack overflow. In embedded systems, the timing of external program events

influences the program flow and a stack size issue may create infrequent, sporadic program errors. It is

therefore critical to understand the stack memory requirements of an application.

For calculating (and therefore optimizing) the required stack memory size, the following methods may be used:

• Static analysis (using call tree analysis) is performed at build time (by a linker for example).

• Dynamic analysis (using stack watermarking) is performed at run-time (in a debug session for example).

Usage of Stack Memory

In an embedded application, the stack memory is typically used in the following constructs:

• On function calls to save register content (such as the link register (LR) for the return address)

• Local function variables are stored on the stack when no CPU registers are available.

• For interrupt service execution, the register frames are store on the stack.

The application programmer may influence the stack memory usage with for following techniques:

• For arrays, allocate space from memory pools instead of local function variables.

• Reduce the potential interrupt nesting by choosing the right number of interrupt priority levels.

• Simplify the function call nesting. However, as this impacts the program readability, there is a balance.

Also, modern compiler optimizations perform automatic function in-lining and therefore function call

nesting is less important.

The picture below shows the stack usage of an embedded application that is using an RTOS kernel. ISRs use the

main stack, a thread uses the thread stack whereby each thread has its own stack space that is managed by the

RTOS kernel. Each thread stack should reserve additional memory that is required for “thread context

switching”. The memory required for “thread context switching” depends on the usage of the floating-point

unit (FPU):

• without FPU: 64 bytes (to save R0..R12, LR, PC, xPSR)

• with FPU: 200 bytes (to save S0..S31, FPSCR, R0..R12, LR, PC, xPSR)

Optionally, an RTOS stores an “overflow protect pattern” (which is a fixed value) at the stack bottom which is

used by the kernel to check for stack overflows.

www.keil.com/appnotes/docs/apnt_318.asp

Note that RTX5 itself executes in handler mode and uses the main stack for kernel functions. This is different

from other RTOS kernels (i.e. FreeRTOS), where the kernel functions use the thread stack and therefore require

additional memory space on each individual thread stack.

Stack usage of Interrupt Service Routines

Interrupt service routines run when an exception has occurred and use the main stack. They are triggered by a

peripheral, hardware fault, or by software with the Service Call (SVC) instruction. For interrupt service routines,

the processor does automatic register stacking on the current active stack: when thread stack is active, PSP is

used, otherwise MSP.

Memory requirement for automatic register stacking

The memory required for automatic register stacking depends on the actual stack alignment and the usage of

the floating-point registers of the program code that is interrupted. The usage of the floating-point registers is

indicated by the processor in CONTROL register - FPCA bit (bit 2):

• When CONTROL – bit 2 = 0: automatic register stacking uses 32 bytes (+ 4 bytes aligner)

• When CONTROL – bit 2 = 1: automatic register stacking uses 104 bytes (+ 4 bytes aligner)

NOTES

• For Cortex-M processors without hardware FPU (Cortex-M0/M0+/M3/M23) always use 32 bytes for

automatic register stacking.

• For Cortex-M processors with hardware FPU, it might be complex to analyze the floating-point register

usage of the various threads and ISRs. In this case, always use 104 bytes for automatic register stacking.

Interrupt service routines can be nested due to preemption of interrupts or exceptions. Cortex-M processors

have the following configurations that influence the maximum nesting:

• Each interrupt source has a priority register, whereby lower values indicate higher priority.

• The AIRCR (Application Interrupt and Reset Control Register) contains a PRIGROUP field that defines the

split of the priority register into a group priority and sub-priority within the group. Only a lower group

priority value can preempt code execution.

• Some exceptions have a fixed priority which is typically higher than other interrupt sources.

To consider the interrupt nesting the maximum depth of the stack loads must be added.

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