FPGA

382 Articles

Retro X86 With 486Tang

September 14, 2025 by 4 Comments

Tang FPGA boards are affordable, and [nand2mario] has been trying to get an x86 core running on one for a while. Looks like it finally worked out, as there is an early version of the ao486 design on a Tang FPGA board using a Gowin device. That core’s available on the MiSTer platform, which emulates games using an Altera Cyclone device.

Of course, porting something substantial between FPGA architectures is not trivial. In addition, [nand2mario] made some changes. The original core uses DDR3 memory, but for the Tang and the 486, SDRAM makes more sense. The only problem is that the Tang’s SDRAM is 16 bits wide, which would imply you need two cycles per 32-bit access. To mitigate this, the memory system runs at twice the main clock frequency. Of course, that’s kind of double data rate, but not in the same way as DDR memory.

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Front and back view of the 13.7" monitor kit

Modos Is Open Hardware, Easy On The Eyes

September 8, 2025 by 26 Comments

Since e-ink first hit the market a couple decades back, there’s always murmurs of “that’d be great as a second monitor”— but very, very few monitors have ever been made. When the commecial world is delivering very few options, it leaves room for open source hardware projects, like the Modos Glider and Paper Monitor, projects now seeking funding on Crowd Supply.

As far as PC monitors go, the Modos isn’t going to win many awards on specs alone. The screen is only 13.3″ across, and its resolution maxes out at 1600 x 1200. The refresh rate would be totally unremarkable for a budget LCD, at 75 Hz. This Paper Monitor isn’t an LCD, budget or otherwise, and for e-ink, 75 Hz is a blazing fast refresh rate. Continue reading “Modos Is Open Hardware, Easy On The Eyes” →

FPGA Brings UNIX V1 To The DEC J-11

August 30, 2025 by 13 Comments

If you’ve never used a PDP-11 before it’s probably because you simply weren’t around in the 70s and 80s. Although they started as expensive machines only in research labs and industry, they eventually became much more accessible. They’re a bit of a landmark in computing history, too, being largely responsible for the development of things like UNIX and the C programming language. [ryomuk] is using an FPGA in combination with an original DEC J-11 to bring us a new take on this machine. (Google Translate from Japanese)

The FPGA used in this build is a Tang Nano 20k, notable for its relatively low cost. The FPGA emulates the memory system and UART of a PDP-11 system down to the instruction set, while the original, unmodified DEC chip is left to its own devices. After some initial testing [ryomuk] built a PC11 paper tape emulator to ensure the system was working which runs a version of BASIC from the era. The next thing up was to emulate some disk drives and co-processors so that the machine can run the first version of UNIX. 

[ryomuk] also developed a PCB for the DEC microprocessor and the FPGA to sit on together, and it includes all of the jumpers and wiring needed to allow the computer to run UNIX, as well as handling other miscellaneous tasks like power. It’s an interesting build that gets to the heart of the early days of computer science. PDP-11 computers did eventually get smaller and more accessible, and if you want to build a modern version this build fits a complete system into an ATX case.

Thanks to [RetepV] for the tip!

The 32 Bit 6502 You Never Had

August 24, 2025 by 43 Comments

In the beginning was the MOS6502, an 8-bit microprocessor that found its way into many famous machines. Some of you will know that a CMOS 6502 was created by the Western Design Center, and in turn, WDC produced the 65C816, a 16-bit version that was used in the Apple IIgs as well as the Super Nintendo. It was news to us that they had a 32-bit version in their sights, but after producing a datasheet, they never brought it to market. Last October, [Mike Kohn] produced a Verilog version of this W65C832 processor, so it can be experienced via an FPGA.

The description dives into the differences between the 32, 16, and 8-bit variants of the 6502, and we can see some of the same hurdles that must have faced designers of other chips in that era as they moved their architectures with the times while maintaining backwards compatibility. From our (admittedly basic) understanding it appears to retain that 6502 simplicity in the way that Intel architectures did not, so it’s tempting to imagine what future might have happened had this chip made it to market. We’re guessing that you would still be reading through an Intel or ARM, but perhaps we might have seen a different path taken by 1990s game consoles.

If you’d like to dive deeper into 6502 history, the chip recently turned 50.

Thanks [Liam Proven] for the tip.

Circuit diagram of linear-feedback shift register.

Can We Replace A Program Counter With A Linear-Feedback Shift Register? Yes We Can!

May 31, 2025 by 32 Comments

Today we heard from [Richard James Howe] about his new CPU. This new 16-bit CPU is implemented in VHDL for an FPGA.

The really cool thing about this CPU is that it eschews the typical program counter (PC) and replaces it with a linear-feedback shift register (LFSR). Apparently an LFSR can be implemented in hardware with fewer transistors than are required by an adder.

Usually the program counter in your CPU increments by one, each time indicating the location of the next instruction to fetch and execute. When you replace your program counter with an LFSR it still does the same thing, indicating the next instruction to fetch and execute, but now those instructions are scattered pseudo-randomly throughout your address space!

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IcePI Zero: A Pi Zero For FPGA

May 29, 2025 by 32 Comments

The Rasberry Pi Zero is a delightful form factor, with its GIPO and USB and HDMI, but it’s stuck using the same old ARM processor all the time. What if you wanted to change it up with some OpenSPARC, RISC V, OpenPOWER, or even your own oddball homebrew ISA and processor? Well, fret not, for [Chengyin Yao]’s IcePi Zero has got you covered with its ECP5 25F FPGA.

As the saying goes, you don’t tell an FPGA what to do, you tell it what to be. And with the ECP5 25F’s 24k LUTs, you can tell it to be quite a few different things. This means more work for the maker than plugging in a fixed processor, sure, but IcePi tries to make that as painless as possible with quality-of-life features like HDMI out (something missing from many FPGA dev boards), an onboard USB-to-JTAG converter (so you can just plug it in, no programmer needed), and even USB-C instead of the Pi’s old microUSB. There’s the expected SD card on one end, and 256 MiB of 166 MHz SDRAM on the other to make up for the FPGA’s paltry 112 KiB of onboard RAM.

Plus it’s a drop-in replacement for the Pi Zero, so if you’ve already got a project that’s got one of those running an emulator, you can fab one of these babies, spool up some Verilog, and enjoy running on bare metal. It seems like this device is just made for retro gaming handhelds, but we’d love to hear in the comments if you have other ideas what to do with this board– remember that an FPGA can be (almost) anything, even a GPU!

Currently, [Chengin Yao] is not selling the board, though they may reconsider due to demand in their Reddit thread. If you want one, you’ll have to call your favourite fabricator or etch your own PCB.

We’ve seen FPGAs before; most recently to create an absurdly fast 8080 processor. We’ve also seen DIY dev boards, like this one for the AMD Zyntac FPGA. Doing something fun with FPGAs? Drop us a tip! We’re happy [Chengin Yao] did, because this is amazing work, especially considering they are only 16 years old. We cannot wait to find out what they get up to next.

Two hands soldering components on a purpble PCB

Vintage Intel 8080 Runs On A Modern FPGA

May 26, 2025 by 5 Comments

If you’re into retro CPUs and don’t shy away from wiring old-school voltages, [Mark]’s latest Intel 8080 build will surely spark your enthusiasm. [Mark] has built a full system board for the venerable 8080A-1, pushing it to run at a slick 3.125 MHz. Remarkable is that he’s done so using a modern Microchip FPGA, without vendor lock-in or proprietary flashing tools. Every step is open source.

Getting this vintage setup to work required more than logical tinkering. Mark’s board supplies the ±5 V and +12 V rails the 8080 demands, plus clock and memory interfacing via the M2GL005-TQG144I FPGA. The design is lean: two-layer PCB, basic level-shifters, and a CM32 micro as USB-to-UART fallback. Not everything went smoothly: incorrect footprints, misrouted gate drivers, thermal runaway in the clock section; but he managed to tackle it.

What sets this project apart is the resurrection of a nearly 50-year-old CPU. It’s also, how thoroughly thought-out the modern bridge is—from bitstream loading via OpenOCD to clever debugging of crystal oscillator drift using a scope. [Mark]’s love of the architecture and attention to low-level detail makes this more than a show-off build.
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