proteanTecs

🤔Can you really have too much power? Yes! you can. ... especially when developing a new chip. Excess power isn’t just wasteful; it’s costly, unreliable, and inefficient. To prove it, we compared devices with embedded on-chip monitors to those without. The difference? Powerful, in every sense. 🔋 Without on-chip monitoring: - Excessive peak power - Higher average power - Increased Di/Dt noise - Added thermal, cost & reliability penalties ⚡ With on-chip monitoring from proteanTecs: - Up to 10% peak power reduction - Up to 14% average power reduction - Up to 18% lifetime extension - 5% Di/Dt current swing reduction - Real-time voltage droop detection proteanTecs on-chip monitoring deliver parametric-level accuracy, providing real-time visibility into critical parameters such as actual logic timing margins throughout the entire production lifecycle. The result? Efficient power, lower costs, greater reliability, and measurable improvements in performance. 👉 See the full comparison in Eyal Fayneh’s latest blog at Semiconductor Engineering. https://lnkd.in/gT5rPV7F... #proteanTecs #semiconductors #semiengineering #onchipmonitors

🎌 Join us at the TSMC OIP Japan Ecosystem Forum! Be sure to stop by and meet our proteanTecs team at this exciting event. We’ll be showcasing how proteanTecs’ deep data embedded solutions tackle the toughest challenges in next-generation #AI, #Cloud, #HPC, and #Automotive devices. Discover how we’re helping customers achieve: ⚡ Up to 14% power savings 🚀 18% faster time-to-market 🔋 18% longer device lifetime ✅ 10× fewer #DPPMs Plus, learn how our solution is now TSMC N2P Silicon-Proven on an actual customer device! We look forward to seeing you there! #semiconductors #2nm #OIP #TSMC #proteanTecs #OnChipMonitors

🚀 Join proteanTecs and Andes Joint Session at the RISC-V International Summit As #cloud and #edge workloads demand ever-higher performance, reliability, and efficiency, RISC-V is rapidly emerging as the architecture of choice for next-generation designs. Alongside this growth comes the need for predictive monitoring, essential for clustered training runs and high-compute, low-latency inference. Don't miss this session where proteanTecs Ziv Paz, Vice President Business Development, and Andes Technology Marc Evans, Vice President Marketing and Business Development, will showcase in-situ monitoring that delivers real-time insights into timing margins, degradation, workload stress, and aging. Attendees will learn how integrating proteanTecs’ deep data IP into Andes’ AX45MPV vector processor enables advanced analytics to ensure better performance, longer lifespan, and lower power. We look forward to seeing you there! #proteanTecs #andestechnology #semiconductors #RISC-V #onchipmonitors

New OCP White Paper: A Call to Action on SDCs 🚨 When the biggest names in #AI including NVIDIA, Meta, Google, AMD, Intel Corporation, Arm, and Microsoft join forces to sound the alarm, the entire industry should pay attention. That’s exactly what just happened with Open Compute Project Foundation's newly published white paper, "Silent Data Corruption in AI", with an opening statement: “Traditional fault-tolerance methods are simply unfeasible due to prohibitive overheads in performance, power, and resources. The focus must shift to robust data integrity with optimized error protection and cost.” This is a direct call to action for advanced AI/ML SoC engineers to prioritize resilience in the face of Silent Data Corruption (#SDCs). At proteanTecs, we deliver the next level of visibility needed to solve these issues. With our Real-Time Health Monitoring (RTHM®) telemetry-based embedded solution, developers can achieve: ✅ Unprecedented visibility into device behavior ✅ Proactive and preventive reliability safeguards ✅ Optimized power, performance, and resource efficiency from design through in-field We’re helping chip developers accelerate time-to-market, cut costs, and boost reliability, meeting the challenges of SDC head-on. 👉 Read more in our white paper: https://hubs.la/Q03Msx2Y0 #protenTecs #SDC #OnChipMonitors #semiconductors #DeepData #RTHM

🔍How Much Perfectly Good Silicon Is Being Discarded? An automotive chipmaker saved $250K and a networking chipmaker avoided over $1M in failures by using deep data-driven machine learning during testing. In high-volume chip production, strict testing thresholds are often used to ensure quality—but at the cost of lower yield. Perfectly functional silicon may be discarded, while relaxing those thresholds risks letting latent defects into the field, leading to Silent Data Corruption (#SDC), #RMAs, and system failures. In the recently published article by SemiWiki.com, “Cut Defects, Not Yield: Outlier Detection with ML Precision,” proteanTecs addresses this long-standing tradeoff with a smarter, data-driven approach to semiconductor testing. The article presents the following methods: 🔸Early detection of latent defects at the wafer sort stage 🔸Lower #DPPM without compromising yield 🔸Real-time analytics to avoid costly field failures Read the full article on SemiWiki: 🔗 https://lnkd.in/gpcxr-gq #Semiconductors #OutlierDetection #YieldOptimization #proteanTecs #DataCenters #AutomotiveElectronics

🌡️Thermal control at 2nm: precision or failure. While the physics of heat dissipation remain unchanged, scaling to 2nm leaves virtually no margin for error in thermal control. Even minor inaccuracies in thermal sensing can cascade into overheating, compromised power management, reduced processing speed, reliability concerns, and shortened device lifespan. At these advanced nodes, risks like electromigration, hot carrier injection, and thermal runaway become unavoidable without precise thermal insight. Traditional thermal sensing techniques, like BJTs or ring oscillators, once sufficient above 5nm, fall short at advanced nodes. They simply cannot deliver the resolution or stability needed for effective power and thermal control. That’s why proteanTecs developed LVTS™ (Local Voltage & Thermal Sensor): 🔸±1.0°C accuracy at the device level 🔸Continuous monitoring in real operating conditions 🔸A scalable, easily-integrated solution for advanced SoCs At the 2nm inflection point, innovation in monitoring isn’t just valuable, it’s critical. 👉 Read how we’re redefining thermal sensing for the future of semiconductors: https://lnkd.in/gtzQVa8c #proteanTecs #seminconductors #onchipmonitors #LVTS #thermal

⚡Reducing Power, Extending Lifetime: A New Approach to AI & Data Center Chips In order for advanced semiconductors to achieve true efficiency they must deliver maximum performance while consuming minimal power possible. While traditional characterization and conservative guard banding methods ensure reliability, they also limit performance, increase power usage, and reduce server utilization. There is a better way. Hear from Noam Brousard, VP Solutions Engineering at proteanTecs, as he sits down with Ed Sperling of Semiconductor Engineering to explain how our Agents are enabling tremendous power savings for advanced #AI and #datacenter electronics. Watch the full video here. https://lnkd.in/gV-rVRsE #AI, #DataCenter #proteanTecs #semiconductors #OnChipMonitors

Thank you, TSMC, for an incredible North America OIP Forum Event! We’re proud to showcase our collaboration in advancing innovation for chip providers at 2nm. With our silicon-proven technology validated on TSMC’s process, customers can design the next generation of #AI, #Data Center, #Cloud, #Automotive, and #Mobile devices with confidence. At proteanTecs, we’re providing essential technology to optimize power, ensure resilience, and extend device lifespan, speeding the future of semiconductor innovation. To read more and learn more about our solutions for 2nm read here: https://hubs.la/Q03L2mZ50 Sanjay Lall, Yael Cohen Bar-on 🎗️ Rajiv P. Jennifer Chan Marley Escamilla Zita W. Ziv Paz Noam Brousard Alanna Wolfgramm

📢 NEWS! proteanTecs Silicon-Proven on TSMC N2P We’re excited to announce that proteanTecs is silicon-proven at TSMC’s 2nm (N2P) technology node and validated in a customer device for high-performance applications. Chief Technology Officer, proteanTecs Evelyn Landman highlights, “Our close collaboration with TSMC enables us to support our mutual customers effectively, empowering them with critical insights and robust technology solutions for their projects that leverage TSMC’s advanced process technology." We are building advanced power reduction, health monitoring and predictive insights directly into the chip, empowering customers to scale faster with higher performance, efficiency, and reliability at 2nm and beyond. 👉 Read more here: https://lnkd.in/gEJ6xqAG   #proteanTecs #TSMC #N2P #semiconductors #onchipmonitors #2nm #LVTS

🚀 This week! TSMC North America OIP Ecosystem Forum And, we want to see you! Visit proteanTecs at booth #408 to explore our latest breakthroughs with 2nm solutions and hear real-world customer success stories. Join 2 talks during the show: 🔸 Power & Performance Optimization for #AI SoCs in the Data Center 🔸 System Failure Prevention with Real-time Health Monitoring Don't miss our live demos and your chance to win an iPad mini in our raffle! Join us and see how proteanTecs can help accelerate your success! #proteanTecs #tsmc #semiconductors #OnChipMonitors