On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks
AA Koufopoulou, A Papadimitriou… - … on Defect and Fault …, 2023 - ieeexplore.ieee.org
High-level synthesis (HLS) tools have provided significant productivity enhancements to the
design flow of digital systems in recent years, resulting in highly-optimized circuits, in terms
of area and latency. Given the evolution of hardware attacks, which can render them
vulnerable, it is essential to consider security as a significant aspect of the HLS design flow.
Yet the need to evaluate a huge number of functionally equivalent designs of the HLS
design space challenges hardware security evaluation methods (eg, fault injection-FI …
design flow of digital systems in recent years, resulting in highly-optimized circuits, in terms
of area and latency. Given the evolution of hardware attacks, which can render them
vulnerable, it is essential to consider security as a significant aspect of the HLS design flow.
Yet the need to evaluate a huge number of functionally equivalent designs of the HLS
design space challenges hardware security evaluation methods (eg, fault injection-FI …
On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks
A Artemis Koufopoulou, A Papadimitriou… - arXiv e …, 2023 - ui.adsabs.harvard.edu
High-level synthesis (HLS) tools have provided significant productivity enhancements to the
design flow of digital systems in recent years, resulting in highly-optimized circuits, in terms
of area and latency. Given the evolution of hardware attacks, which can render them
vulnerable, it is essential to consider security as a significant aspect of the HLS design flow.
Yet the need to evaluate a huge number of functionally equivalent de-signs of the HLS
design space challenges hardware security evaluation methods (eg, fault injection-FI …
design flow of digital systems in recent years, resulting in highly-optimized circuits, in terms
of area and latency. Given the evolution of hardware attacks, which can render them
vulnerable, it is essential to consider security as a significant aspect of the HLS design flow.
Yet the need to evaluate a huge number of functionally equivalent de-signs of the HLS
design space challenges hardware security evaluation methods (eg, fault injection-FI …
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