Silicon Integration Initiative, Inc.

We are excited to announce that we have named NVIDIA and Synopsys technologists to lead the new LLM Benchmarking Coalition, a collaborative industry initiative and standards body advancing AI for silicon design and verification that will expedite the development of high-quality large language models for semiconductor design problems. Nathaniel Pinckney, a senior research scientist at Nvidia, was elected by Coalition members to become the coalition’s first chair. His work covers high-level synthesis methodologies, low-power VLSI design, and cryptographic accelerators, with over 40 publications in these fields. Recently, his research has focused on evaluating large language models and AI agents, including co-creating the VerilogEval and the open-source Comprehensive Verilog Design Problems benchmarks. Igor Markov, a distinguished architect at Synopsys and an IEEE Fellow, was elected by Coalition members to become the coalition’s vice chair. He previously worked at Meta on AI platforms and at Google on Search. As a professor at the University of Michigan, he performed research on EDA, coauthored a textbook on physical design and co-edited a two-volume EDA Handbook. He won best paper awards at several conferences and published over 200 peer-reviewed papers. At Synopsys, he leads the AI Disruption Task Force. For all the details checkout the full announcement: https://lnkd.in/esmzTmTd

Si2 Announces Creation of the Si2 LLM Benchmarking Coalition Expediting the development of high-quality LLMs for semiconductor design The Silicon Integration Initiative (Si2) announced today the creation of the LLM benchmarking coalition (LBC) to expedite the development of high-quality large language models (LLMs) for semiconductor design problems. Si2 also announced that NVIDIA is joining as a founding member of the new coalition and that the coalition will build on the company’s open-source Comprehensive Verilog Design Problems (CVDP) benchmark that provides an LLM evaluation framework for LLMs used for Register-transfer level (RTL) design and verification problems. The Si2 Large Language Model Benchmarking Coalition is one of four Coalitions supported by Si2, a not-for-profit member organization whose members innovate on trusted standards and share solutions that lower development costs and increase design productivity. 

Pankaj Kukkal of NXP Semiconductors Reelected  Board Chair Of Silicon Integration Initiative Pankaj Kukkal, executive vice president of MCU/MPU Engineering for NXP Semiconductors, has been reelected to a fourth term as board chair of the  Silicon Integration Initiative for 2025-2026.   Kukkal joined the Si2 board in 2020 and assumed the chair role in 2022. Before NXP, he held executive leadership and engineering positions at Qualcomm and Intel, and design engineering positions at startup Knowledge Based Silicon and Ricoh Electronics.   Kukkal earned a bachelor’s of Technology in Electrical Engineering from the National Institute of Technology, Kurukshetra, India, and a master’s of science degree in Computer Engineering from the University of South Carolina, Columbia.   Si2 is a not-for-profit membership organization composed of suppliers and users who innovate on trusted standards and share solutions that lower development costs and increase design productivity.   Newly elected members of the 2025-2026 Si2 board of directors are:   - James Culp, corporate fellow, GlobalFoundries - Wilbur Luo, vice president, product engineering, Custom IC Products Group, Cadence Design Systems - Mo Movahed, vice president, Siemens EDA - Manoj Selva, vice president and general manager, Product Enablement Solutions Group, Intel Corp. - Banghyun Sung, distinguished engineer, SK hynix - Gaurav Varshney, director, technologist and distinguished member of the technical staff, Texas Instruments   Returning members of the 2025-2026 Si2 board of directors are:   - John Lee, general manager and vice president, Semiconductors and Optics Business Unit, Ansys - Roger Carpenter, hardware engineer, Google - Niels Faché, vice president and general manager, Keysight EDA - Leon Stok, Si2 board secretary, vice president, Electronic Design Automation, IBM - Pankaj Kukkal, Si2 board chair, executive vice president of MCU/MPU Engineering, NXP Semiconductors - Lu Dai, Si2 board treasurer, senior director of Technical Standards, Qualcomm - Jung Yun Choi, corporate vice president, Electronics Design Technology Team, Samsung  - Robert Aslett, Si2 president and CEO - Jacob Avidan, senior vice president, Signoff and Silicon Innovations, Synopsys - Lluis Paris, senior director, 3D Fabric Alliance, TSMC Si2 is a not-for-profit membership organization composed of suppliers and users who innovate on trusted standards and share solutions that lower development costs and increase design productivity. The Si2 board has 16 members representing leading semiconductor manufacturers, foundries, fabless companies and EDA software providers. Si2 members enable advanced semiconductor design integration, leading to industry-accepted standards. Si2 offers these standards, technology, and services to all interested organizations and individuals at a fair and reasonable cost. 

Don't miss this tutorial and other Si2 events at DAC 2025. https://lnkd.in/gDRmst5s

Join us for these informative, insightful events at DAC 2025. https://lnkd.in/gszHzWKN

Wilbur Luo of Cadence Joins Si2 Board Cadence Design Systems has a new representative on the Silicon Integration Initiative board of directors. Wilbur Luo, vice president of product engineering for the Custom IC product group, replaces Michael Jackson, who served on the Si2 board since 2022.  Luo’s team of engineers is responsible for product and solution definition, expert-level customer support and engagement, and tool enablement with foundries, partners and customers for the entire Cadence custom IC, analog and RF toolchain. He was previously responsible for the product management, product marketing and business development teams for the Custom IC and PCB division. He also managed the Cadence design for manufacturing R&D group and launched their next-generation custom/mixed-signal, high-performance routing and yield optimization solutions.

Si2 Extends Call for Papers  Deadline for Inaugural ICMC Conference The Compact Model Coalition of the Silicon Integration Initiative (Si2) has extended the call for papers deadline for its inaugural International Compact Modeling Conference (ICMC), scheduled for June 26-27, at the Cliff Royal Sonesta Hotel, San Francisco. The new deadline is January 26, 2025. Researchers, academics, and industry professionals are invited to submit proposals for ICMC, which will explore the theme of “Strengthening Model Collaboration with the Semiconductor Industry.” Co-sponsored by IEEE EDS, ICMC will focus on compact device models, their development, and their broad application in the semiconductor industry. For complete details on the call for papers and the conference visit https://lnkd.in/gjVnMZYB

Jeff Wilson of IBM Wins Si2 Pinnacle Award Jeff Wilson, a software engineer in the IBM EDA development organization, has been honored with the quarterly Silicon Integration Initiative Pinnacle Award which recognizes volunteers for their professional contributions to Si2 programs. Wilson is chair of the Si2 oaTranslator Workgroup, which supports Si2 OpenAccess, one of the world's most widely used open-reference databases for IC design. He guided his team through the development of a complex survey to define a translator to produce a human-readable format of OpenAccess data. Wilson has also contributed to the OpenAccess Debug Working Group. He has a Bachelor of Science degree from the University of Illinois at Champaign-Urbana. About Si2 Si2 is a not-for-profit membership organization for suppliers and users who innovate and collaborate on trusted standards. and share solutions that lower development costs and increase semiconductor design productivity. Si2 members include corporations, institutions, and academia. Si2 plays a crucial role in providing users and suppliers with access to shared technical solutions.

Si2 Compact Model Coalition Issues Call for Papers  for Inaugural ICMC Conference The Compact Model Coalition of the Silicon Integration Initiative (Si2) has issued a call for papers for its inaugural International Compact Modeling Conference (ICMC), scheduled for June 26-27, at the Cliff Royal Sonesta Hotel, San Francisco. Researchers, academics, and industry professionals are invited to submit proposals for ICMC, which will explore the theme of “Strengthening Model Collaboration with the Semiconductor Industry.”  Co-sponsored by IEEE EDS, ICMC will focus on compact device models, their development, and their broad application in the semiconductor industry. The abstract submission deadline is January 15, 2025. For complete details on the call for papers and the conference, visit https://2025.si2-icmc.org/

Si2 CMC Releases Seven New Versions of SPICE Models The Compact Model Coalition (CMC) of Silicon Integration Initiative has released seven new versions of its standardized device models, which are widely used in SPICE (Simulation Program with Integration Circuit Emphasis) circuit simulation tools. The CMC is a coalition of semiconductor companies that standardizes these semiconductor device models, and funds leading universities and research institutions to develop, refine, and maintain them for accurate prediction of electrical circuit behavior crucial in chip design for more information visit For more information about CMC visit https://si2.org/contact/.