Bhaumik Patel

Bhaumik Patel

Morrisville, North Carolina, United States
971 followers 500+ connections

About

Experienced Technical Support Engineer with a demonstrated history of working in the…

Activity

Join now to see all activity

Experience

  • Cypress Creek Renewables Graphic

    Cypress Creek Renewables

    Durham, North Carolina, United States

  • -

    Seattle, Washington, United States

  • -

    Durham, North Carolina, United States

  • -

    Lawrence, Massachusetts

  • -

    Vadodara, Gujarat, India

  • -

    Vadodara

Education

Courses

  • Adjustable Speed Motor Drives

    -

  • Analog integrated circuits

    -

  • Control and modeling of power converters

    -

  • Energy Harvesting, Storage and Powering for Microsystems

    -

  • Power Electronics

    -

  • Power Mangement Circuits

    -

  • RF circuits

    -

  • Renewable energy Systems and Distributed Power Generation system

    -

  • VLSI design

    -

Projects

  • Transformer-less PV inverter with virtual bus concept for cost effective grid connected PV power systems.

    -

    • Implemented a transformer less topology for PV module in order to eliminate leakage current in PV systems.
    • The stray capacitance was bypassed by connecting neutral to negative pole of DC bus.

  • Implementation of Solar Energy Harvesting Circuit with MPPT control technique

    -

    • Designed Solar energy powered energy harvesting circuit for low power applications which was controlled using Fractional Open circuit voltage(FOCV) MPPT technique.
    • Designed a boost converter based on the required regulated voltage at the output. Tools used: Cadence. CMOS Technology: 0.35um

  • Implementation of Control Schemes for a Single phase grid connected PV system

    -

    • Executed SOGI PLL, Hill Climbing MPPT and Current Control schemes for 4.4kW,230V grid connected PV system.
    • Used H5 inverter topology for power conversion along with a Boost converter. Also controlled PV inverter with 0.9 leading power factor.

  • 16 bit-ALU layout design

    -

    VLSI based design which performs arithmetic and logical operations using Xilinx ISE tool and implementing it on SPARTAN3E FPGA board.
    The design was synthesized using IBM130 technology for 130nm process.
    Performed layout verification and extraction using DRC, LVS check and QRC.
    Tools used: Cadence, Xilinx, Design Vision, Encounter, Siliconsmart, synopsys, HSPICE.

  • Design of Portable LDO regulator

    -

    Implemented LDO circuit using 0.35um CMOS technology. Designed two stages of LDO circuit i.e. an Error Amplifier and a buffer for circuit compensation.
    Compared buffer technique with compensation techniques such as phase lead compensation and voltage controlled current source.

  • Fractional Order Speed Controller for Buck converter fed DC motor

    -

    Implemented enhanced PID speed control method which added two more parameters to be tuned and approximate integrator and differentiator using Oustaloup’s approximation method.
    Results shows reduction of overshoot by 30-75% based on reference speed changes and 50% increased DC forward path gain. Settling time also reduced by 8-10%.

  • Voltage control of Cuk converter using PID controller

    -

    Implemented a converter topology having major applications in the field of renewable energy and controlled the output voltage with PID control technique.
    Charge storing capacitor in the circuit being the merit point of its usage in wind turbines and other renewable energy applications.

  • Design of Single phase Matrix Converter with PI and SPWM control strategy

    -

    Designed the power conversion device that generates variable output by operating it in different power conversion topologies including AC-AC, AC-DC, DC-DC and DC-AC.
    Results shows THD reduction below 4% without DC link being used for the converter.
    Software used: Simulink, PSIM

  • Design of a Folded cascode Single stage amplifier

    -

    • A differential input and single ended output single stage amplifier was designed using 0.35u CMOS process on Cadence Spectre.
    • Amplifier was designed according to the specified parameters.

More activity by Bhaumik

View Bhaumik’s full profile

  • See who you know in common
  • Get introduced
  • Contact Bhaumik directly
Join to view full profile

Other similar profiles

Explore collaborative articles

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

Explore More

Others named Bhaumik Patel in United States

Add new skills with these courses