Dr. Satya Gupta’s Post

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RAHUL KUMAR

Finalist–L&T Tech Services TECHgium 8th Edition | Analog Design Intern, BITS Pilani | B.Tech (ECE), Puducherry Technological University | BS Data Science, IIT Madras | Future-Ready Innovator in Electronics & Data Science

13h

Dr. Satya Gupta Will it be limited only to Tier 1 Colleges like IITS, NITS ? Will this opportunity be available for Tier 3 College students?

HariKrishna Kambham

Analog/RF IC research scholar

2h

Dr. Satya Gupta sir may I know more details about this? I am a phd research scholar at IIIT Hyderabad.i have access to Eda tools but I want to get my designs to be taped out and I wanna complete measurements for journal publications and thesis. I think this will help me a lot.could you please share more information about this? Thanks in advance.

Deepak Bhardwaj

Fuelling Launchspace Consulting || Transformative Initiatives in Policy, Technology & Manufacturing || Founder, Entrepreneur, Certified Independent Director, Speaker || Ex-Tata, EDS, Intel, Texas Instruments, Samsung ||

18h

This is the way to go! The hiring process should also change for the electronics sector. If #1TOPS could become the norm for hiring?

Aryan Kannaujiya

IIT Jammu | SRF | VLSI Circuits | BTI | Reliability | Soft Error | Memory Design | Best Paper | Chair IEEE CASS SBC | Actively Looking for Post-Doc

13h

It will be a great opportunity, sir!!! In many cases, an individual student may have a smaller design, though not always. Therefore, to achieve more than 80% core area utilization, two or more students may sometimes need to work together on a single chip.

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JUSTIN C DAS

Memory Controller Design | DDR | RTL

15h

Great Initiative, China did this early. One Student One Chip (OSOC) Initiative. https://ysyx.oscc.cc/docs/en/#learning-resources https://t.me/vlsiopen/9/2195

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Sudarshan Natu

Managing Director NitAl Computer Systems P.Ltd

10h

Dr. Satya Gupta Interesting and COEP Tech would definately like to be part of this initiative. You talked about it during your COEP visit couple weeks ago.

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Dr. Mohammed Usman

Professor and HoD, ECE, Bennett University; Senior Member, IEEE; Consultant, Hy-Met Limited.

6h

Great opportunity. Hope it’s available to private universities too

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Vivek Saxena

Semiconductor / ESDM Business Advisor | Karnataka Digital Economy Mission (KDEM) | Cross Border Business Enablement | Startup Acceleration

14h

Very nice initiative Dr. Satya Gupta 🎉 It's much needed rather than only talk about the future of chip making in India 👏

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