Samsung and VSD Offer Free FPGA Boards for RISC-V Learning in Karnataka

Samsung Semiconductor India Research (SSIR) & VLSI System Design (VSD) Offer #FREE #VSDSquadron #FPGA Boards for #RISCV Learning in Karnataka High Schools! Your Child Can Design the Future. We're Giving Them the Tools. The next technological revolution will not be built in Silicon Valley. It will be built in Karnataka. The India Semiconductor Mission 2030 needs its architects. Not in a decade. Now. In an unprecedented move, Samsung Semiconductor India Research is partnering with VSD to launch a groundbreaking initiative: RISC-V on FPGA for High School. We are selecting 500 students from Karnataka to receive the VSDSquadron FPGA board at no cost. This is not a toy. It is a key to the future. Your child will not just use technology. They will create it. They will learn the language of innovation—RISC-V—and hold the power to shape it in their hands. This is where India's technological sovereignty begins. Not in a lab. At your kitchen table. The future is not something we enter. It is something we build. Let your child be a builder. https://lnkd.in/geCKi7Uq RISC-V International India Semiconductor Mission India Electronics and Semiconductor Association VLSI Society of India (VSI) Ministry of Electronics and Information Technology Digital India RISC-V (DIR-V) Program Digital India Programme SEMI India SEMI Foundation

🚀 Upskilling in VLSI Design I have attended the Career Pathways to the Semiconductor Industry webinar by NGS AI Chip, where I learnt to upskill myself through nptel lectures, which I’ve already built my foundations in VLSI Design through NPTEL lectures taught by Prof. Nandita Dasgupta (IIT Madras). 📚 Currently learning from two series: 🔹 CMOS Digital VLSI Design — Logic families, transistor sizing, and layout design 🔹 CMOS Analog VLSI Design — Current mirrors, biasing, and differential amplifiers To reinforce my understanding, I’ve been creating detailed notes — sharing a few pages here from my learning journey. These notes help me visualize how circuit theory meets semiconductor physics in real chip design. 💡 My goal is to bridge theory and industry practice — from understanding transistor-level modeling to contributing to ASIC and SoC design in the future. 📄 Attaching my notes below — open to feedback, discussions, and connections with VLSI professionals and learners! #VLSIDesign #Semiconductor #NPTEL #IITMadras #AnalogDesign #DigitalVLSI #CMOS #ChipDesign #ASIC #LearningJourney #SemiconIndia #Upskilling #Engineering

🚀 SRM University-AP is proud to announce a Faculty Development Programme (FDP) on: 🎓 "Imparting Knowledge on VLSI Devices and Circuits with Current Trends" 🧠 Organized by: Department of Electronics and Communication Engineering (ECE) This FDP is designed to provide deep insights into the latest advancements and research directions in VLSI (Very-Large-Scale Integration)—a core domain shaping the future of semiconductors, chip design, and embedded systems. 👨🏫 Who should attend? Faculty members Research scholars Industry professionals PG students interested in VLSI and semiconductor technology

💡 What is VLSI? Why does it matter? Every chip inside your phone, laptop, or even an electric car is powered by VLSI (Very Large Scale Integration). It’s the science of integrating millions of transistors into a single chip. 📱 Your smartphone’s speed, 🚗 EV’s efficiency, 🛰 Satellites in space — all rely on VLSI design. At KT Semicon, our mission is to make students & professionals industry-ready with real-world VLSI training. 👉 Imagine not just using technology… but creating it. That’s the power of VLSI. #VLSI #ChipDesign #KTsemicon #Semiconductors #RTLDesign #ECE

The VLSI Industry: Powering the Future of Technology The VLSI (Very Large-Scale Integration) industry is the silent force behind every technological breakthrough we see today - from high-performance smartphones to Al-driven data centers. As devices get smaller, faster, and more power-efficient, the demand for skilled chip design and verification engineers is soaring. The semiconductor ecosystem is expanding rapidly, offering incredible opportunities for innovation and learning. What excites me most about VLSI is how it blends hardware design, logic thinking, and real-world problem-solving. It's not just about circuits - it's about engineering intelligence into silicon. With advancements in Al chips, 5G, automotive electronics, and loT, the next decade is set to redefine what's possible in computing. The VLSI industry will be at the heart of it all. Whether you're an aspiring engineer or a seasoned professional, there's never been a better time to dive into VLSI and contribute to shaping the digital world. #VLSI #Semiconductors #Chip Design #Engineering #Innovation

Successfully participated in the VLSI Test Workshop (October 10–12, 2025) organized by PSG College of Technology and the IEEE Computer Society – Test Technology Technical Community (TTTC), India. As a 2nd-year student in Electronics Engineering (VLSI Design and Technology), this workshop provided a strong foundation in VLSI Testing and Design for Testability (DFT) bridging theoretical concepts with practical exposure to real-world industry practices. Key Learnings & Highlights: 🔹 Theory Understanding: Gained insights into the fundamentals of VLSI testing, fault models, and design-for-testability principles essential for ensuring chip reliability. 🔹 Conceptual Knowledge: Learned how test patterns are generated for combinational circuits and explored the concept of scan chains in sequential circuit testing. 🔹 Tool Exposure: Had an introductory experience with industry-standard tools and workflows related to scan insertion and Automatic Test Pattern Generation (ATPG), emphasizing the use of Siemens Tessent and Cadence Genus. This experience has significantly enhanced my understanding of semiconductor testing methodologies and strengthened my interest in pursuing advanced learning in VLSI design and verification. Sincere thanks to the industry experts for their insightful sessions and guidance: 🔸 Kamlesh Pandey – Founder & CEO, Krivya Semicon Pvt Ltd 🔸 Sameer Chillarge – R&D Director, Cadence, Bengaluru 🔸 Nikhil Sudhakaran – Director of Engineering, Marvell, Bengaluru 🔸 Abhishek Chaudhary – Member of Technical Staff, AMD, Bengaluru Grateful to the Department of ECE, PSG College of Technology, and TTTC India for organizing such an enriching workshop. #VLSI #DFT #ATPG #TTTC #Semiconductor #ElectronicsEngineering #Testing #HardwareDesign #ICDesign #PSGCollegeofTechnology

The semiconductor industry has always held immense potential, but access to infrastructure and industry-standard resources remains limited for many. As a result, countless capable students go unnoticed—not due to lack of talent, but due to lack of opportunity. At East Delta University, we recognize this gap and are committed to bridging it. Through focused awareness programs and strengthened academia-industry collaboration, we aim to empower students with the knowledge, skills, and guidance needed to confidently step into the global semiconductor landscape. After all, talent doesn’t thrive on its own—it needs the right environment to grow. #VLSI #EDU #Chittagong #academic #semiconductorindustry #Bangladesh

The Department of Multidisciplinary Engineering, NCU, is organising a 6-day Faculty Development Programme (FDP) on: ‘Advances in Semiconductor Technologies: From Fundamentals to AI-Driven VLSI Design and Packaging’ 📅 12th - 17th January 2026 The FDP will cover: Semiconductor fundamentals AI-driven VLSI design Fabrication processes Advanced packaging solutions Eminent speakers from industry and academia will share insights into the latest global developments. This FDP supports the India Semiconductor Mission, aiming to build capacity, strengthen expertise, and empower faculty, scholars, and professionals to contribute to India’s semiconductor ecosystem. Note: Participation is free Apply via ATAL portal: https://lnkd.in/gQ8ASsV Application No: 1749625460 #NCU #NorthCapUniversity #ATAL #AICTE

From 🧠 Idea to Chip 🔳 | ChipCraft’25 Begins! The IEEE Electron Devices Society (EDS) of Kalasalingam Academy of Research and Education (KARE) proudly presents “ChipCraft’25” - a complete Student Chip Design Road-map, guiding learners through every stage of VLSI design, from RTL to GDSII, supported by Synopsys C2S tools. 💡 This four-phase initiative bridges academia and semiconductor industry practices, empowering students with hands-on exposure to: 🔹 RTL to Netlist 🔹 DFT Insertion & Verification 🔹 Physical Design 🔹 Sign-off & Validation ChipCraft’25 isn’t just a workshop series - it’s a pathway to real-world chip design expertise. A special thanks to our IEEE EDS adviser Bhuvaneswary Narayanan, our HoD-ECE Dr. J Charles Pravin, our Dean-SEET Pothiraj Sivakumar and our management Kalasalingam University. And a heartfelt thanks to Chips to Start-up (C2S) Programme, CDAC Bangalore, ChipIN Centre and Synopsys Inc India team for their continued guidance and support in making this initiative possible. IEEE | KARE IEEE Student Branch | Kalasalingam University- Electronics and Communication Engineering Department #ChipCraft25 #IEEEEDS #KARE #Synopsys #VLSI #EDA #Semiconductors #DigitalIndia #ChipDesign #ChipinCenter #C2S #RTLtoGDSII #EngineeringEducation #HandsOnLearning