Recent Developments in Photonic Integrated Circuits

Researchers from Columbia University and Cornell University recently reported a 3D-photonic transceiver that features 80 channels on a single chip and consumes only 120fJ/bit from its electro-optic front ends. The #transceiver achieves low energy consumption through low-capacitance 3D connections between photonics and co-designed #CMOS electronics. Each channel has a relatively low data rate of 10Gbps, allowing the transceiver's electronics to operate with high sensitivity and minimal energy consumption. The large array of channels compensates for the low per-channel data rates, delivering a high aggregate data rate of 800Gbps in a compact transceiver area of only 0.15mm2 (@5.3Tbps/mm2). In addition, having many low-data-rate channels relaxes signal processing and time multiplexing of data streams native to the processor. Furthermore, wavelength-division-multiplexing (#WDM) sources for numerous data streams are becoming available with the advent of chip-scale microcombs. The EIC is bonded to the PIC based on a 15μm spacing and a 10μm bump diameter (@25μm pitch) in an array of 2,304 bonds. This process mitigates two potential failure risks: 1) excessive tin causing flow and electrical short to adjacent bonds and 2) insufficient tin leading to brittle bonds. 👇Figure 1: a) An illustration of the 3D-integrated photonic-electronic system combining arrays of electronic cells with arrays of photonic devices. b) A microscope image of the 80-channel photonic device arrays with an inset of two transmitter and two receiver cells. c) Microscope images of the photonic and electronic chips. The active photonic circuits occupy an area outlined in white, while the outer photonic chip area is used to fan out the optical/electrical lanes for fiber coupling and wire bonding. The blue overlay shows a four-channel transmitter and receiver #waveguide path; the disk and ring overlays are not to scale. An inset shows a diagram of the fiber-to-chip edge coupler, consisting of a silicon nitride (Si3N4) inverse taper and escalator to silicon. d) A scanning electron microscope image of the bonded electronic and photonic chip cross-section. e) An image of the wire-bonded transceiver die bonded to a printed circuit board and optically coupled to a fiber array with a US dime for scale. f) A cross-sectional diagram of the electronic and photonic chips and their associated material stacks. Both chips consist of a crystalline silicon substrate, doped-silicon devices and metal interconnection layers. Daudlin, S. et al. Three-dimensional photonic integration for ultra-low-energy, high-bandwidth interchip data links. Nat. Photon. (2025).👉https://lnkd.in/gpeVGZna #SemiconductorIndustry #Semiconductor #Semiconductors #AI #HPC #Datacenter #Optics #Photonics #SiliconPhotonics #Optical #Networking #OCI #Ethernet #Infrastructure #Interconnect #CloudAI #AICluster AIM Photonics TSMC Defense Advanced Research Projects Agency (DARPA) #FiberCoupling #SiP

The lights just got a lot brighter at the edge of the #AI universe, and not because of another GPU drop or a new “foundational” model trying to sell you self-awareness. No, this time it’s real tech, actual innovation you can touch, measure, and wire into the future. Avicena Tech just closed a $65 million Series B, led by Tiger Global, with SK hynix, Cerberus Capital Management, Lam Research, Maverick Silicon, and Prosperity7 Ventures backing the play. That puts the total raise at $120 million, which is the kind of runway you don’t get unless you’re building something the #hyperscalers are already losing sleep over. Founded in 2019 by #photonics heavyweight Bardia Pezeshki and CTO Rob Kalman, who both cut their teeth in the wild west of #opticalnetworking, Avicena is flipping #photons into payloads. Their LightBundle™ platform is built on #GaN #microLEDs and integrated #CMOS drivers, delivering over 1Tbps/mm bandwidth density at under 0.5pJ/bit. That’s not evolution, that’s teleportation compared to what’s powering most AI clusters today. This isn’t some academic flex on power curves. This is commercial traction with teeth: Avicena’s 12mm² chiplet clocks in at 1Tbps bidirectional, already winning designs from two top-five cloud players for 2026 deployment. They’ve got SK hynix tapped in for memory-to-processor interconnects. Corning is in with a 331-core fiber that lights up 10 meters of bandwidth without blowing your latency budget. DSPs? Gone. Latency? Sub-5ns. That’s the difference between real-time AI and real slow #inference. And they’re scaling with purpose. TSMC is optimizing #photodetector arrays. ams OSRAM is lined up to pump out a million-plus units per month by 2026. Avicena isn’t just building optical I/O, they’re making it manufacturable. That’s how you go from #deeptech to #datacenter dominance. No science fair here, just science fiction made viable. They’ve also built a team that knows what exits look like. Greg Dougherty (ex-Oclaro CEO) is on the board. Chris Pfistner came over from Inphi / Marvell. Sama Pourmojib is leading ops. The headcount tripled since Series A with hires out of Intel, TSMC, and Micron. That’s not a startup, that’s a vanguard. #AIsystems are hitting the wall on power and bandwidth, and LightBundle is Avicena’s way of punching through. It’s not about plugging the gaps, it’s about redefining the fabric the system runs on. You want #zettascale? You’d better call someone who speaks in picoseconds. This isn’t just interconnect. This is insight in motion. Congrats to the whole crew, Bardia Pezeshki, Rob Kalman, and the Avicena team, for proving that when you combine legacy chops with new-world optics, you don’t just move data. You move markets. #Startups #StartupFunding #VentureCapital #SeriesB #Data #AI #MicroLED #EdgeComputing #DeepTech #Optics #Technology #Innovation #TechEcosystem #StartupEcosystem Thank you, Vention. Without your support, none of this would be possible.

Future technologies has edge we known as quantum technologies with in 5 years the investment of knowledge or money will be a excellent choice for big industries and infrastructure of the world with on going research of more then 200 quantum computers working world wide we open new reality door steps for future generation starting with upgradation in quantum chips such as the first chip that integrates electronic, photonic, and quantum components. Their findings, published in Nature Electronics, describe a system that merges quantum light sources with stabilizing electronics, all fabricated using a standard 45-nanometer semiconductor process.This integration allows the chip to generate consistent streams of correlated photon pairs (particles of light), which are essential building blocks for many quantum applications. The breakthrough marks a major step toward the large-scale production of “quantum light factory” chips and the development of more complex quantum systems composed of multiple interconnected chips.Just as electronic chips are powered by electric currents, and optical communication links by laser light, future quantum technologies will require a steady stream of quantum light resource units to perform their functions. To provide this, the researchers’ work created an array of “quantum light factories” on a silicon chip, each less than a millimeter by a millimeter in dimension.To address this challenge, the team built an integrated system that actively stabilizes quantum light sources on chip—specifically, the silicon microring resonators that generate the streams of correlated photons. Each chip contains twelve such sources operable in parallel, and each resonator must stay in sync with its incoming laser light even in the presence of temperature drift and interference from nearby devices, including the other eleven photon-pair sources on the chip.The extreme sensitivity of the microring resonators, the building blocks for the quantum light sources, is well known and is both a blessing and a curse. It is the reason why they can generate quantum light streams efficiently and in a minimal chip area. However, small shifts in temperature can derail the photon-pair generation process. The BU-led team solved this by integrating photodiodes inside the resonators in a way that monitors alignment with the incoming laser while preserving the quantum light generation. On-chip heaters and control logic continually adjust the resonance in response to drift.Because the chip uses built-in feedback to stabilize each source, it behaves predictably despite temperature changes and fabrication variations—an essential requirement for scaling up quantum systems. It was fabricated in a commercial 45-nanometer complementary As quantum photonic systems progress in scale and complexity, chips like this could become building blocks for technologies ranging from secure communication networks i sunny faridi see change of structures throughout in quantum future